1. Handling of Non S/W path DMA channel abnormal interrupts in Driver and only TI & RI interrupts handled in FW.
2. Reading MSI status for checking interrupt status of SW MSI.
1. XPCS module is re-initialized after link-up as MACxPONRST is asserted during link-down.
2. Disable Rx side EEE LPI before configuring Rx Parser (FRP). Enable the same after Rx Parser configuration.
1. DMA channel status cleared only for SW path allocated DMA channels. IPA path DMA channel status clearing is skipped.
2. Ethtool statistics added to print doorbell SRAM area for all the channels.
1. Skip resume_config and reset eMAC if port unavailable (PHY not connected) during suspend-resume.
2. Restore clock after resume in set_power.
3. Shifted Queuing Work to end of resume to prevent MSI disable on resume.
1. Support for eMAC Reset and unused clock disable during Suspend and restoring it back during resume.
2. Resetting and disabling of unused clocks for eMAC Port, when no-found PHY for that particular port.
3. Valid phy-address and mii-pointer NULL check in tc956xmac_suspend().
1. Added module parameters for Rx Queue Size, Flow Control thresholds and Tx Queue Size configuration.
2. Renamed all module parameters for easy readability.
1. Runtime configuration of EEE supported and LPI interrupts disabled by default.
2. Module param added to configure EEE and LPI timer.
3. Driver name corrected in ethtool display.
1. Restricted MDIO access when no PHY found or MDIO registration fails
2. Added mdio lock for making mii bus of private member to null to avoid parallel accessing to MDIO bus
1. Added separate control functions for MAC TX and RX start/stop.
2. Stopped disabling/enabling of MAC TX during Link down/up.
3. Disabled link state latency configuration for all PCIe ports by default
1. Added PM support for suspend-resume.
2. Added WOL Interrupt Handler and ethtool Support.
3. Updated EEE support for PHY and MAC Control. (EEE macros are not enabled as EEE LPI interrupts disable are still under validation)
1. Configuring pause frame control using kernel module parameter also forwarding only Link partner pause frames to Application and filtering PHY pause frames using FRP.
2. Returning error on disabling Receive Flow Control via ethtool for speed other than 10G in XFI mode.
1. Updated RX Queue Threshold limits for Activating and Deactivating Flow control
2. Filtering All pause frames by default.
3. Capturing RBU status and updating to ethtool statistics for both S/W & IPA DMA channels
1. Configuration of Link state L0 and L1 transaction delay for PCIe switch ports & Endpoint. By default maximum values are set for L0s and L1 latencies.
1. TC956X_PCIE_GEN3_SETTING macro setting supported through makefile. By default Gen3 settings will not be applied by the Driver as TC956X_PCIE_GEN3_SETTING is not defined.
2. TC956X_LOAD_FW_HEADER macro setting supported through makefile. By default, TC956X_LOAD_FW_HEADER macro is disabled. If FIRMWARE_NAME is not specified in Makefile, the default value shall be TC956X_Firmware_PCIeBridge.bin
3. Platform APIs supported.
4. Modified PHY C22/C45 debug message.
This reverts below two commits:
commit 19078e57bc ("module.list: Add gunyah arm64 support to for pitti")
commit d44a0d2727 ("modules.list: Add gunyah vm-loader for cpusysvm
in PITTI").
Change-Id: I77670aaf5ade98967cfc0d18f7af513e879e7cee
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
