Add files via upload
This commit is contained in:
TC956X
jianzhou
parent
992d2b8e09
commit
df8bba5ee0
@ -1,7 +1,7 @@
|
||||
# Toshiba Electronic Devices & Storage Corporation TC956X PCIe Ethernet Host Driver
|
||||
Release Date: 15 Jul 2021
|
||||
Release Date: 20 Jul 2021
|
||||
|
||||
Release Version: V_01-00-02 : Limited-tested version
|
||||
Release Version: V_01-00-03 : Limited-tested version
|
||||
|
||||
TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
|
||||
|
||||
@ -46,6 +46,11 @@ TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
|
||||
2. Removed module parameters for selection of Port0 and Port1 interface
|
||||
3. Debugfs support for IPA statistics
|
||||
|
||||
## TC956X_Host_Driver_20210720_V_01-00-03:
|
||||
|
||||
1. Debugfs not supported for IPA statistics
|
||||
2. Default Port1 interface selected as SGMII
|
||||
|
||||
# Note:
|
||||
|
||||
1. Use below commands to advertise with Autonegotiation ON for speeds 10Gbps, 5Gbps, 2.5Gbps, 1Gbps, 100Mbps and 10Mbps as ethtool speed command does not support.
|
||||
|
||||
9
common.h
9
common.h
@ -36,6 +36,8 @@
|
||||
* VERSION : 01-00-01
|
||||
* 15 Jul 2021 : 1. USXGMII/XFI/SGMII/RGMII interface supported without module parameter
|
||||
* VERSION : 01-00-02
|
||||
* 20 Jul 2021 : CONFIG_DEBUG_FS_TC956X removed and renamed as CONFIG_DEBUG_FS
|
||||
* VERSION : 01-00-03
|
||||
*/
|
||||
|
||||
#ifndef __COMMON_H__
|
||||
@ -70,7 +72,7 @@
|
||||
#define DWXGMAC_CORE_3_01 0x30
|
||||
|
||||
//#define DISABLE_EMAC_PORT1
|
||||
//#define DUMP_REGISTER
|
||||
|
||||
/* Note: Multiple macro definitions for TC956X_PCIE_LOGSTAT.
|
||||
* Please also define/undefine same macro in tc956xmac_ioctl.h, if changing in this file
|
||||
*/
|
||||
@ -101,9 +103,7 @@
|
||||
#define ETH_CORE_DUMP_OFFSET6 (0x1140 / 4)
|
||||
#define ETH_CORE_DUMP_OFFSET6_END (0x1174 / 4)
|
||||
|
||||
#define CONFIG_DEBUG_FS_TC956X
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS_TC956X
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
|
||||
#ifdef TC956X
|
||||
int tc956xmac_init(void);
|
||||
@ -915,6 +915,7 @@ enum packets_types {
|
||||
#define MSI_INT_TX_CH0 3
|
||||
#define MSI_INT_RX_CH0 11
|
||||
#define MSI_INT_EXT_PHY 20
|
||||
|
||||
#ifdef TC956X_SW_MSI
|
||||
#define MSI_INT_SW_MSI 24
|
||||
#endif
|
||||
|
||||
@ -32,6 +32,8 @@
|
||||
* VERSION : 01-00
|
||||
* 15 Jul 2021 : 1. USXGMII/XFI/SGMII/RGMII interface supported without module parameter
|
||||
* VERSION : 01-00-02
|
||||
* 20 Jul 2021 : 1. Debug prints removed
|
||||
* VERSION : 01-00-03
|
||||
*/
|
||||
|
||||
#include "tc956xmac_inc.h"
|
||||
@ -332,8 +334,6 @@ static void dwxgmac2_get_addr(struct tc956xmac_priv *priv,
|
||||
static void dwxgmac2_set_addr(struct tc956xmac_priv *priv,
|
||||
struct dma_desc *p, dma_addr_t addr)
|
||||
{
|
||||
u64 target_addrs;
|
||||
|
||||
//printk("%s, buff addr = 0x%llx\n",__func__, addr);
|
||||
p->des0 = cpu_to_le32(lower_32_bits(addr));
|
||||
#ifdef TC956X
|
||||
@ -345,13 +345,6 @@ static void dwxgmac2_set_addr(struct tc956xmac_priv *priv,
|
||||
#endif
|
||||
|
||||
//printk(" pdes0 = 0x%x. pdes1 = 0x%x\n", p->des0, p->des1);
|
||||
target_addrs = (u64)(TC956X_HOST_PHYSICAL_ADRS_MASK | (upper_32_bits(addr) & 0xF));
|
||||
|
||||
target_addrs = (u64)lower_32_bits(target_addrs) << 32;
|
||||
target_addrs |= cpu_to_le32(lower_32_bits(addr));
|
||||
|
||||
if (target_addrs < 0x1000000000 || target_addrs > 0x1FFFFFFFFF)
|
||||
printk("Address out of range. Trsl Addr = 0x%llx, eMAC target addr = 0x%llx\n", (u64)addr, target_addrs);
|
||||
}
|
||||
|
||||
static void dwxgmac2_clear(struct tc956xmac_priv *priv, struct dma_desc *p)
|
||||
|
||||
@ -32,6 +32,8 @@
|
||||
* VERSION : 01-00
|
||||
* 15 Jul 2021 : 1. USXGMII/XFI/SGMII/RGMII interface supported without module parameter
|
||||
* VERSION : 01-00-02
|
||||
* 20 Jul 2021 : 1. Debug prints removed
|
||||
* VERSION : 01-00-03
|
||||
*/
|
||||
|
||||
#include <linux/iopoll.h>
|
||||
@ -90,7 +92,6 @@ static void dwxgmac2_dma_init_rx_chan(struct tc956xmac_priv *priv,
|
||||
u32 rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl;
|
||||
u32 value;
|
||||
|
||||
u64 target_addrs;
|
||||
value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
|
||||
value &= ~XGMAC_RxPBL;
|
||||
value |= (rxpbl << XGMAC_RxPBL_SHIFT) & XGMAC_RxPBL;
|
||||
@ -110,13 +111,6 @@ static void dwxgmac2_dma_init_rx_chan(struct tc956xmac_priv *priv,
|
||||
writel(upper_32_bits(phy), ioaddr + XGMAC_DMA_CH_RxDESC_HADDR(chan));
|
||||
#endif
|
||||
writel(lower_32_bits(phy), ioaddr + XGMAC_DMA_CH_RxDESC_LADDR(chan));
|
||||
target_addrs = (u64)(TC956X_HOST_PHYSICAL_ADRS_MASK | (upper_32_bits(phy) & 0xF));
|
||||
|
||||
target_addrs = (u64)lower_32_bits(target_addrs) << 32;
|
||||
target_addrs |= cpu_to_le32(lower_32_bits(phy));
|
||||
|
||||
if (target_addrs < 0x1000000000 || target_addrs > 0x1FFFFFFFFF)
|
||||
printk("Address out of range. Trsl Addr = 0x%llx, eMAC target addr = 0x%llx\n", (u64)phy, target_addrs);
|
||||
}
|
||||
|
||||
static void dwxgmac2_dma_init_tx_chan(struct tc956xmac_priv *priv,
|
||||
@ -126,7 +120,6 @@ static void dwxgmac2_dma_init_tx_chan(struct tc956xmac_priv *priv,
|
||||
{
|
||||
u32 txpbl = dma_cfg->txpbl ?: dma_cfg->pbl;
|
||||
u32 value;
|
||||
u64 target_addrs;
|
||||
|
||||
value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
|
||||
value &= ~XGMAC_TxPBL;
|
||||
@ -144,13 +137,6 @@ static void dwxgmac2_dma_init_tx_chan(struct tc956xmac_priv *priv,
|
||||
XGMAC_DMA_CH_TxDESC_HADDR(chan));
|
||||
#endif
|
||||
writel(lower_32_bits(phy), ioaddr + XGMAC_DMA_CH_TxDESC_LADDR(chan));
|
||||
target_addrs = (u64)(TC956X_HOST_PHYSICAL_ADRS_MASK | (upper_32_bits(phy) & 0xF));
|
||||
|
||||
target_addrs = (u64)lower_32_bits(target_addrs) << 32;
|
||||
target_addrs |= cpu_to_le32(lower_32_bits(phy));
|
||||
|
||||
if (target_addrs < 0x1000000000 || target_addrs > 0x1FFFFFFFFF)
|
||||
printk("Address out of range. Trsl Addr = 0x%llx, eMAC target addr = 0x%llx\n", (u64)phy, target_addrs);
|
||||
}
|
||||
|
||||
static void dwxgmac2_dma_axi(struct tc956xmac_priv *priv, void __iomem *ioaddr,
|
||||
|
||||
@ -33,6 +33,8 @@
|
||||
* VERSION : 01-00-01
|
||||
* 15 Jul 2021 : 1. USXGMII/XFI/SGMII/RGMII interface supported without module parameter
|
||||
* VERSION : 01-00-02
|
||||
* 20 Jul 2021 : 1. IPA statistics print function removed
|
||||
* VERSION : 01-00-03
|
||||
*/
|
||||
|
||||
#include <linux/dma-mapping.h>
|
||||
@ -1452,78 +1454,5 @@ int stop_channel(struct net_device *ndev, struct channel_info *channel)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(stop_channel);
|
||||
|
||||
/*!
|
||||
* \brief This API will print EMAC-IPA offload DMA channel stats
|
||||
*
|
||||
* \details This function will read and prints DMA Descriptor stats
|
||||
* used by IPA.
|
||||
*
|
||||
* \param[in] ndev : TC956x netdev data structure.
|
||||
*
|
||||
* \return : Return 0 on success, -ve value on error
|
||||
* -ENODEV if ndev is NULL, tc956xmac_priv extracted from ndev is NULL
|
||||
*/
|
||||
int read_ipa_desc_stats(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
unsigned int buf_len = 4000;
|
||||
unsigned int len = 0;
|
||||
int chno = 0;
|
||||
char *buf;
|
||||
ssize_t ret_cnt;
|
||||
struct tc956xmac_priv *priv = file->private_data;
|
||||
|
||||
if (!priv) {
|
||||
printk(KERN_ERR "%s: Error priv is null\n", __func__);
|
||||
return count;
|
||||
}
|
||||
|
||||
buf = kzalloc(buf_len, GFP_KERNEL);
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"\n************* READ IPA DESC STATS *************\n");
|
||||
|
||||
/* TX DMA Descriptors Status for all channels */
|
||||
for(chno = 0; chno < priv->plat->tx_queues_to_use; chno++) {
|
||||
|
||||
if (priv->plat->tx_dma_ch_owner[chno] != USE_IN_OFFLOADER)
|
||||
continue;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_status[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_STATUS(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_control[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_TX_CONTROL(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_desc_list_haddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_TxDESC_HADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_desc_list_laddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_TxDESC_LADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_desc_ring_len[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_TX_CONTROL2(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_desc_curr_haddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_Cur_TxDESC_HADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_desc_curr_laddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_Cur_TxDESC_LADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_desc_tail[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_TxDESC_TAIL_LPTR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_desc_buf_haddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_Cur_TxBuff_HADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_desc_buf_laddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_Cur_TxBuff_LADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "txch_dma_interrupt_en[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_INT_EN(chno)));
|
||||
}
|
||||
|
||||
/* RX DMA Descriptors Status for all channels */
|
||||
for(chno = 0; chno < TC956XMAC_CH_MAX; chno++) {
|
||||
|
||||
if (priv->plat->rx_dma_ch_owner[chno] != USE_IN_OFFLOADER)
|
||||
continue;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_status[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_STATUS(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_control[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_RX_CONTROL(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_desc_list_haddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_RxDESC_HADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_desc_list_laddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_RxDESC_LADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_desc_ring_len[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_RX_CONTROL2(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_desc_curr_haddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_Cur_RxDESC_HADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_desc_curr_laddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_Cur_RxDESC_LADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_desc_tail[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_RxDESC_TAIL_LPTR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_desc_buf_haddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_Cur_RxBuff_HADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_desc_buf_laddr[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_Cur_RxBuff_LADDR(chno)));
|
||||
len += scnprintf(buf + len, buf_len - len, "rxch_dma_interrupt_en[%d] : 0x%08x\n", chno, readl(priv->ioaddr + XGMAC_DMA_CH_INT_EN(chno)));
|
||||
}
|
||||
|
||||
ret_cnt = simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
kfree(buf);
|
||||
return ret_cnt;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(read_ipa_desc_stats);
|
||||
|
||||
@ -35,6 +35,8 @@
|
||||
* VERSION : 01-00-01
|
||||
* 15 Jul 2021 : 1. USXGMII/XFI/SGMII/RGMII interface supported without module parameter
|
||||
* VERSION : 01-00-02
|
||||
* 20 Jul 2021 : 1. IPA statistics print function removed
|
||||
* VERSION : 01-00-03
|
||||
*/
|
||||
|
||||
#ifndef __TC956x_IPA_INTF_H
|
||||
@ -369,21 +371,6 @@ int start_channel(struct net_device *ndev, struct channel_info *channel);
|
||||
*/
|
||||
int stop_channel(struct net_device *ndev, struct channel_info *channel);
|
||||
|
||||
/*!
|
||||
* \brief This API will print EMAC-IPA offload DMA channel stats
|
||||
*
|
||||
* \details This function will read and prints DMA Descriptor stats
|
||||
* used by IPA.
|
||||
*
|
||||
* \param[i] ndev : TC956x netdev data structure.
|
||||
*
|
||||
* \return : Return 0 on success, -ve value on error
|
||||
* -ENODEV if ndev is NULL, tc956xmac_priv extracted from ndev is NULL
|
||||
*
|
||||
*/
|
||||
int read_ipa_desc_stats(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos);
|
||||
|
||||
|
||||
#endif /* __TC956x_IPA_INTF_H */
|
||||
|
||||
|
||||
@ -36,6 +36,8 @@
|
||||
* VERSION : 01-00-01
|
||||
* 15 Jul 2021 : 1. USXGMII/XFI/SGMII/RGMII interface supported without module parameter
|
||||
* VERSION : 01-00-02
|
||||
* 20 Jul 2021 : Version update
|
||||
* VERSION : 01-00-03
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
@ -64,7 +66,7 @@ static unsigned int tc956x_speed = 3;
|
||||
#endif
|
||||
|
||||
|
||||
static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 0, 2};
|
||||
static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 0, 3};
|
||||
|
||||
/*
|
||||
* This struct is used to associate PCI Function of MAC controller on a board,
|
||||
|
||||
11
tc956xmac.h
11
tc956xmac.h
@ -36,6 +36,9 @@
|
||||
* VERSION : 01-00-01
|
||||
* 15 Jul 2021 : 1. USXGMII/XFI/SGMII/RGMII interface supported without module parameter
|
||||
* VERSION : 01-00-02
|
||||
* 20 Jul 2021 : 1. Version update
|
||||
2. Default Port1 interface selected as SGMII
|
||||
* VERSION : 01-00-03
|
||||
*/
|
||||
|
||||
#ifndef __TC956XMAC_H__
|
||||
@ -83,7 +86,7 @@
|
||||
#ifdef TC956X
|
||||
|
||||
#define TC956X_RESOURCE_NAME "tc956x_pci-eth"
|
||||
#define DRV_MODULE_VERSION "V_01-00-02"
|
||||
#define DRV_MODULE_VERSION "V_01-00-03"
|
||||
#define TC956X_FW_MAX_SIZE (64*1024)
|
||||
|
||||
#define ATR_AXI4_SLV_BASE 0x0800
|
||||
@ -166,7 +169,7 @@
|
||||
#define SYSTCIK_SRAM_OFFSET 0x4F83C
|
||||
|
||||
/* Tx Timer count SRAM address DMEM addrs 0x2000F844, Check this value for any change */
|
||||
#define TX_TIMER_SRAM_OFFSET_0 0x4F844
|
||||
#define TX_TIMER_SRAM_OFFSET_0 0x4F844
|
||||
|
||||
/* Tx Timer count SRAM address DMEM addrs 0x2000F848, Check this value for any change */
|
||||
#define TX_TIMER_SRAM_OFFSET_1 0x4F848
|
||||
@ -188,7 +191,7 @@
|
||||
/* Only SGMII and USXGMII allowed for Port0 */
|
||||
#define PORT0_INTERFACE ENABLE_USXGMII_INTERFACE
|
||||
//#define PORT0_INTERFACE ENABLE_SGMII_INTERFACE
|
||||
#define PORT1_INTERFACE ENABLE_RGMII_INTERFACE
|
||||
#define PORT1_INTERFACE ENABLE_SGMII_INTERFACE
|
||||
|
||||
#define INTERFACE_SELECTED(p) (((p) == RM_PF0_ID) ? (PORT0_INTERFACE) : (PORT1_INTERFACE))
|
||||
|
||||
@ -450,7 +453,7 @@ struct tc956xmac_priv {
|
||||
#endif
|
||||
unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS_TC956X
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
struct dentry *dbgfs_dir;
|
||||
#endif
|
||||
|
||||
|
||||
@ -863,13 +863,12 @@ tc956xmac_ethtool_set_link_ksettings(struct net_device *dev,
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef TC956X_USXGMII_XFI_MODE
|
||||
/* In case of AQR phy, auto negotiation OFF is not supported, return error for it */
|
||||
/* Return if Autonegotiation disabled */
|
||||
if (priv->port_num == RM_PF0_ID) {
|
||||
if (cmd->base.autoneg != AUTONEG_ENABLE)
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (!dev->phydev)
|
||||
return -ENODEV;
|
||||
return phylink_ethtool_ksettings_set(priv->phylink, cmd);
|
||||
|
||||
277
tc956xmac_main.c
277
tc956xmac_main.c
@ -36,6 +36,9 @@
|
||||
* VERSION : 01-00-01
|
||||
* 15 Jul 2021 : 1. USXGMII/XFI/SGMII/RGMII interface supported without module parameter
|
||||
* VERSION : 01-00-02
|
||||
* 20 Jul 2021 : 1. Flash MDIO ioctl supported
|
||||
* 2. Rxp statistics function removed
|
||||
* VERSION : 01-00-03
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
@ -55,6 +58,10 @@
|
||||
#include <linux/slab.h>
|
||||
#include <linux/prefetch.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#endif /* CONFIG_DEBUG_FS */
|
||||
#include <linux/net_tstamp.h>
|
||||
#include <linux/phylink.h>
|
||||
#include <linux/udp.h>
|
||||
@ -69,11 +76,6 @@
|
||||
#include "hwif.h"
|
||||
#include "common.h"
|
||||
#include "tc956xmac_ioctl.h"
|
||||
#include "tc956x_ipa_intf.h"
|
||||
#ifdef CONFIG_DEBUG_FS_TC956X
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#endif /* CONFIG_DEBUG_FS_TC956X */
|
||||
|
||||
#ifdef TC956X_PCIE_LOGSTAT
|
||||
#include "tc956x_pcie_logstat.h"
|
||||
@ -140,7 +142,7 @@ MODULE_PARM_DESC(chain_mode, "To use chain instead of ring mode");
|
||||
|
||||
static irqreturn_t tc956xmac_interrupt(int irq, void *dev_id);
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS_TC956X
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
static const struct net_device_ops tc956xmac_netdev_ops;
|
||||
static void tc956xmac_init_fs(struct net_device *dev);
|
||||
static void tc956xmac_exit_fs(struct net_device *dev);
|
||||
@ -186,98 +188,6 @@ static uint16_t mdio_bus_id;
|
||||
#define CONFIG_PARAM_NUM ARRAY_SIZE(config_param_list)
|
||||
int tc956xmac_rx_parser_configuration(struct tc956xmac_priv *);
|
||||
|
||||
#ifdef DUMP_REGISTER
|
||||
void dump_registers(struct tc956xmac_priv *priv)
|
||||
{
|
||||
u32 i, j;
|
||||
|
||||
/* Register dump */
|
||||
printk("CNFREG dump\n");
|
||||
|
||||
for (i = 0; i <= 0x1800; i = i+4)
|
||||
printk("CNFREG 0x4000_%.4x = 0x%x\n", i, readl(priv->ioaddr + i));
|
||||
|
||||
printk("--------------------------------------------------------\n");
|
||||
printk("PMATOP register dump\n");
|
||||
|
||||
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x441b8, readl(priv->ioaddr + 0x441b8));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x45888, readl(priv->ioaddr + 0x45888));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x45890, readl(priv->ioaddr + 0x45890));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x45898, readl(priv->ioaddr + 0x45898));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x458a0, readl(priv->ioaddr + 0x458a0));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x458a8, readl(priv->ioaddr + 0x458a8));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x45080, readl(priv->ioaddr + 0x45080));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x45090, readl(priv->ioaddr + 0x45090));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x45094, readl(priv->ioaddr + 0x45094));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x450a4, readl(priv->ioaddr + 0x450a4));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x450a8, readl(priv->ioaddr + 0x450a8));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x450b8, readl(priv->ioaddr + 0x450b8));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x450bc, readl(priv->ioaddr + 0x450bc));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x450cc, readl(priv->ioaddr + 0x450cc));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x450d0, readl(priv->ioaddr + 0x450d0));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", 0x450e0, readl(priv->ioaddr + 0x450e0));
|
||||
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_GL_PM_CFG0, readl(priv->pmaaddr + XGMAC_PMA_GL_PM_CFG0));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_CFG_0_1_R0, readl(priv->pmaaddr + XGMAC_PMA_CFG_0_1_R0));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_CFG_0_1_R1, readl(priv->pmaaddr + XGMAC_PMA_CFG_0_1_R1));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_CFG_0_1_R2, readl(priv->pmaaddr + XGMAC_PMA_CFG_0_1_R2));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_CFG_0_1_R3, readl(priv->pmaaddr + XGMAC_PMA_CFG_0_1_R3));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_CFG_0_1_R4, readl(priv->pmaaddr + XGMAC_PMA_CFG_0_1_R4));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_EN_R0, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_EN_R0));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_TERM_EN_R0, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_TERM_EN_R0));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_R_EN_R1, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_R_EN_R1));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_TERM_EN_R1, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_TERM_EN_R1));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_R_EN_R2, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_R_EN_R2));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_TERM_EN_R2, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_TERM_EN_R2));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_R_EN_R3, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_R_EN_R3));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_TERM_EN_R3, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_TERM_EN_R3));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_R_EN_R4, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_R_EN_R4));
|
||||
printk("PMATOP Reg 0x%x = 0x%x\n", XGMAC_PMA_HWT_REFCK_TERM_EN_R4, readl(priv->pmaaddr + XGMAC_PMA_HWT_REFCK_TERM_EN_R4));
|
||||
|
||||
printk("--------------------------------------------------------\n");
|
||||
printk("XPCS register dump\n");
|
||||
|
||||
printk("XPCS Reg 0x%x = 0x%x\n", XGMAC_SR_MII_CTRL, tc956x_xpcs_read(priv->xpcsaddr, XGMAC_SR_MII_CTRL));
|
||||
printk("XPCS Reg 0x%x = 0x%x\n", XGMAC_VR_MII_AN_CTRL, tc956x_xpcs_read(priv->xpcsaddr, XGMAC_VR_MII_AN_CTRL));
|
||||
printk("XPCS Reg 0x%x = 0x%x\n", XGMAC_VR_MII_DIG_CTRL1, tc956x_xpcs_read(priv->xpcsaddr, XGMAC_VR_MII_DIG_CTRL1));
|
||||
printk("XPCS Reg 0x%x = 0x%x\n", XGMAC_SR_XS_PCS_CTRL2, tc956x_xpcs_read(priv->xpcsaddr, XGMAC_SR_XS_PCS_CTRL2));
|
||||
printk("XPCS Reg 0x%x = 0x%x\n", XGMAC_VR_XS_PCS_DIG_CTRL1, tc956x_xpcs_read(priv->xpcsaddr, XGMAC_VR_XS_PCS_DIG_CTRL1));
|
||||
printk("XPCS Reg 0x%x = 0x%x\n", XGMAC_VR_XS_PCS_KR_CTRL, tc956x_xpcs_read(priv->xpcsaddr, XGMAC_VR_XS_PCS_KR_CTRL));
|
||||
printk("XPCS Reg 0x%x = 0x%x\n", XGMAC_VR_MII_AN_INTR_STS, tc956x_xpcs_read(priv->xpcsaddr, XGMAC_VR_MII_AN_INTR_STS));
|
||||
|
||||
printk("--------------------------------------------------------\n");
|
||||
|
||||
printk("XGMAC-MAC register dump\n");
|
||||
|
||||
for (i = 0; i <= 0x810; i = i+4)
|
||||
printk("XGMAC MAC Reg 0x400%.5x = 0x%x\n", MAC_OFFSET + i, readl(priv->ioaddr + MAC_OFFSET + i));
|
||||
|
||||
printk("--------------------------------------------------------\n");
|
||||
|
||||
printk("XGMAC-MTL register dump\n");
|
||||
for (i = 0x1000; i <= 0x10B4; i = i+4)
|
||||
printk("XGMAC MTL Reg 0x400%.5x = 0x%x\n", MAC_OFFSET + i, readl(priv->ioaddr + MAC_OFFSET + i));
|
||||
|
||||
for (i = 0x1100; i <= 0x1174; i = i+4) {
|
||||
for (j = 0; j < 2; j++)
|
||||
printk("XGMAC MTL Reg 0x400%.5x = 0x%x\n", MAC_OFFSET + i + (j*0x80), readl(priv->ioaddr + MAC_OFFSET + i + (j*0x80) ));
|
||||
}
|
||||
|
||||
printk("--------------------------------------------------------\n");
|
||||
|
||||
printk("XGMAC-DMA register dump\n");
|
||||
for (i = 0x3000; i <= 0x3084; i = i+4)
|
||||
printk("XGMAC DMA Reg 0x400%.5x = 0x%x\n", MAC_OFFSET + i, readl(priv->ioaddr + MAC_OFFSET + i));
|
||||
|
||||
for (i = 0x3100; i <= 0x317c; i = i+4) {
|
||||
for (j = 0; j < 2; j++)
|
||||
printk("XGMAC DMA Reg 0x400%.5x = 0x%x\n", MAC_OFFSET + i + (j*0x80), readl(priv->ioaddr + MAC_OFFSET + i + (j*0x80) ));
|
||||
}
|
||||
printk("--------------------------------------------------------\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* tc956xmac_verify_args - verify the driver parameters.
|
||||
* Description: it checks the driver parameters and set a default in case of
|
||||
@ -1558,7 +1468,6 @@ static void tc956xmac_mac_config(struct phylink_config *config, unsigned int mod
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
tc956x_xpcs_write(priv->xpcsaddr, XGMAC_SR_MII_CTRL, val);
|
||||
|
||||
/* USRA_RST set to 1 */
|
||||
@ -3060,6 +2969,7 @@ static int tc956xmac_napi_check(struct tc956xmac_priv *priv, u32 chan)
|
||||
#ifdef TX_COMPLETION_WITHOUT_TIMERS
|
||||
writel(0, priv->tc956x_SRAM_pci_base_addr
|
||||
+ TX_TIMER_SRAM_OFFSET(priv->port_num));
|
||||
|
||||
#endif
|
||||
if (napi_schedule_prep(&ch->tx_napi)) {
|
||||
spin_lock_irqsave(&ch->lock, flags);
|
||||
@ -3291,7 +3201,7 @@ static void tc956xmac_tx_timer(struct timer_list *t)
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/**
|
||||
* tc956xmac_init_coalesce - init mitigation options.
|
||||
@ -3310,7 +3220,7 @@ static void tc956xmac_init_coalesce(struct tc956xmac_priv *priv)
|
||||
priv->tx_coal_frames = TC956XMAC_TX_FRAMES;
|
||||
priv->tx_coal_timer = TC956XMAC_COAL_TX_TIMER;
|
||||
priv->rx_coal_frames = TC956XMAC_RX_FRAMES;
|
||||
|
||||
|
||||
#ifdef ENABLE_TX_TIMER
|
||||
for (chan = 0; chan < tx_channel_count; chan++) {
|
||||
struct tc956xmac_tx_queue *tx_q = &priv->tx_queue[chan];
|
||||
@ -3895,9 +3805,9 @@ static int tc956xmac_open(struct net_device *dev)
|
||||
KPRINT_INFO("%s Enable SW MSI", __func__);
|
||||
rd_val |= (1 << MSI_INT_SW_MSI);
|
||||
|
||||
/*Clear SW MSI*/
|
||||
/*Clear SW MSI*/
|
||||
writel(1, priv->ioaddr + TC956X_MSI_SW_MSI_CLR(priv->port_num));
|
||||
|
||||
|
||||
#endif
|
||||
writel(rd_val, priv->ioaddr + TC956X_MSI_OUT_EN_OFFSET(priv->port_num)); /* MSI_OUT_EN: Enable All mac int */
|
||||
|
||||
@ -4007,6 +3917,7 @@ static int tc956xmac_release(struct net_device *dev)
|
||||
#ifdef TX_COMPLETION_WITHOUT_TIMERS
|
||||
writel(0, priv->tc956x_SRAM_pci_base_addr
|
||||
+ TX_TIMER_SRAM_OFFSET(priv->port_num));
|
||||
|
||||
#endif
|
||||
if (priv->eee_enabled)
|
||||
del_timer_sync(&priv->eee_ctrl_timer);
|
||||
@ -4392,7 +4303,7 @@ static netdev_tx_t tc956xmac_tso_xmit(struct sk_buff *skb, struct net_device *de
|
||||
|
||||
tx_q->tx_tail_addr = tx_q->dma_tx_phy + (tx_q->cur_tx * desc_size);
|
||||
tc956xmac_set_tx_tail_ptr(priv, priv->ioaddr, tx_q->tx_tail_addr, queue);
|
||||
#ifdef ENABLE_TX_TIMER
|
||||
#ifdef ENABLE_TX_TIMER
|
||||
tc956xmac_tx_timer_arm(priv, queue);
|
||||
#endif
|
||||
|
||||
@ -4736,7 +4647,7 @@ static netdev_tx_t tc956xmac_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
tx_q->tx_tail_addr = tx_q->dma_tx_phy + (tx_q->cur_tx * desc_size);
|
||||
tc956xmac_set_tx_tail_ptr(priv, priv->ioaddr, tx_q->tx_tail_addr, queue);
|
||||
|
||||
#ifdef ENABLE_TX_TIMER
|
||||
#ifdef ENABLE_TX_TIMER
|
||||
tc956xmac_tx_timer_arm(priv, queue);
|
||||
#endif
|
||||
|
||||
@ -5349,7 +5260,7 @@ static irqreturn_t tc956xmac_interrupt(int irq, void *dev_id)
|
||||
if (tc956xmac_safety_feat_interrupt(priv))
|
||||
return IRQ_HANDLED;
|
||||
|
||||
val = readl(priv->ioaddr + TC956X_MSI_INT_STS_OFFSET(priv->port_num));
|
||||
val = readl(priv->ioaddr + TC956X_MSI_INT_STS_OFFSET(priv->port_num));
|
||||
|
||||
priv->xstats.total_interrupts++;
|
||||
|
||||
@ -5358,22 +5269,22 @@ static irqreturn_t tc956xmac_interrupt(int irq, void *dev_id)
|
||||
|
||||
if (val & (1 << 1))
|
||||
priv->xstats.pmt_intr_n++;
|
||||
|
||||
|
||||
if (val & (1 << 2))
|
||||
priv->xstats.event_intr_n++;
|
||||
|
||||
|
||||
if (val & (0xFF << 3))
|
||||
priv->xstats.tx_intr_n++;
|
||||
|
||||
|
||||
if (val & (0xFF << 11))
|
||||
priv->xstats.rx_intr_n++;
|
||||
|
||||
|
||||
if (val & (1 << 19))
|
||||
priv->xstats.xpcs_intr_n++;
|
||||
|
||||
|
||||
if (val & (1 << 20))
|
||||
priv->xstats.phy_intr_n++;
|
||||
|
||||
|
||||
if (val & (1 << 24))
|
||||
priv->xstats.sw_msi_n++;
|
||||
|
||||
@ -5423,12 +5334,12 @@ static irqreturn_t tc956xmac_interrupt(int irq, void *dev_id)
|
||||
if (val & TC956X_SW_MSI_INT) {
|
||||
//DBGPR_FUNC(priv->device, "%s SW MSI INT STS[%08x]\n", __func__, val);
|
||||
|
||||
/*Clear SW MSI*/
|
||||
/*Clear SW MSI*/
|
||||
writel(1, priv->ioaddr + TC956X_MSI_SW_MSI_CLR(priv->port_num));
|
||||
|
||||
|
||||
val = readl(priv->ioaddr + TC956X_MSI_SW_MSI_CLR(priv->port_num));
|
||||
|
||||
//DBGPR_FUNC(priv->device, "%s SW MSI INT CLR[%08x]\n", __func__, val);
|
||||
//DBGPR_FUNC(priv->device, "%s SW MSI INT CLR[%08x]\n", __func__, val);
|
||||
|
||||
}
|
||||
#endif
|
||||
@ -8753,6 +8664,48 @@ static int tc956xmac_extension_ioctl(struct tc956xmac_priv *priv,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tc956xmac_phy_fw_flash_mdio_ioctl(struct net_device *ndev,
|
||||
struct ifreq *ifr, int cmd)
|
||||
{
|
||||
struct mii_ioctl_data *mii = if_mii(ifr);
|
||||
struct tc956xmac_priv *priv = netdev_priv(ndev);
|
||||
|
||||
int ret = -EINVAL;
|
||||
int prtad, devad;
|
||||
|
||||
if (mdio_phy_id_is_c45(mii->phy_id)) {
|
||||
prtad = mdio_phy_id_prtad(mii->phy_id);
|
||||
devad = mdio_phy_id_devad(mii->phy_id);
|
||||
devad = MII_ADDR_C45 | devad << 16 | mii->reg_num;
|
||||
} else {
|
||||
prtad = mii->phy_id;
|
||||
devad = mii->reg_num;
|
||||
}
|
||||
|
||||
switch (cmd) {
|
||||
case SIOCGMIIPHY:
|
||||
mii->phy_id = 0;
|
||||
/* fall through */
|
||||
|
||||
case SIOCGMIIREG:
|
||||
ret = priv->mii->read(priv->mii, prtad, devad);
|
||||
if (ret >= 0) {
|
||||
mii->val_out = ret;
|
||||
ret = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case SIOCSMIIREG:
|
||||
ret = priv->mii->write(priv->mii, prtad, devad,
|
||||
mii->val_in);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* tc956xmac_ioctl - Entry point for the Ioctl
|
||||
@ -8769,8 +8722,9 @@ static int tc956xmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
|
||||
int ret = -EOPNOTSUPP;
|
||||
struct mii_ioctl_data *data = if_mii(rq);
|
||||
|
||||
if (!netif_running(dev))
|
||||
return -EINVAL;
|
||||
if (!netif_running(dev)) {
|
||||
return tc956xmac_phy_fw_flash_mdio_ioctl(dev, rq, cmd);
|
||||
}
|
||||
|
||||
switch (cmd) {
|
||||
case SIOCGMIIPHY:
|
||||
@ -8930,73 +8884,9 @@ static int tc956xmac_set_mac_address(struct net_device *ndev, void *addr)
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS_TC956X
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
static struct dentry *tc956xmac_fs_dir;
|
||||
|
||||
int read_rxp_stats(struct file *file, char __user *user_buf, size_t count, loff_t *ppos)
|
||||
{
|
||||
int i;
|
||||
unsigned int buf_len = 4000;
|
||||
unsigned int len = 0;
|
||||
char *buf;
|
||||
ssize_t ret_cnt;
|
||||
struct tc956xmac_priv *priv = file->private_data;
|
||||
struct tc956xmac_rx_parser_cfg *cfg;
|
||||
if (!priv) {
|
||||
printk(KERN_ERR "%s, Error: priv is null\n", __func__);
|
||||
return count;
|
||||
}
|
||||
|
||||
cfg = &priv->plat->rxp_cfg;
|
||||
if (!cfg) {
|
||||
printk(KERN_ERR "%s, Error: cfg is null\n", __func__);
|
||||
return count;
|
||||
}
|
||||
|
||||
buf = kzalloc(buf_len, GFP_KERNEL);
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"\n************* READ RXP STATS *************\n");
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "est_enabled = %x \n", priv->rxp_enabled);
|
||||
len += scnprintf(buf + len, buf_len - len, "frpes = %x \n", priv->dma_cap.frpes);
|
||||
len += scnprintf(buf + len, buf_len - len, "nve = %x \n", cfg->nve);
|
||||
len += scnprintf(buf + len, buf_len - len, "npe = %x \n", cfg->npe);
|
||||
|
||||
for(i = 0; i < cfg->nve; i++ ) {
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].match_data= %x \n", i, cfg->entries[i].match_data);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].match_en= %x \n",i,cfg->entries[i].match_en);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].af = %x \n",i,cfg->entries[i].af);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].rf = %x \n",i,cfg->entries[i].rf);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].im = %x \n",i,cfg->entries[i].im);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].nc = %x \n",i,cfg->entries[i].nc);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].res1 = %x \n",i,cfg->entries[i].res1);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].frame_offset= %x \n",i,cfg->entries[i].frame_offset);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].ok_index= %x \n",i,cfg->entries[i].ok_index);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].dma_ch_no= %x \n",i,cfg->entries[i].dma_ch_no);
|
||||
len += scnprintf(buf + len, buf_len - len, "cfg.entries[%d].res2= %x \n",i,cfg->entries[i].res2);
|
||||
}
|
||||
ret_cnt = simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
kfree(buf);
|
||||
return ret_cnt;
|
||||
}
|
||||
|
||||
#ifdef DMA_OFFLOAD_ENABLE
|
||||
static const struct file_operations tc956xmac_ipa_stats_fops = {
|
||||
.read = read_ipa_desc_stats,
|
||||
.open = simple_open,
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
#endif
|
||||
static const struct file_operations tc956xmac_rxp_stats_fops = {
|
||||
.read = read_rxp_stats,
|
||||
.open = simple_open,
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
#ifdef TC956X_UNSUPPORTED_UNTESETD_FEATURE
|
||||
static void sysfs_display_ring(void *head, int size, int extend_desc,
|
||||
struct seq_file *seq)
|
||||
@ -9206,15 +9096,14 @@ static struct notifier_block tc956xmac_notifier = {
|
||||
.notifier_call = tc956xmac_device_event,
|
||||
};
|
||||
#endif
|
||||
|
||||
static void tc956xmac_init_fs(struct net_device *dev)
|
||||
{
|
||||
struct tc956xmac_priv *priv = netdev_priv(dev);
|
||||
|
||||
#ifndef TC956X
|
||||
/* Create per netdev entries */
|
||||
priv->dbgfs_dir = debugfs_create_dir(dev->name, tc956xmac_fs_dir);
|
||||
|
||||
#ifndef TC956X
|
||||
/* Entry to report DMA RX/TX rings */
|
||||
debugfs_create_file("descriptors_status", 0444, priv->dbgfs_dir, dev,
|
||||
&tc956xmac_rings_status_fops);
|
||||
@ -9224,14 +9113,6 @@ static void tc956xmac_init_fs(struct net_device *dev)
|
||||
&tc956xmac_dma_cap_fops);
|
||||
|
||||
register_netdevice_notifier(&tc956xmac_notifier);
|
||||
#else
|
||||
priv->dbgfs_dir = debugfs_create_dir(dev->name, NULL);
|
||||
#ifdef DMA_OFFLOAD_ENABLE
|
||||
debugfs_create_file("ipa_stats", S_IRUSR, priv->dbgfs_dir, priv,
|
||||
&tc956xmac_ipa_stats_fops);
|
||||
#endif
|
||||
debugfs_create_file("rxp_stats", S_IRUSR, priv->dbgfs_dir, priv,
|
||||
&tc956xmac_rxp_stats_fops);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -9243,7 +9124,7 @@ static void tc956xmac_exit_fs(struct net_device *dev)
|
||||
#endif
|
||||
debugfs_remove_recursive(priv->dbgfs_dir);
|
||||
}
|
||||
#endif /* CONFIG_DEBUG_FS_TC956X */
|
||||
#endif /* CONFIG_DEBUG_FS */
|
||||
|
||||
#ifndef TC956X
|
||||
static u32 tc956xmac_vid_crc32_le(__le16 vid_le)
|
||||
@ -9672,6 +9553,7 @@ static void parse_config_file(void)
|
||||
KPRINT_INFO("Using Default MAC Address\n");
|
||||
return;
|
||||
} else {
|
||||
|
||||
cdata = data;
|
||||
/* Parse the file */
|
||||
for (i = 0; i < CONFIG_PARAM_NUM; i++) {
|
||||
@ -10110,9 +9992,10 @@ int tc956xmac_dvr_probe(struct device *device,
|
||||
goto error_netdev_register;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS_TC956X
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
tc956xmac_init_fs(ndev);
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
|
||||
error_netdev_register:
|
||||
@ -10156,7 +10039,7 @@ int tc956xmac_dvr_remove(struct device *dev)
|
||||
|
||||
netdev_info(priv->dev, "%s: removing driver", __func__);
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS_TC956X
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
tc956xmac_exit_fs(ndev);
|
||||
#endif
|
||||
tc956xmac_stop_all_dma(priv);
|
||||
@ -10449,7 +10332,7 @@ __setup("tc956xmaceth=", tc956xmac_cmdline_opt);
|
||||
#ifdef TC956X
|
||||
int tc956xmac_init(void)
|
||||
{
|
||||
#ifdef CONFIG_DEBUG_FS_TC956X
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
/* Create debugfs main directory if it doesn't exist yet */
|
||||
if (!tc956xmac_fs_dir)
|
||||
tc956xmac_fs_dir = debugfs_create_dir(TC956X_RESOURCE_NAME, NULL);
|
||||
@ -10460,7 +10343,7 @@ int tc956xmac_init(void)
|
||||
|
||||
void tc956xmac_exit(void)
|
||||
{
|
||||
#ifdef CONFIG_DEBUG_FS_TC956X
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
debugfs_remove_recursive(tc956xmac_fs_dir);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -34,6 +34,8 @@
|
||||
* 05 Jul 2021 : 1. Used Systick handler instead of Driver kernel timer to process transmitted Tx descriptors.
|
||||
* 2. XFI interface support and module parameters for selection of Port0 and Port1 interface
|
||||
* VERSION : 01-00-01
|
||||
* 20 Jul 2021 : 1. MAX C22 address changed to 3. Print not corrected for C45 PHY selection
|
||||
* VERSION : 01-00-03
|
||||
*/
|
||||
|
||||
#include <linux/gpio/consumer.h>
|
||||
@ -65,7 +67,7 @@
|
||||
#define MII_XGMAC_WRITE (1 << MII_XGMAC_CMD_SHIFT)
|
||||
#define MII_XGMAC_READ (3 << MII_XGMAC_CMD_SHIFT)
|
||||
#define MII_XGMAC_BUSY BIT(22)
|
||||
#define MII_XGMAC_MAX_C22ADDR 31
|
||||
#define MII_XGMAC_MAX_C22ADDR 3
|
||||
#define MII_XGMAC_C22P_MASK GENMASK(MII_XGMAC_MAX_C22ADDR, 0)
|
||||
#define MII_XGMAC_PA_SHIFT 16
|
||||
#define MII_XGMAC_DA_SHIFT 21
|
||||
@ -92,8 +94,13 @@ static int tc956xmac_xgmac2_c22_format(struct tc956xmac_priv *priv, int phyaddr,
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
/* HW does not support C22 addr >= 4 */
|
||||
//if (phyaddr > MII_XGMAC_MAX_C22ADDR)
|
||||
//return -ENODEV;
|
||||
|
||||
/* Set port as Clause 22 */
|
||||
tmp = readl(priv->ioaddr + XGMAC_MDIO_C22P);
|
||||
//tmp &= ~MII_XGMAC_C22P_MASK;
|
||||
tmp |= BIT(phyaddr);
|
||||
writel(tmp, priv->ioaddr + XGMAC_MDIO_C22P);
|
||||
|
||||
@ -491,14 +498,11 @@ int tc956xmac_mdio_register(struct net_device *ndev)
|
||||
phy_reg_read = tc956xmac_xgmac2_mdio_read(new_bus, addr, MII_BMSR);
|
||||
#endif
|
||||
|
||||
if (phy_reg_read != -EBUSY) {
|
||||
if (phy_reg_read != -EBUSY && phy_reg_read != -ENODEV) {
|
||||
if (phy_reg_read != 0x0000 && phy_reg_read != 0xffff) {
|
||||
if (priv->plat->c45_needed == true)
|
||||
NMSGPR_ALERT(priv->device,
|
||||
"TC956X: Phy detected C45 at ID/ADDR %d\n", addr);
|
||||
else
|
||||
NMSGPR_ALERT(priv->device,
|
||||
NMSGPR_ALERT(priv->device,
|
||||
"TC956X: Phy detected C22 at ID/ADDR %d\n", addr);
|
||||
|
||||
#else
|
||||
struct phy_device *phydev = mdiobus_get_phy(new_bus, addr);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user