V_01-00-44
1. XPCS module is re-initialized after link-up as MACxPONRST is asserted during link-down. 2. Disable Rx side EEE LPI before configuring Rx Parser (FRP). Enable the same after Rx Parser configuration.
This commit is contained in:
TC956X
jianzhou
parent
bfc5c6175c
commit
fdc5571751
@ -1,7 +1,7 @@
|
||||
# Toshiba Electronic Devices & Storage Corporation TC956X PCIe Ethernet Host Driver
|
||||
Release Date: 22 Feb 2022
|
||||
Release Date: 25 Feb 2022
|
||||
|
||||
Release Version: V_01-00-43 : Limited-tested version
|
||||
Release Version: V_01-00-44 : Limited-tested version
|
||||
|
||||
TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
|
||||
|
||||
@ -468,3 +468,7 @@ TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
|
||||
|
||||
1. Supported GPIO configuration save and restoration.
|
||||
|
||||
## TC956X_Host_Driver_20220225_V_01-00-44:
|
||||
|
||||
1. XPCS module is re-initialized after link-up as MACxPONRST is asserted during link-down.
|
||||
2. Disable Rx side EEE LPI before configuring Rx Parser (FRP). Enable the same after Rx Parser configuration.
|
||||
|
||||
@ -145,6 +145,8 @@
|
||||
* 22 Feb 2022 : 1. GPIO configuration restoration supported during resume.
|
||||
* 2. Version update
|
||||
* VERSION : 01-00-43
|
||||
* 25 Feb 2022 : 1. Version update
|
||||
* VERSION : 01-00-44
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
@ -209,7 +211,7 @@ static unsigned int mac1_txq1_size = TX_QUEUE1_SIZE;
|
||||
unsigned int mac0_en_lp_pause_frame_cnt = DISABLE;
|
||||
unsigned int mac1_en_lp_pause_frame_cnt = DISABLE;
|
||||
|
||||
static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 4, 3};
|
||||
static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 4, 4};
|
||||
|
||||
static int tc956xmac_pm_usage_counter; /* Device Usage Counter */
|
||||
struct mutex tc956x_pm_suspend_lock; /* This mutex is shared between all available EMAC ports. */
|
||||
|
||||
@ -37,6 +37,8 @@
|
||||
* VERSION : 01-00-04
|
||||
* 26 Oct 2021 : 1. Added EEE configration for PHY and MAC Controlled Mode.
|
||||
* VERSION : 01-00-19
|
||||
* 25 Feb 2022 : 1. Helper function added for XPCS Rx LPI enable/disable
|
||||
* VERSION : 01-00-44
|
||||
*/
|
||||
|
||||
#include "common.h"
|
||||
@ -227,4 +229,26 @@ void tc956x_xpcs_ctrl_ane(struct tc956xmac_priv *priv, bool ane)
|
||||
}
|
||||
tc956x_xpcs_write(priv->xpcsaddr, XGMAC_SR_MII_CTRL, reg_value);
|
||||
}
|
||||
|
||||
/**
|
||||
* tc956x_xpcs_ctrl0_lrx - to configure XPCS LPI Rx Enable bit
|
||||
* @priv: driver private structure
|
||||
* @lrx : true to enable, false to disable
|
||||
* @remarks : -
|
||||
*/
|
||||
void tc956x_xpcs_ctrl0_lrx(struct tc956xmac_priv *priv, bool lrx)
|
||||
{
|
||||
u32 reg_value;
|
||||
|
||||
reg_value = tc956x_xpcs_read(priv->xpcsaddr, XGMAC_VR_XS_PCS_EEE_MCTRL0);
|
||||
if (lrx) {
|
||||
reg_value |= XGMAC_EEE_LRX_EN;
|
||||
KPRINT_INFO("%s Enable XPCS LPI Rx\n", __func__);
|
||||
} else {
|
||||
reg_value &= (~XGMAC_EEE_LRX_EN);
|
||||
KPRINT_INFO("%s Disable XPCS LPI Rx\n", __func__);
|
||||
}
|
||||
|
||||
tc956x_xpcs_write(priv->xpcsaddr, XGMAC_VR_XS_PCS_EEE_MCTRL0, reg_value);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -35,6 +35,8 @@
|
||||
* VERSION : 01-00-02
|
||||
* 26 Oct 2021 : 1. Added EEE macros for PHY and MAC Controlled Mode.
|
||||
* VERSION : 01-00-19
|
||||
* 25 Feb 2022 : 1. Helper function added for XPCS Rx LPI enable/disable
|
||||
* VERSION : 01-00-44
|
||||
*/
|
||||
|
||||
#ifndef __TC956X_XPCS_H__
|
||||
@ -109,7 +111,7 @@
|
||||
#define XGMAC_SR_MII_CTRL_SPEED_5G 0x00002020 /* SR_MII_CTRL SPEED: 5G */
|
||||
#define XGMAC_SR_MII_CTRL_SPEED_2_5G 0x00000020 /* SR_MII_CTRL SPEED: 5G */
|
||||
#define XGMAC_USRA_RST 0x400 /* USRA_RST */
|
||||
|
||||
#define XGMAC_EEE_LRX_EN BIT(1) /* LPI Rx Enable */
|
||||
|
||||
|
||||
#define XPCS_REG_BASE_ADDR 10
|
||||
@ -123,5 +125,5 @@ u32 tc956x_xpcs_read(void __iomem *xpcsaddr, u32 pcs_reg_num);
|
||||
u32 tc956x_xpcs_write(void __iomem *xpcsaddr, u32 pcs_reg_num, u32 value);
|
||||
void tc956x_xpcs_ctrl_ane(struct tc956xmac_priv *priv, bool ane);
|
||||
int tc956x_xpcs_init(struct tc956xmac_priv *priv, void __iomem *xpcsaddr);
|
||||
|
||||
void tc956x_xpcs_ctrl0_lrx(struct tc956xmac_priv *priv, bool lrx);
|
||||
#endif /* __TC956X_XPCS_H__ */
|
||||
|
||||
@ -135,6 +135,8 @@
|
||||
* 22 Feb 2022 : 1. Supported GPIO configuration save and restoration
|
||||
* 2. Version update.
|
||||
* VERSION : 01-00-43
|
||||
* 25 Feb 2022 : 1. Version update.
|
||||
* VERSION : 01-00-44
|
||||
*/
|
||||
|
||||
#ifndef __TC956XMAC_H__
|
||||
@ -190,7 +192,7 @@
|
||||
#define IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0") : ("eth1"))
|
||||
#define WOL_IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0_wol") : ("eth1_wol"))
|
||||
|
||||
#define DRV_MODULE_VERSION "V_01-00-43"
|
||||
#define DRV_MODULE_VERSION "V_01-00-44"
|
||||
#define TC956X_FW_MAX_SIZE (64*1024)
|
||||
|
||||
#define ATR_AXI4_SLV_BASE 0x0800
|
||||
|
||||
@ -109,6 +109,9 @@
|
||||
* VERSION : 01-00-42
|
||||
* 22 Feb 2022 : 1. Supported GPIO configuration save and restoration
|
||||
* VERSION : 01-00-43
|
||||
* 25 Feb 2022 : 1. XPCS module is re-initialized after link-up as MACxPONRST is asserted during link-down.
|
||||
* 2. Disable Rx side EEE LPI before configuring Rx Parser (FRP). Enable the same after Rx Parser configuration.
|
||||
* VERSION : 01-00-44
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
@ -6787,12 +6790,20 @@ int tc956xmac_rx_parser_configuration(struct tc956xmac_priv *priv)
|
||||
{
|
||||
int ret = -EINVAL;
|
||||
|
||||
/* Disable XPCS Rx LPI to configure FRP in EEE mode */
|
||||
if (priv->eee_enabled)
|
||||
tc956x_xpcs_ctrl0_lrx(priv, false);
|
||||
|
||||
if (priv->hw->mac->rx_parser_init && priv->plat->rxp_cfg.enable)
|
||||
ret = tc956xmac_rx_parser_init(priv,
|
||||
priv->dev, priv->hw, priv->dma_cap.spram,
|
||||
priv->dma_cap.frpsel, priv->dma_cap.frpes,
|
||||
&priv->plat->rxp_cfg);
|
||||
|
||||
/* Enable XPCS Rx LPI after configuring FRP in EEE mode */
|
||||
if (priv->eee_enabled)
|
||||
tc956x_xpcs_ctrl0_lrx(priv, true);
|
||||
|
||||
/* spram feautre is not present in TC956X */
|
||||
if (ret)
|
||||
priv->rxp_enabled = false;
|
||||
@ -11778,6 +11789,9 @@ static void tc956xmac_link_change_set_power(struct tc956xmac_priv *priv, enum TC
|
||||
void *nrst_reg = NULL, *nclk_reg = NULL, *commonrst_reg = NULL, *commonclk_reg = NULL;
|
||||
u32 nrst_val = 0, nclk_val = 0, commonrst_val = 0, commonclk_val = 0;
|
||||
static u32 pm_saved_cmn_linkdown_rst = 0, pm_saved_cmn_linkdown_clk = 0;
|
||||
int ret;
|
||||
bool enable_en = true;
|
||||
|
||||
KPRINT_INFO("-->%s : Port %d", __func__, priv->port_num);
|
||||
/* Select register address by port */
|
||||
if (priv->port_num == 0) {
|
||||
@ -11858,6 +11872,24 @@ static void tc956xmac_link_change_set_power(struct tc956xmac_priv *priv, enum TC
|
||||
|
||||
tc956xmac_link_down_counter--; /* Decrement Counter Only when this api called */
|
||||
priv->port_link_down = false;
|
||||
|
||||
/* Re-Init XPCS module as MACxPONRST is asserted during link-down */
|
||||
ret = tc956x_xpcs_init(priv, priv->xpcsaddr);
|
||||
if (ret < 0)
|
||||
KPRINT_INFO("XPCS initialization error\n");
|
||||
|
||||
/*C37 AN enable*/
|
||||
if (priv->plat->interface == PHY_INTERFACE_MODE_10GKR)
|
||||
enable_en = false;
|
||||
else if (priv->plat->interface == PHY_INTERFACE_MODE_SGMII) {
|
||||
if (priv->is_sgmii_2p5g == true)
|
||||
enable_en = false;
|
||||
else
|
||||
enable_en = true;
|
||||
} else
|
||||
enable_en = true;
|
||||
|
||||
tc956x_xpcs_ctrl_ane(priv, enable_en);
|
||||
}
|
||||
KPRINT_INFO("%s : Port %d Rd RST Reg:%x, CLK Reg:%x", __func__, priv->port_num,
|
||||
readl(nrst_reg), readl(nclk_reg));
|
||||
|
||||
Loading…
Reference in New Issue
Block a user