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V_01-00-38

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1. Set Clock control and Reset control register to default value on driver unload.
This commit is contained in:
TC956X 2022-01-24 17:27:15 +09:00 committed by jianzhou
parent 2eb41a9c15
commit 944beffbca
4 changed files with 43 additions and 4 deletions
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8
Readme.md
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@ -1,7 +1,7 @@
# Toshiba Electronic Devices & Storage Corporation TC956X PCIe Ethernet Host Driver
Release Date: 20 Jan 2022
Release Date: 24 Jan 2022
Release Version: V_01-00-37 : Limited-tested version
Release Version: V_01-00-38 : Limited-tested version
TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
@ -442,3 +442,7 @@ TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
1. Skip resume_config and reset eMAC if port unavailable (PHY not connected) during suspend-resume.
2. Restore clock after resume in set_power.
3. Shifted Queuing Work to end of resume to prevent MSI disable on resume.
## TC956X_Host_Driver_20220124_V_01-00-38:
1. Set Clock control and Reset control register to default value on driver unload.

11
common.h
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@ -71,6 +71,8 @@
* VERSION : 01-00-31
* 27 Dec 2021 : 1. Support for eMAC Reset and unused clock disable during Suspend and restoring it back during resume.
* VERSION : 01-00-32
* 24 Jan 2022 : 1. Set Clock control and Reset control register to default value on driver unload.
* VERSION : 01-00-38
*/
#ifndef __COMMON_H__
@ -672,6 +674,7 @@ enum packets_types {
#define NCLKCTRL0_INTCEN BIT(4)
#define NCLKCTRL0_MAC0TXCEN BIT(7)
#define NCLKCTRL0_PCIECEN BIT(9)
#define NCLKCTRL0_I2SSPIEN BIT(12)
#define NCLKCTRL0_SRMCEM BIT(13)
#define NCLKCTRL0_MAC0RXCEN BIT(14)
#define NCLKCTRL0_UARTOCEN BIT(16)
@ -687,6 +690,7 @@ enum packets_types {
#define NRSTCTRL0_INTRST BIT(4)
#define NRSTCTRL0_MAC0RST BIT(7)
#define NRSTCTRL0_PCIERST BIT(9)
#define NRSTCTRL0_UART0RST BIT(16)
#define NRSTCTRL0_MSIGENRST BIT(18)
#define NRSTCTRL0_MAC0PMARST BIT(30)
#define NRSTCTRL0_MAC0PONRST BIT(31)
@ -708,6 +712,13 @@ enum packets_types {
NCLKCTRL1_MAC1RMCEN | NCLKCTRL0_MAC0ALLCLKEN)
#define NCLKCTRL0_COMMON_EMAC_MASK (NCLKCTRL0_POEPLLCEN | NCLKCTRL0_SGMPCIEN | \
NCLKCTRL0_REFCLKOCEN)
#define NRSTCTRL0_DEFAULT (NRSTCTRL0_MAC0PONRST| NRSTCTRL0_MAC0PMARST | \
NRSTCTRL0_MSIGENRST | NRSTCTRL0_UART0RST | \
NRSTCTRL0_MAC0RST | NRSTCTRL0_INTRST | \
NRSTCTRL0_MCURST)
#define NCLKCTRL0_DEFAULT (NCLKCTRL0_SRMCEM | NCLKCTRL0_I2SSPIEN | \
NCLKCTRL0_PCIECEN | NCLKCTRL0_MCUCEN)
#define NBUSCTRL_OFFSET (0x1014)
#endif

24
tc956x_pci.c
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@ -131,6 +131,9 @@
3. Shifted Queuing Work to end of resume to prevent MSI disable on resume.
4. Version update
* VERSION : 01-00-37
* 24 Jan 2022 : 1. Set Clock control and Reset control register to default value on driver unload.
* 2. Version update
* VERSION : 01-00-38
*/
#include <linux/clk-provider.h>
@ -195,7 +198,7 @@ static unsigned int mac1_txq1_size = TX_QUEUE1_SIZE;
unsigned int mac0_en_lp_pause_frame_cnt = DISABLE;
unsigned int mac1_en_lp_pause_frame_cnt = DISABLE;
static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 3, 7};
static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 3, 8};
static int tc956xmac_pm_usage_counter; /* Device Usage Counter */
struct mutex tc956x_pm_suspend_lock; /* This mutex is shared between all available EMAC ports. */
@ -2721,6 +2724,8 @@ static void tc956xmac_pci_remove(struct pci_dev *pdev)
{
struct net_device *ndev = dev_get_drvdata(&pdev->dev);
struct tc956xmac_priv *priv = netdev_priv(ndev);
void *nrst_reg, *nclk_reg;
u32 nrst_val, nclk_val;
DBGPR_FUNC(&(pdev->dev), "-->%s\n", __func__);
@ -2735,6 +2740,23 @@ static void tc956xmac_pci_remove(struct pci_dev *pdev)
if (priv->plat->phy_addr != -1)
tc956xmac_dvr_remove(&pdev->dev);
/* Set reset value for CLK control and RESET Control registers */
if (priv->port_num == 0) {
nrst_reg = priv->tc956x_SFR_pci_base_addr + NRSTCTRL0_OFFSET;
nclk_reg = priv->tc956x_SFR_pci_base_addr + NCLKCTRL0_OFFSET;
nrst_val = NRSTCTRL0_DEFAULT;
nclk_val = NCLKCTRL0_DEFAULT;
} else {
nrst_reg = priv->tc956x_SFR_pci_base_addr + NRSTCTRL1_OFFSET;
nclk_reg = priv->tc956x_SFR_pci_base_addr + NCLKCTRL1_OFFSET;
nrst_val = NRSTCTRL_EMAC_MASK;
nclk_val = 0;
}
writel(nrst_val, nrst_reg);
writel(nclk_val, nclk_reg);
KPRINT_INFO("%s : Port %d Wr RST Reg:%x, CLK Reg:%x", __func__, priv->port_num,
readl(nrst_reg), readl(nclk_reg));
pdev->irq = 0;
/* Enable MSI Operation */

4
tc956xmac.h
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@ -120,6 +120,8 @@
* VERSION : 01-00-36
* 20 Jan 2022 : 1. Version update
* VERSION : 01-00-37
* 24 Jan 2022 : 1. Version update
* VERSION : 01-00-38
*/
#ifndef __TC956XMAC_H__
@ -175,7 +177,7 @@
#define IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0") : ("eth1"))
#define WOL_IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0_wol") : ("eth1_wol"))
#define DRV_MODULE_VERSION "V_01-00-37"
#define DRV_MODULE_VERSION "V_01-00-38"
#define TC956X_FW_MAX_SIZE (64*1024)
#define ATR_AXI4_SLV_BASE 0x0800