Commit Graph

48 Commits

Author SHA1 Message Date
TC956X
d052efb32a V_01-00-47
1. Disable MSI and flush phy work queue during driver release.
2024-02-03 18:25:16 -08:00
TC956X
d41713507e V_01-00-46
1. PCI bus info updated for ethtool get driver version.
2024-02-03 18:25:16 -08:00
TC956X
ea14eace3a V_01-00-45
1. Handling of Non S/W path DMA channel abnormal interrupts in Driver and only TI & RI interrupts handled in FW.
2. Reading MSI status for checking interrupt status of SW MSI.
2024-02-03 18:25:16 -08:00
TC956X
fdc5571751 V_01-00-44
1. XPCS module is re-initialized after link-up as MACxPONRST is asserted during link-down.
2. Disable Rx side EEE LPI before configuring Rx Parser (FRP). Enable the same after Rx Parser configuration.
2024-02-03 18:25:16 -08:00
TC956X
bfc5c6175c V_01-00-43
1. Supported GPIO configuration save and restoration.
2024-02-03 18:25:16 -08:00
TC956X
ffcc08ecdb V_01-00-42
1. Reset assert and clock disable support during Link Down.
2024-02-03 18:25:16 -08:00
TC956X
4d94d05dd1 V_01-00-41
1. DMA channel status cleared only for SW path allocated DMA channels. IPA path DMA channel status clearing is skipped.
2. Ethtool statistics added to print doorbell SRAM area for all the channels.
2024-02-03 18:25:16 -08:00
TC956X
b7b5fb6a60 V_01-00-40
1. Tx Queue flushed and checked for status after Tx DMA stop.
2024-02-03 18:25:16 -08:00
TC956X
15b711f756 V_01-00-39
1. Debug dump API supported to dump registers during crash.
2024-02-03 18:25:15 -08:00
TC956X
944beffbca V_01-00-38
1. Set Clock control and Reset control register to default value on driver unload.
2024-02-03 18:25:15 -08:00
TC956X
2eb41a9c15 V_01-00-37
1. Skip resume_config and reset eMAC if port unavailable (PHY not connected) during suspend-resume.
2. Restore clock after resume in set_power.
3. Shifted Queuing Work to end of resume to prevent MSI disable on resume.
2024-02-03 18:25:15 -08:00
TC956X
6fdf8ab2d7 V_01-00-36
1. IRQ device name modified to differentiate between WOL and EMAC interrupt IRQs
2024-02-03 18:25:15 -08:00
TC956X
3b4d9767c5 V_01-00-35
1. Fixed phy mode support
2. Error return when no phy driver found during ISR work queue execution
2024-02-03 18:25:15 -08:00
TC956X
8f8ea68fd4 V_01-00-34
1. During emac resume, attach the net device after initializing the queues
2024-02-03 18:25:15 -08:00
TC956X
e6417b1a08 V_01-00-33
1. Null check added while freeing skb buff data
2. Code comments corrected for flow control configuration
2024-02-03 18:25:15 -08:00
TC956X
1ef7c2a727 V_01-00-32
1. Support for eMAC Reset and unused clock disable during Suspend and restoring it back during resume.
2. Resetting and disabling of unused clocks for eMAC Port, when no-found PHY for that particular port.
3. Valid phy-address and mii-pointer NULL check in tc956xmac_suspend().
2024-02-03 18:25:15 -08:00
TC956X
8d5c1f128e V_01-00-31
1. Support for link partner pause frame counting.
2. Module parameter support to enable/disable link partner pause frame counting.
2024-02-03 18:25:15 -08:00
TC956X
a5e807500a V_01-00-30
1. Added module parameters for Rx Queue Size, Flow Control thresholds and Tx Queue Size configuration.
2. Renamed all module parameters for easy readability.
2024-02-03 18:25:15 -08:00
TC956X
63bead311e 01-00-29
1. Max C22/C45 PHY address changed to PHY_MAX_ADDR.
2. Added error check for phydev in tc956xmac_suspend().
2024-02-03 18:25:15 -08:00
TC956X
b25d65f4a9 V_01-00-28
1. Resetting SRAM Region before loading firmware.
2024-02-03 18:25:15 -08:00
TC956X
cc59e94282 V_01-00-27
1. Free EMAC IRQ during suspend and request EMAC IRQ during resume.
2024-02-03 18:25:15 -08:00
TC956X
9c6c249025 V_01-00-26
1. Added PHY Workqueue Cancel during suspend only if network interface available.
2024-02-03 18:25:15 -08:00
TC956X
73836258d0 V_01-00-25
1. Print message correction for PCIe BAR size and Physical Address.
2024-02-03 18:25:14 -08:00
TC956X
cfb73b838f V_01-00-24
1. Runtime configuration of EEE supported and LPI interrupts disabled by default.
2. Module param added to configure EEE and LPI timer.
3. Driver name corrected in ethtool display.
2024-02-03 18:25:14 -08:00
TC956X
941a48f811 V_01-00-23
1. Restricted MDIO access when no PHY found or MDIO registration fails
2. Added mdio lock for making mii bus of private member to null to avoid parallel accessing to MDIO bus
2024-02-03 18:25:14 -08:00
TC956X
eb3a5a9afc V_01-00-22
1. Single port Suspend/Resume supported
2024-02-03 18:25:14 -08:00
TC956X
e0d730ce66 V_01-00-21
(1) Skip queuing PHY Work during suspend and cancel any phy work if already queued.
(2) Restore Gen 3 Speed after resume.
2024-02-03 18:25:14 -08:00
TC956X
25fdfed826 V_01-00-20
1. Added separate control functions for MAC TX and RX start/stop.
2. Stopped disabling/enabling of MAC TX during Link down/up.
3. Disabled link state latency configuration for all PCIe ports by default
2024-02-03 18:25:14 -08:00
TC956X
8cde5a6522 V_01-00-19
1. Added PM support for suspend-resume.
2. Added WOL Interrupt Handler and ethtool Support.
3. Updated EEE support for PHY and MAC Control. (EEE macros are not enabled as EEE LPI interrupts disable are still under validation)
2024-02-03 18:25:14 -08:00
TC956X
8d374ba749 V_01-00-18
1. Added support for GPIO configuration API
2024-02-03 18:25:14 -08:00
TC956X
ec5b1e771c V_01-00-17
1. Added M3 SRAM Debug counters to ethtool statistics.
2. Added MTL RX Overflow/packet miss count, TX underflow counts,Rx Watchdog value to ethtool statistics.
2024-02-03 18:25:14 -08:00
TC956X
f5792b1dd5 V_01-00-16
1. Configuring pause frame control using kernel module parameter also forwarding only Link partner pause frames to Application and filtering PHY pause frames using FRP.
2. Returning error on disabling Receive Flow Control via ethtool for speed other than 10G in XFI mode.
2024-02-03 18:25:14 -08:00
TC956X
0261bfc93f V_01-00-15
1. Added check for Device presence before changing PCIe ports speed.
2024-02-03 18:25:14 -08:00
TC956X
47b7310e67 V_01-00-14
1. Updated RX Queue Threshold limits for Activating and Deactivating Flow control
2. Filtering All pause frames by default.
3. Capturing RBU status and updating to ethtool statistics for both S/W & IPA DMA channels
2024-02-03 18:25:14 -08:00
TC956X
47410a0776 V_01-00-13
1. Synchronization between ethtool vlan features "rx-vlan-offload", "rx-vlan-filter", "tx-vlan-offload" output and register settings.
2. Added ethtool support to update "rx-vlan-offload", "rx-vlan-filter", and "tx-vlan-offload".
3. Removed IOCTL TC956XMAC_VLAN_STRIP_CONFIG.
4. Removed "Disable VLAN Filter" option in IOCTL TC956XMAC_VLAN_FILTERING.
2024-02-03 18:25:14 -08:00
TC956X
b0b93499fb V_01-00-12
1. Reverted changes related to usage of Port-0 pci_dev for all DMA allocation/mapping for IPA path
2024-02-03 18:25:13 -08:00
TC956X
70296200bd V_01-00-11
1. Configuration of Link state L0 and L1 transaction delay for PCIe switch ports & Endpoint. By default maximum values are set for L0s and L1 latencies.
2024-02-03 18:25:13 -08:00
TC956X
cf2a317cd0 V_01-00-10
1. TC956X_PCIE_GEN3_SETTING macro setting supported through makefile. By default Gen3 settings will not be applied by the Driver as TC956X_PCIE_GEN3_SETTING is not defined.
2. TC956X_LOAD_FW_HEADER macro setting supported through makefile. By default, TC956X_LOAD_FW_HEADER macro is disabled. If FIRMWARE_NAME is not specified in Makefile, the default value shall be TC956X_Firmware_PCIeBridge.bin
3. Platform APIs supported.
4. Modified PHY C22/C45 debug message.
2024-02-03 18:25:13 -08:00
TC956X
91bf4a10b7 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
2c364e9137 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
a73ba74550 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
dc7eaeed1e Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
55ef9fa226 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
6cf006f18c Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
df8bba5ee0 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
992d2b8e09 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
4059938c56 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
a899ec8355 Initial commit 2024-02-03 18:25:13 -08:00