Commit Graph

1163959 Commits

Author SHA1 Message Date
qctecmdr
75e9b266ee Merge "sched/walt: Honor scaling_min_freq/scaling_max_freq" 2024-03-26 06:53:56 -07:00
qctecmdr
97c3e8f09f Merge "defconfig: Enable spmi_debug_bus config for pitti" 2024-03-26 06:53:55 -07:00
qctecmdr
ac0063262a Merge "q2spi-msm-geni: Don't allow q2spi transfer when port is closed" 2024-03-26 06:53:54 -07:00
Jyothi Kumar Seerapu
c86f1ac6c9 q2spi-msm-geni: Don't allow q2spi transfer when port is closed
Do not allow q2spi transfer when port is in closed state,
restrict q2spi transfer if gsi failures are seen prior port
closure to avoid further failures.

Change-Id: If394b25feb6e2e68e58ce650522465b74c9b0b14
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
2024-03-25 01:41:12 -07:00
Jyothi Kumar Seerapu
c2d4f4252b q2spi-msm-geni: Unmap the buffers in error path
This change will clean up the unmapping of buffers in the error path
and helps in overcoming the short of buffer issues.

Also fixed the NULL pointer access issue crash
from q2spi_put_slave_to_sleep().

Corrected return value in q2spi_transfer function.

Change-Id: If95587c78ae7af915574b7c14aaf6bae575817ed
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
2024-03-25 01:40:40 -07:00
Chandana Kishori Chiluveru
45b2fd420e q2spi-msm-geni: Add multi CR support
In multi CR case, driver processing HRF write request and waiting
for HRF flow doorbell and their is a chance that ganges can
report independent CR doorbell or doorbell with multi CRs.
This is leading to blocking of independent doorbell processing.

Fix this issue by moving blocking wait function from
__q2spi_send_messages.

This will help to serve incoming independent doorbells in the
order we received in multi CR case.

Change-Id: Id9a51979cfcf7780e66a7b2ae9f47786fff986be
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-03-25 01:39:32 -07:00
qctecmdr
b679be6f20 Merge "soc: qcom: Fix offset values for non HWKM targets" 2024-03-23 19:37:32 -07:00
qctecmdr
5dbdecc442 Merge "pci: msm: Unlock the recovery_lock in case of return in failure" 2024-03-23 19:37:23 -07:00
Shivnandan Kumar
c7920924ec sched/walt: Honor scaling_min_freq/scaling_max_freq
If scaling_min_freq/scaling_max_freq changes, then there can be scenarios
where it is not honored promptly due to down_rate_delay_ns and
up_rate_delay_ns. Remove this check as scaling_cur_freq should honor
scaling_min_freq and scaling_max_freq.

Change-Id: I9dcc7cc431ab0b56872fbd6ee4b21e5dc86284fc
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
2024-03-23 14:36:42 +05:30
qctecmdr
60af5ec1bf Merge "soc: qcom: hgsl: change hgsl workqueue priority" 2024-03-21 23:23:59 -07:00
qctecmdr
c459ce552d Merge "defconfig: Enable VirtIO minidump for auto LAGVM" 2024-03-21 14:21:02 -07:00
qctecmdr
42101c18ec Merge "soc: qcom: minidump: Update the config state of VirtIO minidump" 2024-03-21 08:37:15 -07:00
qctecmdr
c094a46a76 Merge "remoteproc: pas: Check before waking up SOCCP" 2024-03-21 08:37:14 -07:00
qctecmdr
f270b2e12c Merge "cpufreq: qcom-cpufreq-hw: Add support for RIMPS based cpufreq" 2024-03-20 22:59:21 -07:00
LADI RAM SAI
4a659ea772 soc: qcom: minidump: Update the config state of VirtIO minidump
Update the config state from bool to tristate for VirtIO minidump
module.

Change-Id: Ic678c32586c242a4997765edc2f78735b3edc69e
Signed-off-by: LADI RAM SAI <quic_lramsai@quicinc.com>
2024-03-20 21:26:45 -07:00
LADI RAM SAI
1268c5d243 defconfig: Enable VirtIO minidump for auto LAGVM
Enable Virtio minidump and debug_symbol modules for
auto LAGVM.

Change-Id: Ib09d0c86c7de2e98b5c805df378418bc67164aaa
Signed-off-by: LADI RAM SAI <quic_lramsai@quicinc.com>
2024-03-21 09:36:55 +05:30
qctecmdr
da2c89266f Merge "msm_kernel: enable drm display helper compilation for niobe" 2024-03-20 20:09:13 -07:00
qctecmdr
7ff62650f8 Merge "clk: qcom: videocc-pineapple: Add support for videocc mvs0 clk reset" 2024-03-20 10:27:00 -07:00
Taniya Das
370b80cc4f cpufreq: qcom-cpufreq-hw: Add support for RIMPS based cpufreq
Add the support for RIMPS based cpufreq domain, thereby also adding the
soc_data for RIMPS and RIMPS-PDMEM.

Change-Id: I0ee06b0e8113c950958e25a9f59a5c27ef692fec
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
2024-03-20 22:31:35 +05:30
qctecmdr
0d5a48f0de Merge "spi: spi-msm-geni: add deep sleep changes for dma/fifo mode" 2024-03-20 08:03:43 -07:00
Soutrik Mukhopadhyay
2503a8674f msm_kernel: enable drm display helper compilation for niobe
This change enables the compilation of the DRM helpers for
display driver on niobe target.

Change-Id: Ib59f3a2e8a80e6d4431a4880cfa9e9f36be0413c
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
2024-03-20 18:15:21 +05:30
qctecmdr
8c27b1610f Merge "net: aqr115c: Add suspend resume support" 2024-03-20 05:37:45 -07:00
qctecmdr
138a19521e Merge "arm64: defconfig: Enable USB Phy and function driver modules" 2024-03-20 05:37:44 -07:00
qctecmdr
c4374b6031 Merge "pinctrl: qcom: Fix UFS_RESET io_reg addr for Volcano" 2024-03-20 05:37:43 -07:00
qctecmdr
ea05e07a19 Merge "defconfig: niobe: enable fbe modules" 2024-03-20 05:37:43 -07:00
qctecmdr
486f331a84 Merge "serial: msm_geni_serial: Add Sysfs entry for user commands" 2024-03-20 05:37:42 -07:00
qctecmdr
fa44c329e3 Merge "q2spi-msm-geni: Add default and shutdown pinctrl configurations" 2024-03-20 05:37:42 -07:00
qctecmdr
6cd7a5ef40 Merge "defconfig: autogvm: Enable VIRT NPU" 2024-03-20 03:24:28 -07:00
Gokul krishna Krishnakumar
a9df670a81 remoteproc: pas: Check before waking up SOCCP
Check for NULL before going ahead and waking up the SOCCP
during SoC crash scenario.

Change-Id: I829d3ab676676c9dbfc4ca6d9acf35180f3bcd22
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
2024-03-20 13:36:44 +05:30
Gokul krishna Krishnakumar
e1e194facb remoteproc: q6v5: pas: soccp: Remove the D0/D3 state
In the stop sequence the state is forced to change from D3
to D0, however this state change is not needed for the teardown
sequence to take effect.

Change-Id: I57b89885f9bdf6309349c95e27689abd72313822
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
2024-03-20 13:34:36 +05:30
Gokul krishna Krishnakumar
bd8d48abf9 remoetproc: pas: Remove voting from panic path
Voting for power rails during SoC crash is leading
delay in panic handling. During a SoC crash scenario
the power rails will already be up, therefore we
dont need to vote for this again.

Change-Id: I084e6eee8a51dd75dd728e39feb50e17d4f220a7
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
2024-03-20 13:32:26 +05:30
qctecmdr
c3d86ab59c Merge "msm: phy: Add WOL functions in micrel driver" 2024-03-20 00:20:51 -07:00
qctecmdr
f51bad73c8 Merge "niobe: Add qcom-dload-mode to modules.list.msm.niobe" 2024-03-20 00:20:51 -07:00
qctecmdr
8d5c902786 Merge "soc: qcom: hab: Add an uninterruptible flag for FE HAB open" 2024-03-20 00:20:47 -07:00
qctecmdr
619ec9e352 Merge "dmaengine: gpi: Reset Event and Tx,RX channels to start point" 2024-03-20 00:20:46 -07:00
qctecmdr
8909e84d0c Merge "pci: msm: Add support for BDF filtering" 2024-03-20 00:20:46 -07:00
qctecmdr
cb58ca6878 Merge "defconfig: niobe-gki: Enable QCOM_EUD driver" 2024-03-20 00:20:45 -07:00
qctecmdr
b1da55267b Merge "fsa: Add FSA-i2c config to support Volcano DP/AATC" 2024-03-20 00:20:45 -07:00
qctecmdr
cb13cee43a Merge "pinctrl: qcom: Add hibernation support for sm6150" 2024-03-20 00:20:41 -07:00
qctecmdr
e940b58b70 Merge "net: stmmac: Enable LPM" 2024-03-20 00:20:41 -07:00
Mehul Raninga
703f2a67e8 spi: spi-msm-geni: add deep sleep changes for dma/fifo mode
During the deep sleep we should program the registers, similar like
during the probe. We are calling master setup function during deep
sleep, it will do basic register config. Same changes added for
spi slave as well.

Change-Id: I2d048c391442d6c704b7b7ad674325ff9a8ecf13
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Signed-off-by: Mehul Raninga <quic_mraninga@quicinc.com>
2024-03-20 00:01:38 -07:00
Jun Zhang
2ca42c7372 soc: qcom: hgsl: change hgsl workqueue priority
Set the priority of hgsl workqueue by using API
alloc_workqueue instead of create_workqueue.

Change-Id: I640bc2b110f7b3997c402098f315f97a77fa7531
Signed-off-by: Jun Zhang <quic_juzhan@quicinc.com>
2024-03-19 20:12:26 -07:00
Seshu Madhavi Puppala
315b4e18b4 soc: qcom: Fix offset values for non HWKM targets
non-HWKM targets have only 32 keyslots. Update the
LUT KEYS secure Interrupt register offset and R16
and R17 register offset for non HWKM targets.
Test: Verified on non-hwkm target.

Change-Id: I0a70c62a270a44b1887240e06e41ada5d517d989
Signed-off-by: Seshu Madhavi Puppala <quic_spuppala@quicinc.com>
2024-03-19 20:04:14 -07:00
kundan kumar
c2f7473bf6 defconfig: niobe: enable fbe modules
Enable the following modules which enables
data encryption (FBE) using wrapped keys.
CONFIG_QTI_CRYPTO_COMMON
CONFIG_SCSI_UFS_CRYPTO_QTI
CONFIG_QTI_HW_KEY_MANAGER.

Change-Id: Iffc1023aaa24b6406206748d7a5a8848e9847b87
Signed-off-by: kundan kumar <quic_kunkum@quicinc.com>
2024-03-19 22:19:19 +05:30
Krishna Kurapati
a15d48ac96 arm64: defconfig: Enable USB Phy and function driver modules
Add modules for USB Phys, repeaters function driver modules and IPC
logging for FFS.

Change-Id: I8a20a9aca6e00729ea40226be48f18c12046e39e
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
2024-03-19 19:24:51 +05:30
kundan kumar
366ce64e54 modules: add fbe modules to first stage list
Add the list of modules required to exercise FBE
path during bootup. These include:
hwkm.ko
crypto-qti.ko
ufshcd-crypto-qti.ko.

Change-Id: Ifd3ffc515424af4d8365a26ff690dd7099a12640
Signed-off-by: kundan kumar <quic_kunkum@quicinc.com>
2024-03-19 17:00:58 +05:30
blingala
eb896437ee dmaengine: gpi: Add changes for deep sleep exit
This change mainly intended to cover deep sleep requirements
along with GSI driver. There exiting deep sleep need to be
restored with probe similar configurations.

Added channel dealloc and alloc for tx,rx,event ring channels.

Change-Id: I910d58b06f3973cf7ecc8d75e0ed248310dc11f5
Signed-off-by: blingala <quic_blingala@quicinc.com>
2024-03-19 00:35:30 -07:00
Viken Dadhaniya
222af03138 dmaengine: gpi: Reset Event and Tx,RX channels to start point
This change is to bring the GPII channels [Tx, RX] to the reset
point and also reset the Event channel.

When system enters into deep sleep and exits, this path to gpi
configs need to be in similar state to the probe. So that we are
in same state post or during deep sleep exit path.

Change-Id: I80cd0ecf61cb004f4ec10dfde5dedc81aace81bb
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
2024-03-19 00:35:18 -07:00
Hemant Kumar
c2e0a99ccc pci: msm: Add support for BDF filtering
Do not allow configuration access request to certain BDFs.
This is required for PCIe switches, unable to respond to
configuration access request to certain supported BDFs.
Without filtering, such BDFs are causing system bus hang
or enumeration failure of downstream ports of switch.

Change-Id: I4c4fa5cc4921dfe0217e05aaad4600abebcacd2b
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Yogesh Jadav <quic_yjadav@quicinc.com>
Signed-off-by: Joco Zhang <quic_pingshen@quicinc.com>
2024-03-18 23:01:05 -07:00
Prasanna S
aa4a5bd8c6 serial: msm_geni_serial: Add Sysfs entry for user commands
While using 32-bit userspace application, current vendor
specific ioctl calls are not getting invoked due to missing
compat_ioctl support in serial_core driver on 64-bit platform.

To fix this issue, sysfs entries are created to send the
existing ioctls commands via sysfs interface and perform
operations internally similar to the ioctls.

Below IOCTL cmds which are supported by the driver can
now be issued via sysfs path also:
(1) MSM_GENI_SERIAL_TIOCPMGET
(2) MSM_GENI_SERIAL_TIOCPMPUT
(3) MSM_GENI_SERIAL_TIOCPMACT
(4) MSM_GENI_SERIAL_TIOCFAULT

Sysfs entry /sys/class/tty/ttyHS0/device/hs_uart_version
is used to get uart driver version. Current version is 1.1
which reflects sysfs support is available along with existing
ioctl implementations.

Sysfs entry /sys/class/tty/ttyHS0/device/hs_uart_operation
is used to send commands to the driver, similar to ioctls.
Ex: echo 0x54EC > /sys/class/tty/ttyHS0/device/hs_uart_operation
will perform functionality of MSM_GENI_SERIAL_TIOCFAULT.

Change-Id: I39e5d612cfbf698a1f4c5af3ca2e3a85d9d0d06c
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
2024-03-18 21:07:58 -07:00