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spi: spi-msm-geni: add deep sleep changes for dma/fifo mode

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During the deep sleep we should program the registers, similar like
during the probe. We are calling master setup function during deep
sleep, it will do basic register config. Same changes added for
spi slave as well.

Change-Id: I2d048c391442d6c704b7b7ad674325ff9a8ecf13
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Signed-off-by: Mehul Raninga <quic_mraninga@quicinc.com>
This commit is contained in:
Mehul Raninga 2023-05-15 12:07:41 +05:30 committed by Zahir Shabbir Khan
parent eb896437ee
commit 703f2a67e8
1 changed files with 40 additions and 11 deletions
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51
drivers/spi/spi-msm-geni.c
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@ -1461,8 +1461,7 @@ static int spi_geni_mas_setup(struct spi_master *spi)
(geni_read_reg(mas->base, GENI_IF_DISABLE_RO) &
FIFO_IF_DISABLE);
if (mas->gsi_mode) {
SPI_LOG_DBG(mas->ipc, false, mas->dev, "%s:GSI mode\n", __func__);
if (mas->gsi_mode && !mas->is_deep_sleep) {
mas->tx = dma_request_slave_channel(mas->dev, "tx");
if (IS_ERR_OR_NULL(mas->tx)) {
dev_info(mas->dev, "Failed to get tx DMA ch %ld\n",
@ -1535,6 +1534,9 @@ static int spi_geni_mas_setup(struct spi_master *spi)
mas->tx_wm = 1;
}
setup_ipc:
/* we should avoid reallocation of ipc context during deepsleep */
if (!mas->ipc)
mas->ipc = ipc_log_context_create(4, dev_name(mas->dev), 0);
dev_info(mas->dev, "tx_fifo %d rx_fifo %d tx_width %d\n",
mas->tx_fifo_depth, mas->rx_fifo_depth,
mas->tx_fifo_width);
@ -1551,15 +1553,21 @@ static int spi_geni_mas_setup(struct spi_master *spi)
if (mas->is_le_vm)
return ret;
hw_ver = geni_se_get_qup_hw_version(&mas->spi_rsc);
major = GENI_SE_VERSION_MAJOR(hw_ver);
minor = GENI_SE_VERSION_MINOR(hw_ver);
if (!mas->is_deep_sleep) {
hw_ver = geni_se_get_qup_hw_version(&mas->spi_rsc);
if (hw_ver)
dev_err(mas->dev, "%s:Err getting HW version %d\n",
__func__, hw_ver);
else {
major = GENI_SE_VERSION_MAJOR(hw_ver);
minor = GENI_SE_VERSION_MINOR(hw_ver);
if ((major == 1) && (minor == 0)) {
mas->oversampling = 2;
SPI_LOG_DBG(mas->ipc, false, mas->dev,
"%s:Major:%d Minor:%d os%d\n",
__func__, major, minor, mas->oversampling);
if ((major == 1) && (minor == 0))
mas->oversampling = 2;
SPI_LOG_DBG(mas->ipc, false, mas->dev,
"%s:Major:%d Minor:%d os%d\n",
__func__, major, minor, mas->oversampling);
}
}
if (mas->set_miso_sampling)
spi_geni_set_sampling_rate(mas, major, minor);
@ -1567,6 +1575,8 @@ static int spi_geni_mas_setup(struct spi_master *spi)
if (mas->dis_autosuspend)
SPI_LOG_DBG(mas->ipc, false, mas->dev,
"Auto Suspend is disabled\n");
mas->is_deep_sleep = false;
return ret;
}
@ -2791,6 +2801,19 @@ static int spi_geni_runtime_resume(struct device *dev)
/* Added 10 us delay to settle the write of the register as per HW team recommendation */
udelay(10);
/* SPI Geni setup will happen for SPI Master/Slave after deep sleep exit */
if (geni_mas->is_deep_sleep && !geni_mas->setup) {
ret = spi_geni_mas_setup(spi);
if (ret) {
SPI_LOG_ERR(geni_mas->ipc, false, geni_mas->dev,
"%s: Error %d deep sleep mas setup\n",
__func__, ret);
return ret;
}
}
if (geni_mas->gsi_mode)
ret = spi_geni_gpi_pause_resume(geni_mas, false);
enable_irq(geni_mas->irq);
if (geni_mas->gsi_mode)
@ -2831,8 +2854,14 @@ static int spi_geni_suspend(struct device *dev)
if (pm_suspend_target_state == PM_SUSPEND_MEM) {
SPI_LOG_ERR(geni_mas->ipc, true, dev,
"%s:DEEP SLEEP EXIT", __func__);
"%s:DEEP SLEEP ENTRY", __func__);
geni_mas->is_deep_sleep = true;
/* for dma/fifo mode, master setup config rquired */
if (!geni_mas->gsi_mode) {
geni_mas->setup = false;
geni_mas->slave_setup = false;
}
}
if (!pm_runtime_status_suspended(dev)) {