android/android_kernel_samsung_sm8650
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

soc: qcom: Fix offset values for non HWKM targets

Browse Source 
non-HWKM targets have only 32 keyslots. Update the
LUT KEYS secure Interrupt register offset and R16
and R17 register offset for non HWKM targets.
Test: Verified on non-hwkm target.

Change-Id: I0a70c62a270a44b1887240e06e41ada5d517d989
Signed-off-by: Seshu Madhavi Puppala <quic_spuppala@quicinc.com>
This commit is contained in:
Seshu Madhavi Puppala 2024-03-08 12:43:53 +05:30
parent e7b2045eb1
commit 315b4e18b4
2 changed files with 37 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
drivers/soc/qcom/crypto-qti-common.c
View File

@ -2,7 +2,7 @@
/*
* Common crypto library for storage encryption.
*
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/crypto-qti-common.h>
@ -188,14 +188,32 @@ static void ice_dump_test_bus(void __iomem *ice_mmio)
static void ice_dump_config_regs(void __iomem *ice_mmio)
{
int i = 0;
uint32_t version = 0;
uint32_t major = 0;
uint32_t minor = 0;
for (i = 0; i < 64; i++) {
pr_err("ICE_CRYPTOCFG_r_16 slot %d: 0x%08x\n", i,
ice_readl(ice_mmio, ICE_LUT_KEYS_CRYPTOCFG_R_16 +
ICE_LUT_KEYS_CRYPTOCFG_OFFSET*i));
pr_err("ICE_CRYPTOCFG_r_17 slot %d: 0x%08x\n", i,
ice_readl(ice_mmio, ICE_LUT_KEYS_CRYPTOCFG_R_17 +
ICE_LUT_KEYS_CRYPTOCFG_OFFSET*i));
version = ice_readl(ice_mmio, ICE_REGS_VERSION);
major = (version & ICE_CORE_MAJOR_REV_MASK) >> ICE_CORE_MAJOR_REV;
minor = (version & ICE_CORE_MINOR_REV_MASK) >> ICE_CORE_MINOR_REV;
if (((major == 3) && (minor >= 2)) || (major > 3)) {
for (i = 0; i < 64; i++) {
pr_err("ICE_CRYPTOCFG_r_16 slot %d: 0x%08x\n", i,
ice_readl(ice_mmio, ICE_LUT_KEYS_CRYPTOCFG_R_16 +
ICE_LUT_KEYS_CRYPTOCFG_OFFSET*i));
pr_err("ICE_CRYPTOCFG_r_17 slot %d: 0x%08x\n", i,
ice_readl(ice_mmio, ICE_LUT_KEYS_CRYPTOCFG_R_17 +
ICE_LUT_KEYS_CRYPTOCFG_OFFSET*i));
}
} else {
for (i = 0; i < 32; i++) {
pr_err("ICE_CRYPTOCFG_r_16 slot %d: 0x%08x\n", i,
ice_readl(ice_mmio, ICE_LUT_KEYS_SW_CRYPTOCFG_R_16 +
ICE_LUT_KEYS_CRYPTOCFG_OFFSET*i));
pr_err("ICE_CRYPTOCFG_r_17 slot %d: 0x%08x\n", i,
ice_readl(ice_mmio, ICE_LUT_KEYS_SW_CRYPTOCFG_R_17 +
ICE_LUT_KEYS_CRYPTOCFG_OFFSET*i));
}
}
}

14
drivers/soc/qcom/crypto-qti-ice-regs.h
View File

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _CRYPTO_INLINE_CRYPTO_ENGINE_REGS_H_
@ -135,13 +135,21 @@
#define ICE_LUT_KEYS_CRYPTOCFG_R_16 0x4040
#define ICE_LUT_KEYS_CRYPTOCFG_R_17 0x4044
#define ICE_LUT_KEYS_CRYPTOCFG_OFFSET 0x80
#define ICE_LUT_KEYS_ICE_SEC_IRQ_STTS 0x6200
#define ICE_LUT_KEYS_ICE_SEC_IRQ_MASK 0x6204
#define ICE_LUT_KEYS_ICE_SEC_IRQ_CLR 0x6208
#define ICE_LUT_KEYS_CRYPTOCFG_OFFSET 0x80
/* Non HWKM Targets */
#define ICE_LUT_KEYS_SW_CRYPTOCFG_R_16 0x2040
#define ICE_LUT_KEYS_SW_CRYPTOCFG_R_17 0x2044
#define ICE_LUT_KEYS_SW_ICE_SEC_IRQ_STTS 0x3100
#define ICE_LUT_KEYS_SW_ICE_SEC_IRQ_MASK 0x3104
#define ICE_LUT_KEYS_SW_ICE_SEC_IRQ_CLR 0x3108
#define ICE_STREAM1_PARTIALLY_SET_KEY_USED (1L << 0)
#define ICE_STREAM2_PARTIALLY_SET_KEY_USED (1L << 1)
#define ICE_QTIC_DBG_OPEN_EVENT (1L << 30)