Writing to etr register results in unpredictable behavior when
TMCReady bit is not set, this change check the TMCReady bit, if
this bit is not set, will exit __tmc_etr_enable_hw().
Change-Id: I9ea4a24c6c1a9e174ea0520b57f9ed4130eb2da1
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
Enable LCDB and WLED and PM8008 drivers for volcano.
Change-Id: Iaeb677d277b3df454f2a5a34449ab067730bc80c
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
emac_mdio_fe is used for mdio virtualization.
Two emacs on lemans only have one MDIO.
emac_mdio_fe is required to enable 2nd emac in lemans GVM.
Change-Id: I5cb58c904b8f2cdbb15064ee84b69ee7eebda73f
Signed-off-by: jizho <quic_jizho@quicinc.com>
In the suspend & hibernation entry, clear the qdss_clk_cnt by
disabling remote etm which has been enabled. Allowing QDSS work post
suspend & hibernation.
Change-Id: I2a506f1a6466cc5dcd03598e02a4ab1985fb0e68
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Signed-off-by: Darshankumar Jagdishchandra Thakkar <quic_djagdish@quicinc.com>
Return value of pm_runtime_put_sync_suspend() is
not handled in the uart port shutdown path, and
driver is closing the port. Due to this subsequent
open/close are resulting in failure.
When pm_runtime_put_sync_suspend returns -EBUSY,
wait until suspend get executed by rpm framework,
and ensure port is suspended before it is closed.
Change-Id: I85e3601ec77c1080a10ac4da78a85ad89d592901
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
We are seeing crash when uport->state->xmit is being accessed
while port is not open.
Try to access uart_port only when the port_state is open.
Change-Id: Ib50fb51d92b285ce234fb324389bf5c3cf8013d6
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
Currently Rx Frame & Rx Break error, CTS interrupts are
enabled by default.
During probe, if CTS interrupt is asserted and/or if UART
Rx line is low the CTS/Frame/Break errors cannot be handled
since port is closed/without a client resulting to crash
in isr handler.
Handle this situation by enabling the Rx Frame error,
Rx Break error and CTS interrupts only if Port is in
open state. Disable these interrupts if port is in
closed state.
Change-Id: Iae93903ff51ad6fdc74bd78320c61d8ed050d522
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
Update DISPCC0 and DISPCC1 driver as per latest HW frequency
plan for NIOBE platform.
Change-Id: Ie632c10a6d78f0a8ff8f7797dea3a485f477b4c3
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>
Enable vh for cpu related info and add cpu vendor
hooks to first stage.
Change-Id: I15e2e9c22b862883dec5d287a35edb688776b0ee
Signed-off-by: Meena Pasumarthi <quic_pasumart@quicinc.com>
Add support to log KPDPWR status during driver INIT and runtime
when "qcom,log-kpd-event" property is set.
Change-Id: I59fb57e4d9cccdd314b3b7ba7f45ccc31bcbbe67
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Enable ref_clk_pad_en first similar to qref_clk.
qref_clk enables UFS_PHY and ref_clk_pad_en helps
to enable UFS_PAD_CLKREF_EN.
Change-Id: Ib3767fbd2ec5a5ccdf8ed8b808bf155c49583165
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Add support of debug clock controller on volcano platform which is
required for clock measurement of all the other clock controllers.
Change-Id: I167cfe150cb8122622f76549c6d1d80c9d13d6d5
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Unlock the recovery_lock in case of return in failure
in msm_pcie_pm_resume_noirq.
Change-Id: I6b71653bf64571273f443d26e49dba62027d715e
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
As per PCIE phy hardware programming guide all the clocks are
to be parked low before parking the phy in low power down mode.
As we need ahb clk enabled to access registers disable all clocks
except ahb clock and do the phy configurations and then disable
ahb clock in suspend path and do vice versa in resume path.
Change-Id: I4710cdea1a2be15bb45012dcbbe009117210d7f8
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
Without disabling controller GDSC, XO shutdown is not being achieved.
When GDSC is turned off, it will reset controller and it can assert
CLKREQ GPIO. With assertion of CLKREQ gpio, endpoint tries to bring
link back to L0, but since all clocks are turned off on host, this
can result in link down.
So, release the control of CLKREQ gpio also from controller by
overriding it in suspend ops.
Change-Id: I4ba54c8b23487400bc19d1c3783bfe45f63980ed
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
Update icc bw voting after the link is up based upon link speed and
width if there is no client based bw voting.
If there is already client based voting, vote for minimal bandwidth
which is needed to bring the PCIe link up. As client is already voting
based up on their requirement, if we vote based upon speed and width
we may end up voting for more bandwidth which may result in high power
consumption.
Change-Id: Ie0647530dddbe7493dc0e6d854d553c0b5c536ac
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
Few PCIe endpoints like NVMe are always expecting the device
to be in D0 state and the link to be active (or in l1ss) all the
time (including in S3 state). Some NVMe endpoints are treating
link down as power cycle, So turning off the link during S3 can
reduce life span of the NVMe.
For that reason adding apss-based l1ss-sleep support. With this,
all the PCIe resources can be turned off after link has entered
into L1ss in the suspend path.
This meets NVMe requirements and also at the same time lets the
system go to XO shutdown.
Change-Id: I0d28567d37c1a4cfbfdc9294a132078b5c53e10d
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
In some use cases, the QTI flash LED channels will be used
only to drive external LEDs by HW strobing, with no SW strobing
required. Add support for one such use case for mouth tracking
LEDs on XR targets.
Change-Id: Ia677572395687186944e44b1acfde8baae9ca744
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Enable MHI_BUS_DEBUG for niobe debug builds. This config is required to
enable the MHI debug logs.
Change-Id: I90c3d1c2a98646986b5abc3b3533d40da8c339c0
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
