Commit Graph

1168870 Commits

Author SHA1 Message Date
QCTECMDR Service
5767bda0a5 Merge "rpmsg: native: Increase iterations count in glink ISR" 2024-08-27 00:38:53 -07:00
QCTECMDR Service
1b7462b00f Merge "arm64: defconfig: Add pwm support for NIOBE" 2024-08-27 00:38:53 -07:00
QCTECMDR Service
7bf59b2974 Merge "usb: phy: Resolve NOC error during host mode PM suspend" 2024-08-26 07:45:39 -07:00
QCTECMDR Service
4d23fdb58a Merge "soc: qcom: socinfo: Add neo-la soc-id in socinfo list" 2024-08-26 07:45:38 -07:00
QCTECMDR Service
32ba4660f2 Merge "arm64: defconfig: Enable clock and gdsc drivers for NEO" 2024-08-26 07:45:38 -07:00
QCTECMDR Service
f91dd38c9a Merge "remoteproc: qcom: pas: Use SOCCP_SPARE register to check D0 state" 2024-08-26 07:45:37 -07:00
QCTECMDR Service
01ad9c31f5 Merge "drivers: qcom: Save authentication tag slot number to disk" 2024-08-26 07:45:37 -07:00
QCTECMDR Service
c9f8ba7bd8 Merge "defconfig: gen3auto: Enable MSM NPU" 2024-08-26 07:45:37 -07:00
QCTECMDR Service
9329cb9f30 Merge "modules.list: neo: Add neo pinctrl related module to first stage" 2024-08-26 07:45:36 -07:00
QCTECMDR Service
6bfdce9c4c Merge "q2spi-msm-geni: Add delay to the next q2spi transfer to soc after sleep command" 2024-08-26 00:16:18 -07:00
QCTECMDR Service
be37a11b6f Merge "regulator: ap72200: avoid keeping EN pin always high" 2024-08-26 00:16:17 -07:00
QCTECMDR Service
a258823475 Merge "pinctrl: qcom: Add support for Seraph SoC in pin control" 2024-08-26 00:16:17 -07:00
QCTECMDR Service
d3c0a718de Merge "soc: qcom: socinfo: Add soc-id support for Seraph" 2024-08-26 00:16:17 -07:00
QCTECMDR Service
6d3c18bad7 Merge "drivers: emac_mdio_fe: Add CL45 indirect read/write API" 2024-08-26 00:16:16 -07:00
QCTECMDR Service
25a172f0ce Merge "modules.list.msm.neo-la: Add tcsrcc and gdsc modules to first stage" 2024-08-26 00:16:16 -07:00
Pranav Mahesh Phansalkar
a3589d370c rpmsg: native: Increase iterations count in glink ISR
Currently, if APPS sends more than 10 requests to RPM, glink
hard interrupt service function is unable to process more than 10
acknowledgements.

Increase the loop iterations to 15 to process up to 15 acknowledgements
in the hard interrupt context.

Change-Id: Ief7385f21d5853275a2b90438181c93a01c76f78
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
2024-08-25 23:08:29 -07:00
Priyanka G Pai
3cfdbcb799 defconfig: gen3auto: Enable MSM NPU
Enable MSM NPU module.

Change-Id: I4feaa61b484c72c3eca1a6bc2c44ae1865b74775
Signed-off-by: Priyanka G Pai <quic_pgpai@quicinc.com>
2024-08-25 19:38:53 -07:00
Priyanka G Pai
26b1ad0d6e bzl: Add msm_npu driver for gen3auto
Add msm_npu driver module to the list.

Change-Id: Iba9d6a78b3ca0afcbb8a022b84986b8b943f82c7
Signed-off-by: Priyanka G Pai <quic_pgpai@quicinc.com>
2024-08-25 19:36:51 -07:00
Faisal Hassan
659777c861 usb: phy: Resolve NOC error during host mode PM suspend
In the host mode suspend scenario, the dwc3 core executes
dwc3_core_exit, which suspends the USB PHYs and turn off the clocks.
Later, during the dwc3-msm PM suspend, it invokes notify_disconnect to
the PHYs. As part of the SS PHY disconnect, it attempts to power down,
leading to a NOC error. To address this, a check has been added to
enable the clock during the power-down process.

Change-Id: I6040c431dea4a693a7226dc3006c099eb43bce43
Signed-off-by: Faisal Hassan <quic_faisalh@quicinc.com>
2024-08-23 19:50:14 -07:00
Kalpak Kawadkar
9dd92cf1a2 arm64: defconfig: Add pwm support for NIOBE
Add pwm support for NIOBE platform.

Change-Id: I375958e1e1c5e341c31d997dda7c22a229c41742
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>
2024-08-23 15:56:41 +05:30
Kalpak Kawadkar
f7ab05e15e pwm: qcom: Add reset support functionality
Add pwm reset support so that for each frame, period and
duty_cycle can be changed dynamically. While at it, also
update the pdm_pwm_free API with PWM disable functionality.

Change-Id: I64ecd4a8cec948d56cb89e7a5ae4b30e70cb9f3e
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>
2024-08-23 15:56:36 +05:30
Kamati Srinivas
a7975a4fd9 remoteproc: qcom: pas: Use SOCCP_SPARE register to check D0 state
TCSR_SOCCP_SLEEP_STATUS is updated when SOCCP starts wakeup process
and is not done processing the sleep request, Check the D0 state
transition by polling on SOCCP_SPARE register.

Change-Id: I7a00ec58f99ca748857e93ce4aab5a8dcc126faf
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
2024-08-23 12:16:01 +05:30
Gokul krishna Krishnakumar
1bb038ef63 remoteproc: pas: Clear master kernel if D request fails
Clear the master kernel bit if the SOCCP does not honour the
APPS request for a state change.

Change-Id: I5a6747973ed87e4c7f0d9074ef8da56925d2a927
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
2024-08-23 12:15:16 +05:30
Kamati Srinivas
b8fcfd2679 Revert "remoteproc: pas: Check running ack for D0 transition"
This reverts commit a8ce5c2552.
TCSR register read can be solely relied upon for D0 confirmation.

Change-Id: I9cb11a13313d2a9964efdc02a77b698b62268070
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
2024-08-23 12:15:06 +05:30
Chandana Kishori Chiluveru
6a4cd79d0b q2spi-msm-geni: Add delay to the next q2spi transfer to soc after sleep command
When Slave receives sleep command from host it requires 1msec to handle
the sleep due to HW limitation. Host should wait some time >1ms after
sending sleep command and before initiating next command to slave.

Added changes to check for slave_sleep_lock and wait for 2msec to
initiate transfers from host post sleep command.

Change-Id: Id333e2acecdb0ab169565f343b27d61952fb9471
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-08-22 05:40:03 -07:00
Jishnu Prakash
d40c483b77 regulator: ap72200: avoid keeping EN pin always high
Keeping enable GPIO always high leads to higher power consumption,
even in RBSC, when the regulator is not in use. Toggle GPIO to high
state only when regulator is enabled and toggle it low after regulator
disable to avoid power consumption when the regulator is not in use.

Change-Id: Ic2f9c0ef350051776f094e55e6fb4967b0d45248
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
2024-08-22 05:24:08 -07:00
QCTECMDR Service
96a17a0c73 Merge "msm: npu: Add NPU driver support for kernel 6.1" 2024-08-22 03:38:36 -07:00
QCTECMDR Service
b713dee329 Merge "clk: qcom: tcsrcc-neo: Snapshot of tcsrcc driver for NEO" 2024-08-22 00:07:35 -07:00
Chintan Kothari
46cd2cb981 modules.list.msm.neo-la: Add tcsrcc and gdsc modules to first stage
Add tcsrcc and gdsc-regulator modules to modules list on NEO platform,
to enable it to load during first stage init.

Change-Id: I8feb175c570abbc3e0a458615f2d1f08e0444f71
Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
2024-08-22 11:45:09 +05:30
Navya Vemula
74a512434d pinctrl: qcom: Add support for Seraph SoC in pin control
Add support for seraph pin configuration and control
in pinctrl framework.

Change-Id: I0673e080925601ba53f142279258d79af33d3aac
Signed-off-by: Navya Vemula <quic_nvemula@quicinc.com>
2024-08-22 10:45:44 +05:30
Nikhil V
87822fc615 drivers: qcom: Save authentication tag slot number to disk
Currently bootloader does the following to calculate the authentication
tag slot number.

authslot = NrMetaPages + NrCopyPages + NrSwapMapPages +
           HDR_SWP_INFO_NUM_PAGES

However, with compression enabled, we cannot apply the above logic to
get the authentication slot number. So this data should be provided to
the bootloader for decryption to work.

The current implementation doesn't make use of the swap_map_pages
for restoring the hibernation image. Use the slot number of the first
swap_map_page to store the authentication tag slot number.

Change-Id: Iddfb98cc5adc7bd79c0f52f3f5d64ad282efc9b4
Signed-off-by: Nikhil V <quic_nprakash@quicinc.com>
2024-08-22 08:48:24 +05:30
Nikhil V
fe157b161a drivers: qcom: Vendor hooks to support compressed block count
In case of hibernation with compression enabled, 'n' number of pages
will be compressed to 'x' number of pages before being written to the
disk. Keep a note of these compressed block counts so that bootloader
can directly read 'x' pages and pass it on to the decompressor. An
array will be maintained which will hold the count of these compressed
blocks and later on written to the disk as part of the hibernation
image save process.

Change-Id: If48cd5c396eda674467b3d40c75ad3c2e91c2e5e
Signed-off-by: Nikhil V <quic_nprakash@quicinc.com>
2024-08-22 08:38:50 +05:30
QCTECMDR Service
448b009f8d Merge "clk: qcom: gpucc-neo: Snapshot of GPUCC driver for NEO" 2024-08-21 06:16:01 -07:00
QCTECMDR Service
5a3b7899c8 Merge "modules.list support for loading gpucc in first stage" 2024-08-21 02:19:44 -07:00
QCTECMDR Service
b525e0b8b7 Merge "net: ethernet: stmmac: Disabling vlan hash filtering" 2024-08-20 22:29:56 -07:00
QCTECMDR Service
2de18b4d8d Merge "clk: qcom: gcc-neo: Snapshot of GCC driver for NEO" 2024-08-20 22:29:56 -07:00
QCTECMDR Service
d549a6bec6 Merge "soc: qcom: mem-offline: timeout mechanism for memory offline" 2024-08-20 22:29:56 -07:00
QCTECMDR Service
4e6a2e8f95 Merge "usb: gadget: f_fs_ipc_log: Remove status variable from ffs_ep" 2024-08-20 22:29:55 -07:00
QCTECMDR Service
11bbae76bc Merge "soc: qcom: mem-offline: Remove unnecessary zone locks" 2024-08-20 22:29:55 -07:00
QCTECMDR Service
8197181c0a Merge "clk: qcom: rmph: Add support for PMIC clocks for NEO" 2024-08-20 06:36:29 -07:00
QCTECMDR Service
ca31215ba6 Merge "soccp: pas: vote for interconnects in D transition" 2024-08-20 06:36:29 -07:00
QCTECMDR Service
7c0ea1fd5b Merge "clk: qcom: gcc-niobe: Add pwm clocks to support pdm_pwm" 2024-08-20 06:36:28 -07:00
QCTECMDR Service
ba60b98b87 Merge "clk: qcom: Enabling slpi tlmm driver" 2024-08-20 03:06:48 -07:00
QCTECMDR Service
0f9f2f37c7 Merge "clk: qcom: Adding SSC_QUP clocks" 2024-08-20 03:06:48 -07:00
Udipto Goswami
550ffe671a usb: gadget: f_fs_ipc_log: Remove status variable from ffs_ep
Currently, it seems due to ffs_ep being a local struct in upstream file
the ffs_ipc_log has defined a local copy of it for it's use.
However any mismatch in this might lead of th dependent structures
being unstable or corrupted due to this ambiguity.

Fix this by aligning the local ffs_ep structure defined in upstream
and downstream files.

Change-Id: Ia52c141deb49c0beaba31a59fa88ae58f8aaf5ea
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
2024-08-20 02:18:35 -07:00
QCTECMDR Service
05c620ed0a Merge "clk: qcom: clk-branch: Add support for BRANCH_HALT_POLL flag" 2024-08-19 23:40:11 -07:00
Chintan Kothari
3086a7563b arm64: defconfig: Enable clock and gdsc drivers for NEO
Enable all clock controllers, gdsc-regulator and cpufreq drivers
for NEO.

Change-Id: I83171ff4aa7877415557ddf0e52b3c2c1ebe94e8
Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
2024-08-20 10:44:57 +05:30
Charan Teja Reddy
ac46364d3c soc: qcom: mem-offline: timeout mechanism for memory offline
Due to temporary or long term pinning, offline may take longer
due to migration and pasr hal may not respond until it's complete.
Signal to stop the memory offline operation after a specified time value.

Change-Id: Ia78f71c2baf040b2a127cf731c95803cec66628a
Signed-off-by: Charan Teja Reddy <quic_charante@quicinc.com>
Signed-off-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
2024-08-19 22:13:20 -07:00
Salam Abdul
a2d08f72ef clk: qcom: Enabling slpi tlmm driver
Enabling slpi_tlmm driver related config.

Change-Id: I2619ef913f9bfb6dfaf921614d48717c5e117908
Signed-off-by: Salam Abdul <quic_asalam@quicinc.com>
2024-08-19 16:31:12 +05:30
Pratyush Brahma
72c4909e89 soc: qcom: mem-offline: Remove unnecessary zone locks
While mem-offline tries to get section allocated memory,
it takes a zone lock to go over all pfns in the block.
As the pfn walk can take significant time, the lock can
be held for longer and interrupts would be disabled for
long (reportedly more than 1.25 ms on some targets).
This is unnecessary since approximation of the allocated
bytes should suffice. Remove the unnecessary
zone locks.

Change-Id: I8042cca7a796823d4d580623df99fad61053e0ea
Suggested-by: Pavankumar Kondeti <quic_pkondeti@quicinc.com>
Signed-off-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
2024-08-19 03:09:49 -07:00