Merge "modules.list: neo: Add neo pinctrl related module to first stage"

arch/arm64/configs/vendor/neo_la_GKI.config

@@ -32,6 +32,7 @@ CONFIG_MSM_PERFORMANCE=m
 CONFIG_MSM_SYSSTATS=m
 CONFIG_PDR_INDICATION_NOTIF_TIMEOUT=9000
 CONFIG_PINCTRL_MSM=m
+CONFIG_PINCTRL_NEO=m
 CONFIG_POWER_RESET_QCOM_DOWNLOAD_MODE=m
 CONFIG_POWER_RESET_QCOM_DOWNLOAD_MODE_DEFAULT=y
 CONFIG_POWER_RESET_QCOM_REBOOT_REASON=m

drivers/pinctrl/qcom/Kconfig

@@ -23,6 +23,18 @@ config PINCTRL_PINEAPPLE
 	  Say Y here to compile statically, or M here to compile it as a
 	  module. If unsure, say N.
 
+config PINCTRL_NEO
+	tristate "Qualcomm Technologies Inc NEO pin controller driver"
+	depends on GPIOLIB && OF
+	select PINCTRL_MSM
+	help
+	  This is the pinctrl, pinmux, pinconf and gpiolib driver for the
+	  Qualcomm Technologies Inc Top Level Mode Multiplexer block (TLMM)
+	  block found on the Qualcomm Technologies Inc NEO platforms.
+	  This driver could also be used for a target supporting secondary VM.
+	  Say Y here to compile statically, or M here to compile it as a module.
+	  If unsure, say N.
+
 config PINCTRL_ANORAK
 	tristate "Qualcomm Technologies Inc ANORAK pin controller driver"
 	depends on GPIOLIB && OF

drivers/pinctrl/qcom/Makefile

@@ -2,6 +2,7 @@
 # Qualcomm pin control drivers
 obj-$(CONFIG_PINCTRL_MSM)	+= pinctrl-msm.o
 obj-$(CONFIG_PINCTRL_PINEAPPLE)	+= pinctrl-pineapple.o
+obj-$(CONFIG_PINCTRL_NEO)	+= pinctrl-neo.o
 obj-$(CONFIG_PINCTRL_ANORAK)	+= pinctrl-anorak.o
 obj-$(CONFIG_PINCTRL_NIOBE)	+= pinctrl-niobe.o
 obj-$(CONFIG_PINCTRL_SERAPH)    += pinctrl-seraph.o

drivers/pinctrl/qcom/pinctrl-neo.c

@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinctrl.h>
+
+#include "pinctrl-msm.h"
+#include "pinctrl-neo.h"
+
+static const struct msm_pinctrl_soc_data neo_pinctrl = {
+	.pins = neo_pins,
+	.npins = ARRAY_SIZE(neo_pins),
+	.functions = neo_functions,
+	.nfunctions = ARRAY_SIZE(neo_functions),
+	.groups = neo_groups,
+	.ngroups = ARRAY_SIZE(neo_groups),
+	.ngpios = 156,
+	.qup_regs = neo_qup_regs,
+	.nqup_regs = ARRAY_SIZE(neo_qup_regs),
+	.wakeirq_map = neo_pdc_map,
+	.nwakeirq_map = ARRAY_SIZE(neo_pdc_map),
+};
+
+static int neo_pinctrl_probe(struct platform_device *pdev)
+{
+	const struct msm_pinctrl_soc_data *pinctrl_data;
+
+	pinctrl_data = of_device_get_match_data(&pdev->dev);
+	if (!pinctrl_data)
+		return -EINVAL;
+
+	return msm_pinctrl_probe(pdev, pinctrl_data);
+}
+
+static const struct of_device_id neo_pinctrl_of_match[] = {
+	{ .compatible = "qcom,neo-pinctrl", .data = &neo_pinctrl},
+	{ },
+};
+
+static struct platform_driver neo_pinctrl_driver = {
+	.driver = {
+		.name = "neo-pinctrl",
+		.of_match_table = neo_pinctrl_of_match,
+	},
+	.probe = neo_pinctrl_probe,
+	.remove = msm_pinctrl_remove,
+};
+
+static int __init neo_pinctrl_init(void)
+{
+	return platform_driver_register(&neo_pinctrl_driver);
+}
+arch_initcall(neo_pinctrl_init);
+
+static void __exit neo_pinctrl_exit(void)
+{
+	platform_driver_unregister(&neo_pinctrl_driver);
+}
+module_exit(neo_pinctrl_exit);
+
+MODULE_DESCRIPTION("QTI neo pinctrl driver");
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(of, neo_pinctrl_of_match);
+MODULE_SOFTDEP("pre: qcom_tlmm_vm_irqchip");

modules.list.msm.neo-la

@@ -51,6 +51,7 @@ msm_rtb.ko
 mem_buf.ko
 mem_buf_dev.ko
 pinctrl-msm.ko
+pinctrl-neo.ko
 phy-generic.ko
 phy-qcom-emu.ko
 qcom_dma_heaps.ko

neo_la.bzl

@@ -23,6 +23,7 @@ def define_neo_la():
         "drivers/mfd/qcom-i2c-pmic.ko",
         "drivers/perf/qcom_llcc_pmu.ko",
         "drivers/pinctrl/qcom/pinctrl-msm.ko",
+        "drivers/pinctrl/qcom/pinctrl-neo.ko",
         "drivers/power/reset/qcom-dload-mode.ko",
         "drivers/power/reset/qcom-reboot-reason.ko",
         "drivers/regulator/debug-regulator.ko",