Commit Graph

1168904 Commits

Author SHA1 Message Date
QCTECMDR Service
c69541a532 Merge "defconfig: Add support for usb related configs in Neo" 2024-09-02 23:10:36 -07:00
QCTECMDR Service
f5d64bca6c Merge "q2spi-msm-geni: Perform GSI terminate sequence for sleep packet" 2024-09-02 23:10:36 -07:00
Shubham Chouhan
573d0730c5 defconfig: Add support for usb related configs in Neo
Add support for usb related defconfigs on neo.

Change-Id: I3b6270e4f2f543af77af2d6357aa7011074023b3
Signed-off-by: Shubham Chouhan <quic_schouhan@quicinc.com>
2024-08-30 00:39:09 -07:00
Chintan Kothari
a324ec868e ARM: config: msm: Enable config for buses drivers in NEO
Enabling config for HS_UART,i2c,spi,gpi drivers for NEO soc.

Change-Id: Id177635b376d3078999e296b792389eadd5a232d
Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
2024-08-30 00:38:43 -07:00
QCTECMDR Service
d2fad072d1 Merge "clk: qcom: gcc-mdm9607: Fix cmd_rcgr offset for blsp1_uart6_apps_clk_src" 2024-08-29 00:47:47 -07:00
QCTECMDR Service
5b5c055ca1 Merge "defconfig: autogvm: Enable Aquantia PHY" 2024-08-29 00:47:47 -07:00
QCTECMDR Service
840e64a463 Merge "remoteproc: qcom: pas: Fix rproc_config_check" 2024-08-28 13:18:17 -07:00
Srinath Pandey
b70cdcf3aa defconfig: autogvm: Enable Aquantia PHY
Enable CONFIG_AQUANTIA_PHY to support Aquantia phy in LA Guest.

Change-Id: I0823019f287974187b917193215bc0f389527920
Signed-off-by: Srinath Pandey <quic_srinpand@quicinc.com>
2024-08-28 10:36:13 -07:00
QCTECMDR Service
02d9ccf25c Merge "arm64: defconfig: Enable socinfo and smem drivers for Seraph SoC" 2024-08-28 10:00:20 -07:00
QCTECMDR Service
9da77be8b0 Merge "soc: qcom: hab: Add 3 new mmids in virtio-hab" 2024-08-28 06:34:20 -07:00
QCTECMDR Service
10a316335c Merge "net: ethernet: stmmac: Add 2.5G Phy Support" 2024-08-28 06:34:20 -07:00
QCTECMDR Service
c0db2be621 Merge "serial: msm_geni_serial: Prevent geni register access while suspend is in progress" 2024-08-28 03:07:30 -07:00
QCTECMDR Service
f90bdc4aa7 Merge "defconfig: Enable interconnect driver for NEO" 2024-08-28 03:07:30 -07:00
QCTECMDR Service
c1365d16ff Merge "drivers: emac_mdio_fe: Add module dependency" 2024-08-28 03:07:29 -07:00
Chandana Kishori Chiluveru
2c81d56368 q2spi-msm-geni: Perform GSI terminate sequence for sleep packet
Currently GSI terminate sequence not executed when sleep packet
fails with start sequence timeout and leading to GSI failures.

Perform q2spi gsi terminate sequence for sleep packet failures.

Change-Id: Ic9135e5eed9e8dbb616d796bc13ba5dfb0be9e66
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-08-28 00:30:28 -07:00
Visweswara Tanuku
33bf11a9b4 q2spi-msm-geni: Add 2msec delay for slave to complete sleep state
Add 2msec delay for slave to complete sleep state after it received
a sleep packet from host.

If slave is going to sleep, any data packet from host to slave while
slave's sleep process is ongoing will result in unwanted failures.
Slave expects minimum 1msec to complete its sleep process. Hence
added delay of 2msecs to let slave complete its sleep process.

Change-Id: I9d444ce420580f3b7c8eb582fdaa28e3b0a10bda
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
2024-08-28 00:28:09 -07:00
Visweswara Tanuku
e4b373f66a q2spi-msm-geni: Prevent double free of q2spi_req data_buff pointer
When allocation of tid fails, since q2spi_add_req_to_tx_queue
accepts q2spi_req as value its leading to double free of
data_buff in q2spi_transfer.

Pass q2spi_req by reference to q2spi_add_req_to_tx_queue to
avoid double free of pointer.

Change-Id: Ic2d984ce4a54da33016dad805ec74b9f4bc53f37
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
2024-08-28 00:24:58 -07:00
Anil Veshala Veshala
2875185c00 q2spi-msm-geni: skip terminate sequence during start sequence failed
When SOC in sleep state, q2spi first transfer will be failed with
start sequence timed out status. As part of timeout host performs
terminate sequence, once terminate sequence is done, GSI-FW can
serve the doorbell any point of time, which is leading to race
conditions. To solve this skipped terminate sequence during
start sequence failure case.

Also modified SW sequence as per recommendation by HPG.

Change-Id: I8ccbb93d45b2fe6da67bc36086691666e34cb0db
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2024-08-28 00:22:17 -07:00
Chandana Kishori Chiluveru
811947e6b5 q2spi-msm-geni: connect GSI doorbell after start channel operation
Synchronous channel command 48 needed to connect doorbell signal
after performing start channel operation to serve the doorbell
signal from gsi. Also ensure doorbell buffers are mapped after
doorbell connect cmd. Without this GSI FW corruptions seen
during q2spi sleep wakeup sequence.

Change-Id: Idf7a420e29eac3767d66492872d54c20bb657371
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-08-28 00:18:04 -07:00
Urmila Pundalikrao Lakade
f1e0fdbcd5 clk: qcom: gcc-mdm9607: Fix cmd_rcgr offset for blsp1_uart6_apps_clk_src
Fix cmd_rcgr offset for blsp1_uart6_apps_clk_src on mdm9607 platform.

Change-Id: Iddba14caa2f59cba6d2723cbed98410930f3a8c2
Signed-off-by: Urmila Pundalikrao Lakade <quic_upundali@quicinc.com>
2024-08-27 23:13:04 -07:00
Srinath Pandey
fef9e81ee1 net: ethernet: stmmac: Add 2.5G Phy Support
Add 2.5G support for SA8775 and enable CL45 read write
through indirect read/write APIs.

Change-Id: Ia71501f27429ff775a1b39a6754922047d30a44f
Signed-off-by: Srinath Pandey <quic_srinpand@quicinc.com>
2024-08-27 13:02:44 -07:00
QCTECMDR Service
76c1fe285b Merge "thermal: qcom: Add support to update tsens trip based on nvmem data" 2024-08-27 11:39:45 -07:00
Kamati Srinivas
cb2f2e127f remoteproc: qcom: pas: Fix rproc_config_check
Introduce delay only if read value is mis-matched with
requested state.

Change-Id: I5c35706bcfe00151b09e90f20b8e14e9a8842643
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
2024-08-27 16:27:54 +05:30
Deyan Wang
269307d1c1 soc: qcom: hab: Add 3 new mmids in virtio-hab
Add 3 new mmids for VNW, EXT and GPCE.

Change-Id: I79801c87b22313cfbce0c83887a946e04e7e7915
Signed-off-by: Deyan Wang <quic_deyawang@quicinc.com>
2024-08-27 03:56:55 -07:00
QCTECMDR Service
1b41b89e9c Merge "q2spi-msm-geni: Set sma write pending during multi CRs" 2024-08-27 00:38:54 -07:00
QCTECMDR Service
5767bda0a5 Merge "rpmsg: native: Increase iterations count in glink ISR" 2024-08-27 00:38:53 -07:00
QCTECMDR Service
1b7462b00f Merge "arm64: defconfig: Add pwm support for NIOBE" 2024-08-27 00:38:53 -07:00
Manaf Meethalavalappu Pallikunhi
3f7ba8359f thermal: qcom: Add support to update tsens trip based on nvmem data
Add support to detect higher thermal profile parts and update thermal
zone trips dynamically based on nvmem cell data for tsens.

Change-Id: I792c4f2736d10d68b45cc9b64c0ec08d185cf007
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
2024-08-26 22:11:30 +05:30
QCTECMDR Service
7bf59b2974 Merge "usb: phy: Resolve NOC error during host mode PM suspend" 2024-08-26 07:45:39 -07:00
QCTECMDR Service
4d23fdb58a Merge "soc: qcom: socinfo: Add neo-la soc-id in socinfo list" 2024-08-26 07:45:38 -07:00
QCTECMDR Service
32ba4660f2 Merge "arm64: defconfig: Enable clock and gdsc drivers for NEO" 2024-08-26 07:45:38 -07:00
QCTECMDR Service
f91dd38c9a Merge "remoteproc: qcom: pas: Use SOCCP_SPARE register to check D0 state" 2024-08-26 07:45:37 -07:00
QCTECMDR Service
01ad9c31f5 Merge "drivers: qcom: Save authentication tag slot number to disk" 2024-08-26 07:45:37 -07:00
QCTECMDR Service
c9f8ba7bd8 Merge "defconfig: gen3auto: Enable MSM NPU" 2024-08-26 07:45:37 -07:00
QCTECMDR Service
9329cb9f30 Merge "modules.list: neo: Add neo pinctrl related module to first stage" 2024-08-26 07:45:36 -07:00
Chandana Kishori Chiluveru
e00fb1d014 q2spi-msm-geni: Set sma write pending during multi CRs
During ranging sessions back to back doorbells from SOC racing with
UWB session request and multi CRs reported and sma_wr_pending not set
if the doorbell has independent doorbell. After that if we get another
independent doorbell we could see the failure for processing independent
doorbell becz sma write was pending part of previous multi CR.

Change-Id: I6b8cfa86f80038935877360896f383084fbb04c1
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-08-26 05:26:56 -07:00
Manaf Meethalavalappu Pallikunhi
2325103d69 thermal: qcom: tsens: Fix function prototype mismatch
There is function prototype mismatch in tsens init function.
Enable __init keyword only for static driver case.

Fix issues in clean up also in init function.

Change-Id: Id7eaf4c65e78c1864c8b377ed0137c45cce256ad
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
2024-08-26 17:32:55 +05:30
Manaf Meethalavalappu Pallikunhi
b9b1609599 modules.list: pineapple: Add qfprom module to first stage
First stage module like tsens depends on qfprom module.
Enable it in first stage DLKMs list.

Change-Id: Id38b3a66f174c77b80dd6f020d1eca706955bb7e
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
2024-08-26 17:17:21 +05:30
jizho
c7b140cf91 drivers: emac_mdio_fe: Add module dependency
Add emac_mdio_fe module dependency.

Change-Id: Ib1de750f65184841aedda934dece7d5eaa815652
Signed-off-by: jizho <quic_jizho@quicinc.com>
2024-08-26 03:59:07 -07:00
QCTECMDR Service
6bfdce9c4c Merge "q2spi-msm-geni: Add delay to the next q2spi transfer to soc after sleep command" 2024-08-26 00:16:18 -07:00
QCTECMDR Service
be37a11b6f Merge "regulator: ap72200: avoid keeping EN pin always high" 2024-08-26 00:16:17 -07:00
QCTECMDR Service
a258823475 Merge "pinctrl: qcom: Add support for Seraph SoC in pin control" 2024-08-26 00:16:17 -07:00
QCTECMDR Service
d3c0a718de Merge "soc: qcom: socinfo: Add soc-id support for Seraph" 2024-08-26 00:16:17 -07:00
QCTECMDR Service
6d3c18bad7 Merge "drivers: emac_mdio_fe: Add CL45 indirect read/write API" 2024-08-26 00:16:16 -07:00
QCTECMDR Service
25a172f0ce Merge "modules.list.msm.neo-la: Add tcsrcc and gdsc modules to first stage" 2024-08-26 00:16:16 -07:00
Pranav Mahesh Phansalkar
a3589d370c rpmsg: native: Increase iterations count in glink ISR
Currently, if APPS sends more than 10 requests to RPM, glink
hard interrupt service function is unable to process more than 10
acknowledgements.

Increase the loop iterations to 15 to process up to 15 acknowledgements
in the hard interrupt context.

Change-Id: Ief7385f21d5853275a2b90438181c93a01c76f78
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
2024-08-25 23:08:29 -07:00
Priyanka G Pai
3cfdbcb799 defconfig: gen3auto: Enable MSM NPU
Enable MSM NPU module.

Change-Id: I4feaa61b484c72c3eca1a6bc2c44ae1865b74775
Signed-off-by: Priyanka G Pai <quic_pgpai@quicinc.com>
2024-08-25 19:38:53 -07:00
Priyanka G Pai
26b1ad0d6e bzl: Add msm_npu driver for gen3auto
Add msm_npu driver module to the list.

Change-Id: Iba9d6a78b3ca0afcbb8a022b84986b8b943f82c7
Signed-off-by: Priyanka G Pai <quic_pgpai@quicinc.com>
2024-08-25 19:36:51 -07:00
Navya Vemula
e6ac656a86 arm64: defconfig: Enable socinfo and smem drivers for Seraph SoC
Enable socinfo and dependent drivers for Seraph SoC.
Add socinfo and dependency modules in first stage list.

Change-Id: I80937e6ecf97e13c5e980434e52f4acd6b45c3d3
Signed-off-by: Navya Vemula <quic_nvemula@quicinc.com>
2024-08-24 10:35:37 +05:30
Navya Vemula
17e5be797a defconfig: Enable pinctrl config for Seraph SoC
Add pinctrl config to support pin control in Seraph SoC. Add seraph
pinctrl module to list of first stage module list. Add dependent
QCOM_SCM config support and SCM module for seraph SoC.

Change-Id: I9703ff9b04eb6646008f52226b600e8e90470cb7
Signed-off-by: Navya Vemula <quic_nvemula@quicinc.com>
2024-08-24 10:33:34 +05:30