Commit Graph

19 Commits

Author SHA1 Message Date
TC956X
8d374ba749 V_01-00-18
1. Added support for GPIO configuration API
2024-02-03 18:25:14 -08:00
TC956X
ec5b1e771c V_01-00-17
1. Added M3 SRAM Debug counters to ethtool statistics.
2. Added MTL RX Overflow/packet miss count, TX underflow counts,Rx Watchdog value to ethtool statistics.
2024-02-03 18:25:14 -08:00
TC956X
f5792b1dd5 V_01-00-16
1. Configuring pause frame control using kernel module parameter also forwarding only Link partner pause frames to Application and filtering PHY pause frames using FRP.
2. Returning error on disabling Receive Flow Control via ethtool for speed other than 10G in XFI mode.
2024-02-03 18:25:14 -08:00
TC956X
0261bfc93f V_01-00-15
1. Added check for Device presence before changing PCIe ports speed.
2024-02-03 18:25:14 -08:00
TC956X
47b7310e67 V_01-00-14
1. Updated RX Queue Threshold limits for Activating and Deactivating Flow control
2. Filtering All pause frames by default.
3. Capturing RBU status and updating to ethtool statistics for both S/W & IPA DMA channels
2024-02-03 18:25:14 -08:00
TC956X
47410a0776 V_01-00-13
1. Synchronization between ethtool vlan features "rx-vlan-offload", "rx-vlan-filter", "tx-vlan-offload" output and register settings.
2. Added ethtool support to update "rx-vlan-offload", "rx-vlan-filter", and "tx-vlan-offload".
3. Removed IOCTL TC956XMAC_VLAN_STRIP_CONFIG.
4. Removed "Disable VLAN Filter" option in IOCTL TC956XMAC_VLAN_FILTERING.
2024-02-03 18:25:14 -08:00
TC956X
b0b93499fb V_01-00-12
1. Reverted changes related to usage of Port-0 pci_dev for all DMA allocation/mapping for IPA path
2024-02-03 18:25:13 -08:00
TC956X
70296200bd V_01-00-11
1. Configuration of Link state L0 and L1 transaction delay for PCIe switch ports & Endpoint. By default maximum values are set for L0s and L1 latencies.
2024-02-03 18:25:13 -08:00
TC956X
cf2a317cd0 V_01-00-10
1. TC956X_PCIE_GEN3_SETTING macro setting supported through makefile. By default Gen3 settings will not be applied by the Driver as TC956X_PCIE_GEN3_SETTING is not defined.
2. TC956X_LOAD_FW_HEADER macro setting supported through makefile. By default, TC956X_LOAD_FW_HEADER macro is disabled. If FIRMWARE_NAME is not specified in Makefile, the default value shall be TC956X_Firmware_PCIeBridge.bin
3. Platform APIs supported.
4. Modified PHY C22/C45 debug message.
2024-02-03 18:25:13 -08:00
TC956X
91bf4a10b7 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
2c364e9137 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
a73ba74550 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
dc7eaeed1e Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
55ef9fa226 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
6cf006f18c Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
df8bba5ee0 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
992d2b8e09 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
4059938c56 Add files via upload 2024-02-03 18:25:13 -08:00
TC956X
a899ec8355 Initial commit 2024-02-03 18:25:13 -08:00