For non QMI packets having data length less than eight bytes,
skb_copy_bits fails to copy packet data to log buffer.
So, Add condition to check data length. If the data length is less
than eight bytes, send actual data length to skb_copy_bits.
Change-Id: I2181016f224952d214a8f39fb06b47ace01dc51a
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Add support for usb related defconfigs on neo.
Change-Id: I3b6270e4f2f543af77af2d6357aa7011074023b3
Signed-off-by: Shubham Chouhan <quic_schouhan@quicinc.com>
Currently, functions gsi_inst_clean & gsi_free_inst utilises
gsi_opts without any check, however there is a possibility
that the opts structure could become NULL. In such case, due
to lack of if checks can result in NULL pointer dereference.
Change-Id: I548690e2eee377b5292f258972ae7e38417f3085
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
After moving the flush_work() call after the usb_phy_notify_disconnect()
to address USB type C compliance issues (LFPS generated during host
teardown):
commit fb3c680116db ("usb: dwc3: dwc3-msm-core: Notify PHY disconnect
before doing flush_work")
During USB device PIPO, the notify PHY disconnect call to the QMP PHY
will cause the PHY to be powered down. As part of the stop host mode
routine, the DWC3 core has to be placed back into device/peripheral
mode. Some parts of the device mode initialization sequence, such as
the core soft reset, requires that the PIPE clk (or controller source
clock) be active, otherwise the core soft reset will time out.
To mitigate the side effect, temporarily switch to the UTMI as the
controller clock source, so that the PIPE clock can be powered off
without any consequences. Once the move to DWC3 gadget mode is
complete, re-enable the PIPE clock as the controller source. (after
flush_work() is complete).
Change-Id: I59de803d737581c0037348498b8447f872adb62f
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
- Ensure proper configuration of USB wakeup interrupts for
DP_HS_PHY_IRQ and DM_HS_PHY_IRQ.
- Apply level high trigger when in host mode without a connected
device.
- Use edge rising trigger otherwise.
Change-Id: I5962baa53c5170c61bca7be389d38bf63894caea
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Enable CONFIG_AQUANTIA_PHY to support Aquantia phy in LA Guest.
Change-Id: I0823019f287974187b917193215bc0f389527920
Signed-off-by: Srinath Pandey <quic_srinpand@quicinc.com>
Currently GSI terminate sequence not executed when sleep packet
fails with start sequence timeout and leading to GSI failures.
Perform q2spi gsi terminate sequence for sleep packet failures.
Change-Id: Ic9135e5eed9e8dbb616d796bc13ba5dfb0be9e66
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
Add 2msec delay for slave to complete sleep state after it received
a sleep packet from host.
If slave is going to sleep, any data packet from host to slave while
slave's sleep process is ongoing will result in unwanted failures.
Slave expects minimum 1msec to complete its sleep process. Hence
added delay of 2msecs to let slave complete its sleep process.
Change-Id: I9d444ce420580f3b7c8eb582fdaa28e3b0a10bda
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
When allocation of tid fails, since q2spi_add_req_to_tx_queue
accepts q2spi_req as value its leading to double free of
data_buff in q2spi_transfer.
Pass q2spi_req by reference to q2spi_add_req_to_tx_queue to
avoid double free of pointer.
Change-Id: Ic2d984ce4a54da33016dad805ec74b9f4bc53f37
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
When SOC in sleep state, q2spi first transfer will be failed with
start sequence timed out status. As part of timeout host performs
terminate sequence, once terminate sequence is done, GSI-FW can
serve the doorbell any point of time, which is leading to race
conditions. To solve this skipped terminate sequence during
start sequence failure case.
Also modified SW sequence as per recommendation by HPG.
Change-Id: I8ccbb93d45b2fe6da67bc36086691666e34cb0db
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Synchronous channel command 48 needed to connect doorbell signal
after performing start channel operation to serve the doorbell
signal from gsi. Also ensure doorbell buffers are mapped after
doorbell connect cmd. Without this GSI FW corruptions seen
during q2spi sleep wakeup sequence.
Change-Id: Idf7a420e29eac3767d66492872d54c20bb657371
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
Add 2.5G support for SA8775 and enable CL45 read write
through indirect read/write APIs.
Change-Id: Ia71501f27429ff775a1b39a6754922047d30a44f
Signed-off-by: Srinath Pandey <quic_srinpand@quicinc.com>
Introduce delay only if read value is mis-matched with
requested state.
Change-Id: I5c35706bcfe00151b09e90f20b8e14e9a8842643
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
During the hibernation preparation phase, the bwmon driver disables
the bwmon hardware, including its IRQ. However, there can be
instances where a bwmon IRQ remains pending at the GIC level even
after the hardware and IRQ are disabled. Upon hibernation exit,
the GIC resumes first and restores all pending IRQs, including
bwmon if it was pending before hibernation entry. This can lead to
an IRQ storm. To fix this, call synchronize_irq before hibernation
entry to ensure that there are no pending bwmon IRQs before
hibernation entry.
Change-Id: Ib64510cb93296f37ab5fecd8944ce33a3c95e17b
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
Add support to detect higher thermal profile parts and update thermal
zone trips dynamically based on nvmem cell data for tsens.
Change-Id: I792c4f2736d10d68b45cc9b64c0ec08d185cf007
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
During ranging sessions back to back doorbells from SOC racing with
UWB session request and multi CRs reported and sma_wr_pending not set
if the doorbell has independent doorbell. After that if we get another
independent doorbell we could see the failure for processing independent
doorbell becz sma write was pending part of previous multi CR.
Change-Id: I6b8cfa86f80038935877360896f383084fbb04c1
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
There is function prototype mismatch in tsens init function.
Enable __init keyword only for static driver case.
Fix issues in clean up also in init function.
Change-Id: Id7eaf4c65e78c1864c8b377ed0137c45cce256ad
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
First stage module like tsens depends on qfprom module.
Enable it in first stage DLKMs list.
Change-Id: Id38b3a66f174c77b80dd6f020d1eca706955bb7e
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
