Before triggering the QCOM_SCM_SVC_GPU_INIT_REGS SCM call, ensure that
the support is available. If support is not present, return an error
with code -EOPNOTSUPP.
Change-Id: I304d348c617506c3d3e13071bf28dbce413951ac
Signed-off-by: Piyush Mehta <quic_piyumeht@quicinc.com>
Moved hot plug notification to occur after pmu_counter
initialization. Added sanity check before freeing pmu
counters to avoid kernel crash.
Change-Id: I1b7214746f0e8cbcf465df28d8ff875d2abd4950
Signed-off-by: Rajat Asthana <quic_rasthana@quicinc.com>
Add local version as gki for autogvm_GKI config.
Change-Id: I777ee11180d3a511aba33242f980bad0198cdf20
Signed-off-by: Vagdhan Kumar Kanukurthi <quic_vagdhank@quicinc.com>
APIs for CMO (Cache Maintenance Operations) are updated in msm-6.1
kernel. Prior to msm-6.1, dma_sync_sg_for_device() with DMA_FROM_DEVICE
as direction triggers cache invalidate and clean whereas in msm-6.1,
it triggers only cache clean. Hence use dma_sync_sg_for_cpu() for cache
invalidate.
Change-Id: I2fbcf5d8ce119cea2daf529bb5ec1c73aba8596c
Signed-off-by: Sandeep Hosangadi <quic_c_shosan@quicinc.com>
Enable khungtask enhancement for features like
black/while list, monitor iowait process, etc.
While at it, remove khungtask config from vendor
consolidate build as it is enabled for all builds
via gki.
Change-Id: I634cd654f673d08b7d9a8938ba7a74c9fbe4f317
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
Enabling on-semi re-driver configs in order to support
super-speed-plus capabilities.
Change-Id: I833287aa62b5eeae24537ac05d7a35db8efd1bf5
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
Add support for RPMH_LN_BB_CLK7, RPMH_LN_BB_CLK8, RPMH_LN_BB_CLK9
clocks bindings since these clocks are required to be modelled
on ANORAK platform.
Change-Id: I2895850a0343f95661f9a8819ddcaf2b8b211758
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
Add snapshot of clock handles for CAMCC/DISPCC/GCC/GPUCC/VIDEOCC
on ANORAK so that clients can request on the clock ids
from msm-5.10 branch
commit 12227ce63509 ("bindings: clock: qcom: Add support for
clock IDs for Anorak").
Change-Id: I1d7cc648fefdc034cea49cc74816d52d8ec3c349
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
Signed-off-by: Chintan Kothari <quic_ckothari@quicinc.com>
In the L0s check support function, in case of endpoint driver is
setting l0s_supported flag only if the parent already enables it.
Due to this driver thinks L0s is not supported as parent side L0s
is not enabled yet and not enabling L0s.
So removing that check as that enablment is done as next step.
Fixes: <94e79cc> ("pci: msm: enable L0s only if both parent and child
devices support it").
Change-Id: Ie286209619a712cefafa00aba1e62ebcdb4e54f2
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
Added pinctrl module for anorak platform in first stage module list.
Change-Id: Ied9e7c9cd8b3a856966453343695538c219cf87d
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
Enable TLMM pinctrl driver for anorak platform in GKI build.
Change-Id: I5acb468c300b08eca3eab8d1d47504c2d7468341
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
Anorak pinctrl driver snapshot from msm-5.10 branch
commit e2acefc7f7eb ("pinctrl: qcom: Add TLMM support for Anorak
platform").
Change-Id: Idab0d2fb2e091331113ae36b07178c40ab5de4c5
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
Add kheaders in blocklist to not load this module
to reduce memory footprints.
Change-Id: I339c2edfb22237dc656d816fa5f90607f21d75a7
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
Early boot kernel logs are enabled with earlycon cmdline option.
If earlycon device is passed to earlycon as a parameter with "=dev",
it is considered, otherwise kernel relies on stdout-path for the device.
Since this device can be different for different chipsets, sharing the
same compiled binary, the value passed to earlycon parameter can
be wrong for some of the chipsets, which is leading to issues like
invalid address access or garbled logs in some cases.
To fix this, add earlycon without any value so that the right
device can be picked from stdout-path. For chipsets not having
stdout-path defined, keep passing earlycon value if it is explicitly
defined in target bazel file.
Also, remove default earlycon param value for Pineapple family of
chipsets to avoid adding wrong address for Cliffs, Volcano SoCs.
Change-Id: If40d23a3916f1f148e26033d67408279dfca5493
Signed-off-by: Naini Singh <quic_nainsing@quicinc.com>
Signed-off-by: Naman Jain <quic_namajain@quicinc.com>
Enable qfprom_sys in SA6155 to facilitate
feature id reading from the node in post
boot.
Change-Id: I08953f5f5986a3e3b47f852d9faa10ee02fe3604
Signed-off-by: Raghavendra Prasad N <quic_raghnaga@quicinc.com>
Try maximum supported handshake version, if backend rejects,
lower version number and retry handshake, this requires backend
supports handshake retry.
Handshake version 2 sends uid to backend, backend can adjust CPU
priority by uid.
Change-Id: I40deb01743e35ec6f78e46794321d8b994a5b953
Signed-off-by: Keming Zhang <quic_kemingz@quicinc.com>
Add support for latest gen4 bcl hardware support to bcl driver.
It includes extra LSB byte data register for both ibat and vbat
current value and update scaling factor for ibat and vbat
accordingly.
Change-Id: I646f7b06194eb1f939688dfda7eced4120ed4dba
Signed-off-by: Nitesh Kumar <quic_nitekuma@quicinc.com>
