android/android_kernel_samsung_sm8650
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coresight-tmc: fix etr enable fail issue

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Writing to etr register results in unpredictable behavior when
TMCReady bit is not set, this change check the TMCReady bit, if
this bit is not set, will exit  __tmc_etr_enable_hw().

Change-Id: I9ea4a24c6c1a9e174ea0520b57f9ed4130eb2da1
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
This commit is contained in:
Yuanfang Zhang 2022-02-11 19:19:44 +08:00 committed by Mao Jinlong
parent b51e609e65
commit 1ac16358b1
3 changed files with 18 additions and 8 deletions
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5
drivers/hwtracing/coresight/coresight-tmc-core.c
View File

@ -33,7 +33,7 @@ DEFINE_CORESIGHT_DEVLIST(etb_devs, "tmc_etb");
DEFINE_CORESIGHT_DEVLIST(etf_devs, "tmc_etf");
DEFINE_CORESIGHT_DEVLIST(etr_devs, "tmc_etr");
void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata)
int tmc_wait_for_tmcready(struct tmc_drvdata *drvdata)
{
struct coresight_device *csdev = drvdata->csdev;
struct csdev_access *csa = &csdev->access;
@ -42,7 +42,10 @@ void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata)
if (coresight_timeout(csa, TMC_STS, TMC_STS_TMCREADY_BIT, 1)) {
dev_err(&csdev->dev,
"timeout while waiting for TMC to be Ready\n");
return -EBUSY;
}
return 0;
}
void tmc_flush_and_stop(struct tmc_drvdata *drvdata)

19
drivers/hwtracing/coresight/coresight-tmc-etr.c
View File

@ -1078,15 +1078,18 @@ static void tmc_sync_etr_buf(struct tmc_drvdata *drvdata)
etr_buf->ops->sync(etr_buf, rrp, rwp);
}
static void __tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
static int __tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
{
u32 axictl, sts;
struct etr_buf *etr_buf = drvdata->etr_buf;
int rc;
CS_UNLOCK(drvdata->base);
/* Wait for TMCSReady bit to be set */
tmc_wait_for_tmcready(drvdata);
rc = tmc_wait_for_tmcready(drvdata);
if (rc)
return rc;
writel_relaxed(etr_buf->size / 4, drvdata->base + TMC_RSZ);
writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
@ -1135,6 +1138,7 @@ static void __tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
tmc_enable_hw(drvdata);
CS_LOCK(drvdata->base);
return 0;
}
static int tmc_etr_enable_hw(struct tmc_drvdata *drvdata,
@ -1161,10 +1165,13 @@ static int tmc_etr_enable_hw(struct tmc_drvdata *drvdata,
if (rc)
return rc;
rc = coresight_claim_device(drvdata->csdev);
if (!rc) {
drvdata->etr_buf = etr_buf;
__tmc_etr_enable_hw(drvdata);
}
if (rc)
return rc;
drvdata->etr_buf = etr_buf;
rc = __tmc_etr_enable_hw(drvdata);
if (rc)
coresight_disclaim_device(drvdata->csdev);
return rc;
}

2
drivers/hwtracing/coresight/coresight-tmc.h
View File

@ -282,7 +282,7 @@ struct tmc_sg_table {
};
/* Generic functions */
void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata);
int tmc_wait_for_tmcready(struct tmc_drvdata *drvdata);
void tmc_flush_and_stop(struct tmc_drvdata *drvdata);
void tmc_disable_stop_on_flush(struct tmc_drvdata *drvdata);
void tmc_enable_hw(struct tmc_drvdata *drvdata);