Add the support for disabling the PCIe halt write and read feature.
By default PCIe halt write/read feature is enabled and through
device tree flag, PCIe halt Wr/Rd feature can be disabled.
In some targets reported throughput degradation due to PCIe latencies with
PCIe halt write/read feature. So, provided the support to enable and
disable the PCIe halt feature.
Change-Id: I83813571bedd0a0399f4ab473e6ddfbb975c8fe4
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
Signed-off-by: Naga Rashmi Ayiluri <quic_nayiluri@quicinc.com>
Upstream commit 91736d0619eb ("usb: dwc3: core: set force_gen1 bit
in USB31 devices if max speed is SS"), the core driver is made capable
of setting the force gen1 bit based on the platform.
Since this is already present, no need for the code in msm-core driver.
Removing the redundant code.
Change-Id: I0573a280992e26044b3f1700d6e6061b92342fd4
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
Adding support to add xhci quirks while root_hub is enumerating to
psiphon the additional configurations available.
This particular change adds the capability of enabling slow suspend
on targets which might have limitations of responding within the 1 ms
time frame and hence require more time. This change when enables slow
suspend will give the device enough timer to suspend and complete the
handshake properly.
Change-Id: I1fae266a526044ccc8107a9695faa3f1d7abdf8a
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
SPI Transfer mode selection is based on length but in SPI responder case
we get some latency for FIFO mode transfer that will cause some delay
in SPI responder transfer and we get "TX_FIFO_RD_ERR" interrupt. Moving
SPI responder to DMA mode for all transfer will not have this latency
issue and SPI requester/responder will be in sync and we won't get any
error related to SPI requester/responder sync.
Change-Id: I4de8c7b919cf64911d1a5f091132f1ac6258ccf4
Signed-off-by: Aniket Randive <quic_arandive@quicinc.com>
caller of qcom_scm_set_boot_addr(), qcom_scm_disable_sdi(),
qcom_scm_phy_update_scm_level_shifter(), qcom_scm_mmu_sync(),
and qcom_scm_deassert_ps_hold() incorrectly calls SMC
api without checking if SCM driver is ready or not without
which it is possible it can fail in low level SCM layer
and result in NULL pointer dereference.
While at it, also fix the place of scm device assignment.
(cherry picked from commit a76e4a84e4333bcf35885232583e743a5d33a01f).
Change-Id: I09d9b20153fe9e3cf5f758f041ba2015ed1504ba
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Previously, irq_setup was registered before irq_xfer in the init
function. This can lead to an 'unbalanced IRQ' race condition
error for the irq_xfer since irq_xfer was not being enabled when
needed in the worker function.
The fix switches the IRQ registration order, registering irq_xfer
before irq_setup since data is expected in irq context only after
the setup is done.
Change-Id: I554fef12300fd2c2b2aebe13a86c5cd0dc10aac1
Signed-off-by: Sarannya S <quic_sarannya@quicinc.com>
According to present logic, we are trying to read NGD1_INT_EN
register even before checking if QMI handle is NULL which is
resulting into NOC issue as previous runtime_resume was not
executed.
If runtime_suspend is called and QMI handle is NULL, return
immediately.
Change-Id: I85aaf51e5c8d7c45b6a0d73b02f06b5cc1732189
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
Recent commit introduced locking during ring cleanup to avoid
accessing of sec list while another thread tries to access it.
But irqsave was done and then it went for unmap causing a crash.
Fix it up by deleting the sec list and releasing the lock and
then claning up the ring.
Fixes: ffb00fc38c ("sound: usb: xhci-sec: Prevent Null pointer deference in xhci-sec")
Change-Id: I5844f90fb4d5297132e683460e958c8d7294aed3
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Set spm level to lvl 5 in case of S2D while suspending
the UFS device.
Change-Id: I5ebe7331cb34df94226b598bde05da38a5f1468d
Signed-off-by: Darshankumar Jagdishchandra Thakkar <quic_djagdish@quicinc.com>
Enable the secure buffer driver on the AutoGHGVM platform
to support secure use cases.
Change-Id: I42ec8b7618403456271f1a1bdc2483e66bf478c2
Signed-off-by: Mahesh Kumar <quic_mahkumar@quicinc.com>
So far we bypassed multi-descriptor changes for shared-se, now
enabled multi-descriptor changes for shared SE as well.
Multi-descriptor uses block event interrupt(bei) to receive interrupt
after transferring i2c messages specified by max number of transfers.
HW will transfer data corresponding to all tre's and generate interrupt
at the end of last transfer. In this implementation the number of
interrupts are reduced and also ensured that while hardware is
processing one set of tre's,software queues the next set of tre's
if available.
Change-Id: I983272681a7cbd99d4dab3d89e4f2b9edc8b3af7
Signed-off-by: Krishna Chaithanya Reddy G <quic_kgangapu@quicinc.com>
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
currently i2c geni driver is handling gsi i2c read and write in
i2c_gsi_xfer function, due to multiple if conditions giving
cyclomatic complexity number error. To provide more readability
and reduce complexity segregated to two different functions
geni_i2c_gsi_write and geni_i2c_gsi_read.
Change-Id: Id9cfffd90c0378ba3e689e8c3713a9fabe20ea84
Signed-off-by: Krishna Chaithanya Reddy G <quic_kgangapu@quicinc.com>
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
If it is a shared SE usecase, other EEs might have acquired
GSI lock which shall initiate the i2c transfers so line might
not be in good state. Hence we should not check the ios lines
state during the initiating the transfer in shared SE mode.
Removed the check condition to check for i2c geni ios lines state
for shared se in geni_i2c_xfer API.
Change-Id: Ibf517ecb3efe09a90e8c5e491d552bc0f148da46
Signed-off-by: Krishna Chaithanya Reddy G <quic_kgangapu@quicinc.com>
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
During deep sleep, all regulators are turned off.
So, Set spm level to lvl 5 in case of deep sleep,
to ensure that appropriate SSU command is sent to
the ufs device.
For other senerios like s2idle, the spm level
must not be changed.
Change-Id: I404b4f61192488c87f09e664e11d1ec53a5f06d0
Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com>
Signed-off-by: Darshankumar Jagdishchandra Thakkar <quic_djagdish@quicinc.com>
For APCS_CPU_PLL clock, the clk_rate_request is zero'd at creation and
both the min_rate and max_rate fields will also be set at zero, which
will break any code depending on the clock boundaries. Hence, initialize
the clock boundaries properly for APCS_CPU_PLL clock.
Change-Id: Ie33a3874137c3bb509d9f4c55cd96d5b449c7df8
Signed-off-by: Sravan Kumar Muppidi <quic_sravmupp@quicinc.com>
Enable CONFIG_RELAY to support streamfs APIs.
Change-Id: I565c3faaeced97523d8789f88bd5e0db179c0ce9
Signed-off-by: Xiaoning Ma <quic_mxiaonin@quicinc.com>
The secure carveout heap driver assumes that a region of memory can
be freed and assigned to a secure domain by the OS. However, in
scenarios where the OS does not have the sufficient privileges to
meddle with the memory, the OS can rely on regions of memory that
have been pre-assigned to a secure domain.
Introduce a flag "qcom,unmapped" to indicate that a region of memory
has been pre assigned to a secure domain. Use this flag to prevent
the secure carveout heap from zeroing out or assigning this memory.
Change-Id: Ic52250a6f9d9845430a20906b2f84ab6e8bbf176
Signed-off-by: Mahesh Kumar <quic_mahkumar@quicinc.com>
