Commit Graph

1014568 Commits

Author SHA1 Message Date
Nitin LNU
198f87d851 smcinvoke_kernel_client: Move header to /soc/qcom
Move header files to /soc/qcom so that any kernel client
could use that and add Auto-generated header files.
export method for get client env so that kernel client
can use the api to get root env object.

Change-Id: Iec6492144602cf09892be5912079056a5970ee85
Signed-off-by: Nitin LNU <quic_nlakra@quicinc.com>
2022-07-29 18:28:20 +05:30
qctecmdr
68ad2c0e96 Merge "iio: qcom-spmi-adc5-gen3: update scaling ratios for SMB channels" 2022-07-28 06:04:41 -07:00
qctecmdr
4295feb070 Merge "leds-qti-tri-led: Switch to use qpnp_lpg_pwm_* APIs_" 2022-07-28 06:04:40 -07:00
qctecmdr
4bc1c5efe8 Merge "modules.list.anorak: Add qcom-reboot-reason to modules list" 2022-07-28 06:04:40 -07:00
qctecmdr
d466ae2718 Merge "regulator: add QTI regulator OCP notifier driver" 2022-07-28 06:04:38 -07:00
qctecmdr
be25168db1 Merge "defconfig: Enable PMIC defconfigs for anorak" 2022-07-28 03:37:25 -07:00
qctecmdr
a004c9bacc Merge "iio: adc: qcom-spmi-adc5-gen3: Fix some indentation" 2022-07-28 03:37:25 -07:00
Jishnu Prakash
6a8d0a5e16 defconfig: Enable PMIC defconfigs for anorak
Enable all PMIC defconfigs required for parrot.

Change-Id: I643e83e3fdb3fa9abed44d946aeb904851430c34
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
2022-07-27 11:23:07 +05:30
qctecmdr
04a236900d Merge "Defconfig: Enable QCOM LPM governor for Anorak" 2022-07-26 09:36:52 -07:00
qctecmdr
1fdc24e255 Merge "dt-bindings: iio: Add ADC5 GEN3 Channel info for Kalama PMICs" 2022-07-26 09:36:51 -07:00
qctecmdr
fd24468804 Merge "msm: bus: mhi: Do not process MHI BW scale event ring twice" 2022-07-26 09:36:51 -07:00
qctecmdr
88f79a6d08 Merge "dt-bindings: iio: Add ADC support for PMXR2230" 2022-07-26 09:36:50 -07:00
qctecmdr
9c5a17aeb1 Merge "dt-bindings: iio: Update support for PM5100 ADC channels" 2022-07-26 09:36:50 -07:00
qctecmdr
2acc647781 Merge "serial: msm_geni_serial: Handle vote_clock_off when rx data is inflight" 2022-07-26 09:36:50 -07:00
qctecmdr
f858935ab2 Merge "power: supply: qti_battery_charger: add more properties for wireless psy" 2022-07-26 09:36:49 -07:00
Kamati Srinivas
e62f154fb3 modules.list.anorak: Add qcom-reboot-reason to modules list
Add qcom-reboot-reason to modules list for Anorak.

Change-Id: I1226cfb1ee15405f9e6b12e6a2e072b003c0906f
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
2022-07-26 20:40:31 +05:30
Subbaraman Narayanamurthy
044ae8f460 leds-qti-tri-led: Switch to use qpnp_lpg_pwm_* APIs_
'Commit 106a4b85e0
("BACKPORT: FROMLIST: pwm: Add support for different PWM output types")'
cannot be carried forward. To support breath functionality make use of
the following APIs.

- qpnp_lpg_pwm_set_output_type
- qpnp_lpg_pwm_get_output_types_supported

This is needed to switch PWM output type to PWM (fixed) or LPG/PPG
(modulated).

Change-Id: I7e82f5d102b382c2a059e7b11a907c1d0c654b26
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2022-07-26 04:40:08 -07:00
Visweswara Tanuku
ec83f9a61d serial: msm_geni_serial: Handle vote_clock_off when rx data is inflight
During vote_clock_off when wait_for_transfers_inflight
returned error indicating rx data is still to be read,
it went ahead, called powered off and set check_wakeup_byte
to true. Since check_wakeup_byte is true, pending rx data
is dropped in search of wakeup byte by msm_geni_find_wakeup_byte.

In meanwhile due to vote_clock_on check_wakeup_byte is
set to false, and some valid data is lost. Since wakeup
byte is not present in pending rx data, check_wakeup_byte
returned -EINVAL, due to which offset of rx_buf was
interpreted wrongly, resulting in crash when pushing
data to upper layer.

Return error in vote_clock_off if still data is inflight,
drop the complete rx buffer if msm_geni_find_wakeup_byte
returns error.

Change-Id: I938a12c343e377521a2fafa2ef353f705c533758
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
2022-07-26 04:18:05 -07:00
Raghavendra Kakarla
2847791e3b modules.list: Anorak: Add Entry for rpmh and pdc
This is enabling modules to load in First stage of module
loading.

Change-Id: I1c3a388b2feacfc2748670e658d4bbf36c59e325
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
2022-07-25 12:52:32 -07:00
Raghavendra Kakarla
d44d19d5d1 Defconfig: Enable QCOM LPM governor for Anorak
Enable QCOM LPM governor and sleep stats drivers.

Change-Id: Ieed563be42f1244a3837547d2d5e87f255cdfdd3
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
2022-07-26 01:19:44 +05:30
qctecmdr
fa7c203057 Merge "phy: ufs: Add ufs phy support for Anarok" 2022-07-25 03:53:28 -07:00
qctecmdr
616d546a6c Merge "iio: adc: Add QCOM SPMI PMIC5 GEN3 ADC driver" 2022-07-25 03:53:28 -07:00
qctecmdr
c8a3a9aee5 Merge "defconfig: Anorak: enable minidump and va_minidump" 2022-07-25 03:53:27 -07:00
qctecmdr
6be85d1e5e Merge "arm64: config: Enable Bluetooth, BT slimbus drivers" 2022-07-25 03:53:27 -07:00
qctecmdr
b59d4a0383 Merge "drivers: pinctrl: update mirror gpio names for anorak" 2022-07-25 03:53:27 -07:00
qctecmdr
3ae4fd33ea Merge "drivers: dcvs: cpufreq_stats: print error number" 2022-07-25 01:10:47 -07:00
qctecmdr
dc91c6b5d7 Merge "drivers: dcvs: cpufreq_stats: Add do_xfer return value check" 2022-07-25 01:10:45 -07:00
Jishnu Prakash
3ba2b9b92c iio: qcom-spmi-adc5-gen3: update scaling ratios for SMB channels
Update scaling ratios used for charging-related channels used on
ADC5 Gen3 peripherals.

Change-Id: Idcaa8f39e96fd5510811f85141e82c52d54c7dc0
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
2022-07-24 21:52:58 -07:00
Anjelique Melendez
4279817cfa iio: adc: qcom-spmi-adc5-gen3: Fix __tm_handler_work() loop conditions
Currently __tm_handler_work() assumes that each element in chan_props[]
represents 1 SDAM register. However, chan_props[] has an element for every
ADC and ADC TM channel. Since every ADC channel shares the same SDAM
register the loop within __tm_handler_work() has incorrect conditions. Fix
this.

While at it, remove __tm_handler_work() which was invoked for every SDAM
as tm_handler_work() goes through all channels.

Change-Id: I5f3444ab831ff2067a1a53f49dea0c5dbbdc8758
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2022-07-24 21:52:19 -07:00
Subbaraman Narayanamurthy
a09029e498 iio: adc: qcom-spmi-adc5-gen3: Add TEMP_ALARM_LITE to adc5_chans_pmic[]
Add TEMP_ALARM_LITE channel mapping so that the proper scaling
function can be used with ADC code obtained after the conversion.

Change-Id: I4ad0564ba4e4bd3d8409e3923d4b0ad5f0395503
Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
2022-07-24 21:52:03 -07:00
Anjelique Melendez
12a60c975c iio: adc: qcom-spmi-adc5-gen3: Fix order of adc5_gen3_probe()
Currently adc5_gen3_probe() registers thermal zone devices and then
registers interrupt handlers. While registering the thermal zones the
ADC5 GEN3 TM get/set callbacks are called by thermal framework that relies
on interrupt completion. Since interrupts have not been registered the
callbacks will time out. Fix this and add error handling for thermal zone
registration.

Change-Id: I3ad94211f7831c94b0847fda549295ecfebcb90b
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2022-07-24 21:51:42 -07:00
Subbaraman Narayanamurthy
fd5a80d574 iio: adc: qcom-spmi-adc5-gen3: Fix some indentation
Fix the indentation to keep it uniform and readable.

Change-Id: I73da8941c72857a9f63dca3e8085873413b3a1f2
Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
2022-07-24 21:51:01 -07:00
Anjelique Melendez
25e7f26495 iio: adc: qcom-spmi-adc5-gen3: Fix SID config when reading ADC channel
Currently, when reading an ADC channel the SID is always configured to 0.
This is causing incorrect readings for ADC and ADC TM channels. Fix this.

Change-Id: If6332c6ec83f04ce4294df27e5bdb784cc5d23be
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2022-07-24 21:50:48 -07:00
Anjelique Melendez
5bcb04155c iio: adc: qcom-spmi-adc5-gen3: Fix interrupt handler returns
Currently, the adc5 gen3 interrupt handler always returns IRQ_HANDLED.
Fix the handler so that on errors IRQ_NONE is returned.

Change-Id: I2ccebb985c81ad9de57b829b469ec8e58437f9e9
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2022-07-24 21:50:33 -07:00
Anjelique Melendez
5f7a08af47 iio: adc: qcom-spmi-adc5-gen3: Add support for multiple SDAMs
Currently, ADC5 GEN3 driver allows up to 8 channels. In Kalama up to 16
channels can be configured over 2 SDAMS. Update member variables,
interrupt handling and read and write functions so that driver can handle
2 or more SDAMS.

Change-Id: I2d65d9a420092db98cdbf27bba5188700c46fd0a
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2022-07-24 21:50:19 -07:00
Anjelique Melendez
47f9c39aeb iio: adc: qcom-spmi-adc5-gen3: Update max channels
Currently, ADC5 GEN3 driver allows up to 8 channels. In Kalama up to 16
channels can be configured over 2 SDAMs. Dynamically set max_channels
based on number of registers(SDAMs) specified.

Change-Id: I789b142306dfb0099d955f9e166c17b331a47517
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2022-07-24 21:49:48 -07:00
Anjelique Melendez
5e3517b556 iio: adc: qcom-spmi-adc5-gen3: Add support for qcom,debug-base
Currently, the debug base address is defined under the reg property. This
would be confusing if multiple addresses are specified under reg property
to support more ADC channels. Separate debug base into its own property.

Change-Id: Id96621bafd85bde0e601a89849aef7f094f53bf9
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
2022-07-24 21:14:17 -07:00
Subbaraman Narayanamurthy
c136ba8f11 iio: adc: qcom-spmi-adc5-gen3: Fix driver name
Fix the typo for driver name.

Change-Id: Ie65784e7c2920b7bdb61213524bbddb462d271be
Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
2022-07-24 21:14:03 -07:00
Jishnu Prakash
ebbd6a822f iio: qcom-spmi-adc5-gen3 : add support to clear conversion fault
When an ADC conversion results in a conversion fault, the
conversion fault bit in the status register is set, but never
cleared, by PBS, causing an error print for conversion fault
to appear for all future conversions. Update interrupt handler
to clear conversion fault bit if it is found set.

Change-Id: I83b36ce585ab5d20639dbf5050f91e8850cc2b75
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
2022-07-24 21:13:25 -07:00
Jishnu Prakash
a48741e035 iio: qcom-spmi-adc5-gen3 : update register dump API
Correct base offset and register read API used in register
dump API called for conversion faults.

Change-Id: I274d40fe29f9f32238b9baa5e42b23d4df64cbf2
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
2022-07-24 20:56:27 -07:00
Jishnu Prakash
d6bb32fb73 iio: qcom-spmi-adc5-gen3 : Update conversion and IRQ handling logic
Fix timer value for immediate conversion to the right constant
to avoid TM conversions for immediate conversion requests.
Correct TM channel offsets checked from status and data registers
in TM interrupt handler.

Change-Id: I43a9a5cf33d31029fe306e61c4bf2e80966b9b7e
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
2022-07-24 20:42:07 -07:00
Jishnu Prakash
30bb7880ad iio: qcom-spmi-adc5: Update ADC5 Gen3 conversion request logic
1.Remove mutexes used in TM configure API to avoid deadlock.

2.Update register writes in immediate and TM configure APIs.

3.Correct register and bit to check for end of conversion for immediate
conversion in IRQ handler.

Change-Id: I68d0bc4d6aeef089939d0d9ae9161b6122bf110e
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
2022-07-24 20:41:57 -07:00
Jishnu Prakash
54a026d2ec iio: qcom-spmi-adc5: Update ADC5 Gen3 support for PM5100
Add scaling functions for batt_therm, batt_id and usb_in_i ADC channels
for PM5100. Also add usb_sns_v_div_16 and vin_div_16 channels to list of
supported channels and correct default prescaling value for vbat_sns
channel and full scale ADC current.

Change-Id: I86b86c319bff6df583efab8cc4c877218a79fe56
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
2022-07-24 20:41:44 -07:00
Shivnandan Kumar
5faf288dec drivers: dcvs: cpufreq_stats: print error number
print error number when scmi_get_tunable_cpufreq_stats
return error. This will help in knowing exact error.

Change-Id: I4cf827186974e8d7bf084f081227bcf920a4f07b
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
2022-07-24 21:05:43 +05:30
Shivnandan Kumar
d8b3a5317f drivers: dcvs: cpufreq_stats: Add do_xfer return value check
Add check to return value of do_xfer and if do_xfer
returns failure, then do not access buffer.

Change-Id: I31e4b55f424e2791a5da5659bef14fd4cd79af7b
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
2022-07-24 17:26:16 +05:30
qctecmdr
286e32af3f Merge "msm: kgsl: Enable BCL support for 730 GPU" 2022-07-23 21:15:16 -07:00
qctecmdr
57eaa9eae8 Merge "arm64: def_config: neo: CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG" 2022-07-22 10:33:25 -07:00
qctecmdr
d14c36bfe0 Merge "dt-bindings: iio: Add the ADC5 GEN3 Channel info for SMB139x" 2022-07-22 10:33:24 -07:00
qctecmdr
ba5141b27a Merge "pwm: pwm-qti-lpg: add qpnp_lpg_pwm_* APIs " 2022-07-22 10:33:24 -07:00
qctecmdr
f2b3f7ff26 Merge "RM: config: msm: Enable bam drivers for anorak" 2022-07-22 10:33:22 -07:00