Merge series "ASoC: SOF: multi-cpu dais, IPC and Intel improvements for 5.7" from Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>:
Corrections for compatibility with the multi-cpu dai check for min-channels, IPC simplifications, and removal of unnecessary boot-related code for Intel platforms. Amery Song (2): ASoC: SOF: Intel: hda: remove unnecessary ROM IPC filter function ASoC: SOF: Intel: remove unnecessary waitq before loading firmware Bard Liao (2): ASoC: SOF: Intel: hda-dai: add stream capability ASoC: SOF: topology: connect dai widget to all cpu-dais Karol Trzcinski (2): ASoC: SOF: Make sof_ipc_ext_data enum more rigid ASoC: SOF: Remove SOF_IPC_EXT_DMA_BUFFER include/sound/sof/info.h | 22 +------- sound/soc/sof/intel/cnl.c | 5 -- sound/soc/sof/intel/hda-dai.c | 96 ++++++++++++++++++++++++++++++++ sound/soc/sof/intel/hda-ipc.c | 20 +------ sound/soc/sof/intel/hda-loader.c | 3 - sound/soc/sof/intel/hda.c | 3 - sound/soc/sof/intel/hda.h | 1 - sound/soc/sof/loader.c | 6 -- sound/soc/sof/sof-priv.h | 5 -- sound/soc/sof/topology.c | 8 ++- 10 files changed, 108 insertions(+), 61 deletions(-) base-commit: 101247a3b86e1cc0e382b7e887a56176290fc957 -- 2.20.1
This commit is contained in:
@ -28,9 +28,9 @@
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/* extended data types that can be appended onto end of sof_ipc_fw_ready */
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enum sof_ipc_ext_data {
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SOF_IPC_EXT_DMA_BUFFER = 0,
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SOF_IPC_EXT_WINDOW,
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SOF_IPC_EXT_CC_INFO,
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SOF_IPC_EXT_UNUSED = 0,
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SOF_IPC_EXT_WINDOW = 1,
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SOF_IPC_EXT_CC_INFO = 2,
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};
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/* FW version - SOF_IPC_GLB_VERSION */
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@ -83,22 +83,6 @@ struct sof_ipc_ext_data_hdr {
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uint32_t type; /**< SOF_IPC_EXT_ */
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} __packed;
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struct sof_ipc_dma_buffer_elem {
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struct sof_ipc_hdr hdr;
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uint32_t type; /**< SOF_IPC_REGION_ */
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uint32_t id; /**< platform specific - used to map to host memory */
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struct sof_ipc_host_buffer buffer;
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} __packed;
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/* extended data DMA buffers for IPC, trace and debug */
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struct sof_ipc_dma_buffer_data {
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struct sof_ipc_ext_data_hdr ext_hdr;
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uint32_t num_buffers;
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/* host files in buffer[n].buffer */
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struct sof_ipc_dma_buffer_elem buffer[];
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} __packed;
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struct sof_ipc_window_elem {
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struct sof_ipc_hdr hdr;
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uint32_t type; /**< SOF_IPC_REGION_ */
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@ -65,11 +65,6 @@ static irqreturn_t cnl_ipc_irq_thread(int irq, void *context)
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hda_dsp_ipc_get_reply(sdev);
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snd_sof_ipc_reply(sdev, msg);
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if (sdev->code_loading) {
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sdev->code_loading = 0;
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wake_up(&sdev->waitq);
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}
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cnl_ipc_dsp_done(sdev);
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spin_unlock_irq(&sdev->ipc_lock);
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@ -422,56 +422,152 @@ static struct snd_soc_cdai_ops sof_probe_compr_ops = {
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struct snd_soc_dai_driver skl_dai[] = {
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{
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.name = "SSP0 Pin",
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "SSP1 Pin",
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "SSP2 Pin",
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "SSP3 Pin",
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "SSP4 Pin",
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "SSP5 Pin",
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "DMIC01 Pin",
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.capture = {
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.channels_min = 1,
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.channels_max = 4,
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},
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},
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{
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.name = "DMIC16k Pin",
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.capture = {
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.channels_min = 1,
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.channels_max = 4,
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},
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},
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
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{
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.name = "iDisp1 Pin",
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.ops = &hda_link_dai_ops,
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "iDisp2 Pin",
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.ops = &hda_link_dai_ops,
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "iDisp3 Pin",
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.ops = &hda_link_dai_ops,
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "iDisp4 Pin",
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.ops = &hda_link_dai_ops,
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.playback = {
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.channels_min = 1,
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.channels_max = 8,
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},
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},
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{
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.name = "Analog CPU DAI",
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.ops = &hda_link_dai_ops,
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.playback = {
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.channels_min = 1,
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.channels_max = 16,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 16,
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},
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},
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{
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.name = "Digital CPU DAI",
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.ops = &hda_link_dai_ops,
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.playback = {
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.channels_min = 1,
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.channels_max = 16,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 16,
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},
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},
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{
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.name = "Alt Analog CPU DAI",
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.ops = &hda_link_dai_ops,
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.playback = {
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.channels_min = 1,
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.channels_max = 16,
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},
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.capture = {
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.channels_min = 1,
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.channels_max = 16,
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},
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},
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_PROBES)
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{
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@ -125,12 +125,6 @@ out:
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}
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static bool hda_dsp_ipc_is_sof(uint32_t msg)
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{
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return (msg & (HDA_DSP_IPC_PURGE_FW | 0xf << 9)) != msg ||
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(msg & HDA_DSP_IPC_PURGE_FW) != HDA_DSP_IPC_PURGE_FW;
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}
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/* IPC handler thread */
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irqreturn_t hda_dsp_ipc_irq_thread(int irq, void *context)
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{
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@ -176,17 +170,9 @@ irqreturn_t hda_dsp_ipc_irq_thread(int irq, void *context)
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*/
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spin_lock_irq(&sdev->ipc_lock);
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/* handle immediate reply from DSP core - ignore ROM messages */
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if (hda_dsp_ipc_is_sof(msg)) {
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hda_dsp_ipc_get_reply(sdev);
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snd_sof_ipc_reply(sdev, msg);
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}
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/* wake up sleeper if we are loading code */
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if (sdev->code_loading) {
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sdev->code_loading = 0;
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wake_up(&sdev->waitq);
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}
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/* handle immediate reply from DSP core */
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hda_dsp_ipc_get_reply(sdev);
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snd_sof_ipc_reply(sdev, msg);
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/* set the done bit */
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hda_dsp_ipc_dsp_done(sdev);
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@ -179,9 +179,6 @@ static int cl_trigger(struct snd_sof_dev *sdev,
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/* code loader is special case that reuses stream ops */
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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wait_event_timeout(sdev->waitq, !sdev->code_loading,
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HDA_DSP_CL_TRIGGER_TIMEOUT);
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
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1 << hstream->index,
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1 << hstream->index);
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@ -584,9 +584,6 @@ int hda_dsp_probe(struct snd_sof_dev *sdev)
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hda_dsp_ctrl_ppcap_enable(sdev, true);
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hda_dsp_ctrl_ppcap_int_enable(sdev, true);
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/* initialize waitq for code loading */
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init_waitqueue_head(&sdev->waitq);
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/* set default mailbox offset for FW ready message */
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sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
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@ -175,7 +175,6 @@
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* value cannot be read back within the specified time.
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*/
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#define HDA_DSP_STREAM_RUN_TIMEOUT 300
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#define HDA_DSP_CL_TRIGGER_TIMEOUT 300
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#define HDA_DSP_SPIB_ENABLE 1
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#define HDA_DSP_SPIB_DISABLE 0
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@ -95,9 +95,6 @@ int snd_sof_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 bar, u32 offset)
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/* process structure data */
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switch (ext_hdr->type) {
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case SOF_IPC_EXT_DMA_BUFFER:
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ret = 0;
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break;
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case SOF_IPC_EXT_WINDOW:
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ret = get_ext_windows(sdev, ext_hdr);
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break;
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@ -469,9 +466,6 @@ int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev)
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const char *fw_filename;
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int ret;
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/* set code loading condition to true */
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sdev->code_loading = 1;
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/* Don't request firmware again if firmware is already requested */
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if (plat_data->fw)
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return 0;
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@ -415,17 +415,12 @@ struct snd_sof_dev {
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u32 enabled_cores_mask; /* keep track of enabled cores */
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/* FW configuration */
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struct sof_ipc_dma_buffer_data *info_buffer;
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struct sof_ipc_window *info_window;
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/* IPC timeouts in ms */
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int ipc_timeout;
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int boot_timeout;
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/* Wait queue for code loading */
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wait_queue_head_t waitq;
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int code_loading;
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES)
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unsigned int extractor_stream_tag;
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#endif
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@ -1240,6 +1240,8 @@ static int sof_connect_dai_widget(struct snd_soc_component *scomp,
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{
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struct snd_soc_card *card = scomp->card;
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struct snd_soc_pcm_runtime *rtd;
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struct snd_soc_dai *cpu_dai;
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int i;
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list_for_each_entry(rtd, &card->rtd_list, list) {
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dev_vdbg(scomp->dev, "tplg: check widget: %s stream: %s dai stream: %s\n",
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@ -1254,13 +1256,15 @@ static int sof_connect_dai_widget(struct snd_soc_component *scomp,
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switch (w->id) {
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case snd_soc_dapm_dai_out:
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rtd->cpu_dai->capture_widget = w;
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for_each_rtd_cpu_dais(rtd, i, cpu_dai)
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cpu_dai->capture_widget = w;
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dai->name = rtd->dai_link->name;
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dev_dbg(scomp->dev, "tplg: connected widget %s -> DAI link %s\n",
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w->name, rtd->dai_link->name);
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break;
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case snd_soc_dapm_dai_in:
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rtd->cpu_dai->playback_widget = w;
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for_each_rtd_cpu_dais(rtd, i, cpu_dai)
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cpu_dai->playback_widget = w;
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dai->name = rtd->dai_link->name;
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dev_dbg(scomp->dev, "tplg: connected widget %s -> DAI link %s\n",
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w->name, rtd->dai_link->name);
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