perf/x86/kvm: Fix Broadwell Xeon stepping in isolation_ucodes[]
[ Upstream commit 4b2f1e59229b9da319d358828cdfa4ddbc140769 ] The only stepping of Broadwell Xeon parts is stepping 1. Fix the relevant isolation_ucodes[] entry, which previously enumerated stepping 2. Although the original commit was characterized as an optimization, it is also a workaround for a correctness issue. If a PMI arrives between kvm's call to perf_guest_get_msrs() and the subsequent VM-entry, a stale value for the IA32_PEBS_ENABLE MSR may be restored at the next VM-exit. This is because, unbeknownst to kvm, PMI throttling may clear bits in the IA32_PEBS_ENABLE MSR. CPUs with "PEBS isolation" don't suffer from this issue, because perf_guest_get_msrs() doesn't report the IA32_PEBS_ENABLE value. Fixes: 9b545c04abd4f ("perf/x86/kvm: Avoid unnecessary work in guest filtering") Signed-off-by: Jim Mattson <jmattson@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Peter Shier <pshier@google.com> Acked-by: Andi Kleen <ak@linux.intel.com> Link: https://lkml.kernel.org/r/20210422001834.1748319-1-jmattson@google.com Signed-off-by: Sasha Levin <sashal@kernel.org>
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Greg Kroah-Hartman
parent
6f8315e5d9
commit
ab112cc573
@ -4387,7 +4387,7 @@ static const struct x86_cpu_desc isolation_ucodes[] = {
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INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 3, 0x07000009),
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INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 4, 0x0f000009),
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INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 5, 0x0e000002),
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INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_X, 2, 0x0b000014),
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INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_X, 1, 0x0b000014),
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INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 3, 0x00000021),
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INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 4, 0x00000000),
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INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 5, 0x00000000),
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