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@ -3,17 +3,14 @@
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/export.h>
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#include <linux/string.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-noncoherent.h>
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#include <linux/io.h>
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#include <linux/cache.h>
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#include <linux/highmem.h>
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#include <linux/slab.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/dma-mapping.h>
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#include <asm/proc-fns.h>
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/*
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@ -119,10 +116,8 @@ out:
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return c;
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}
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/* FIXME: attrs is not used. */
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static void *nds32_dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t * handle, gfp_t gfp,
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unsigned long attrs)
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
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gfp_t gfp, unsigned long attrs)
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{
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struct page *page;
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struct arch_vm_region *c;
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@ -227,8 +222,8 @@ no_page:
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return NULL;
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}
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static void nds32_dma_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t handle, unsigned long attrs)
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void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t handle, unsigned long attrs)
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{
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struct arch_vm_region *c;
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unsigned long flags, addr;
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@ -365,118 +360,32 @@ static inline void cache_op(phys_addr_t paddr, size_t size,
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} while (left);
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}
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static void
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nds32_dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_FROM_DEVICE:
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break;
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case DMA_TO_DEVICE:
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case DMA_BIDIRECTIONAL:
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cache_op(handle, size, cpu_dma_wb_range);
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cache_op(paddr, size, cpu_dma_wb_range);
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break;
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default:
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BUG();
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}
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}
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static void
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nds32_dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_TO_DEVICE:
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break;
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case DMA_FROM_DEVICE:
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case DMA_BIDIRECTIONAL:
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cache_op(handle, size, cpu_dma_inval_range);
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cache_op(paddr, size, cpu_dma_inval_range);
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break;
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default:
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BUG();
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}
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}
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static dma_addr_t nds32_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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dma_addr_t dma_addr = page_to_phys(page) + offset;
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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nds32_dma_sync_single_for_device(dev, handle, size, dir);
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return dma_addr;
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}
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static void nds32_dma_unmap_page(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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nds32_dma_sync_single_for_cpu(dev, handle, size, dir);
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}
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static void
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nds32_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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nds32_dma_sync_single_for_device(dev, sg_dma_address(sg),
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sg->length, dir);
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}
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}
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static void
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nds32_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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nds32_dma_sync_single_for_cpu(dev, sg_dma_address(sg),
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sg->length, dir);
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}
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}
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static int nds32_dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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nds32_dma_sync_single_for_device(dev, sg_dma_address(sg),
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sg->length, dir);
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}
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return nents;
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}
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static void nds32_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries, enum dma_data_direction dir,
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unsigned long attrs)
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{
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int i;
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for (i = 0; i < nhwentries; i++, sg++) {
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nds32_dma_sync_single_for_cpu(dev, sg_dma_address(sg),
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sg->length, dir);
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}
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}
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struct dma_map_ops nds32_dma_ops = {
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.alloc = nds32_dma_alloc_coherent,
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.free = nds32_dma_free,
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.map_page = nds32_dma_map_page,
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.unmap_page = nds32_dma_unmap_page,
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.map_sg = nds32_dma_map_sg,
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.unmap_sg = nds32_dma_unmap_sg,
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.sync_single_for_device = nds32_dma_sync_single_for_device,
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.sync_single_for_cpu = nds32_dma_sync_single_for_cpu,
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.sync_sg_for_cpu = nds32_dma_sync_sg_for_cpu,
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.sync_sg_for_device = nds32_dma_sync_sg_for_device,
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};
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EXPORT_SYMBOL(nds32_dma_ops);
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