android_kernel_samsung_sm8650/arch/x86/events/amd
Janakarajan Natarajan a83f4c00dd perf/x86/amd/uncore: Rename 'L2' to 'LLC'
This patch renames L2 counters to LLC counters. In AMD Family17h
processors, L3 cache counter is supported.

Since older families have at most L2 counters, last level cache (LLC)
indicates L2/L3 based on the family.

Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/5d8cd8736d8d578354597a548e64ff16210c319b.1484598705.git.Janakarajan.Natarajan@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-01-30 12:01:16 +01:00
..
core.c perf/x86: Add perf support for AMD family-17h processors 2016-11-18 09:45:57 +01:00
ibs.c perf/x86/amd/ibs: Fix typo after cleanup state names in cpu/hotplug 2016-12-27 11:42:12 +01:00
iommu.c x86: Audit and remove any remaining unnecessary uses of module.h 2016-07-14 15:07:00 +02:00
iommu.h perf/x86: Move perf_event_amd_iommu.[ch] .. => x86/events/amd/iommu.[ch] 2016-02-09 10:23:50 +01:00
power.c cpu/hotplug: Cleanup state names 2016-12-25 10:47:44 +01:00
uncore.c perf/x86/amd/uncore: Rename 'L2' to 'LLC' 2017-01-30 12:01:16 +01:00