Janakarajan Natarajan a83f4c00dd perf/x86/amd/uncore: Rename 'L2' to 'LLC' ... This patch renames L2 counters to LLC counters. In AMD Family17h processors, L3 cache counter is supported. Since older families have at most L2 counters, last level cache (LLC) indicates L2/L3 based on the family. Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: http://lkml.kernel.org/r/5d8cd8736d8d578354597a548e64ff16210c319b.1484598705.git.Janakarajan.Natarajan@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>		2017-01-30 12:01:16 +01:00
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amd	perf/x86/amd/uncore: Rename 'L2' to 'LLC'	2017-01-30 12:01:16 +01:00
intel	perf/x86/intel: Handle exclusive threadid correctly on CPU hotplug	2017-01-17 11:08:36 +01:00
core.c	perf/x86: Reject non sampling events with precise_ip	2017-01-14 11:06:50 +01:00
Kconfig	perf/x86: Move Kconfig.perf and other perf configuration bits to events/Kconfig	2016-03-31 10:30:40 +02:00
Makefile	x86/perf/intel/uncore: Make the Intel uncore PMU driver modular	2016-03-31 10:30:34 +02:00
msr.c	Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip	2016-07-30 12:56:26 -07:00
perf_event.h	perf/x86: Fix exclusion of BTS and LBR for Goldmont	2016-12-11 13:06:09 +01:00