If device tree includes 'qcom,prime-mask' node, enable
dynamic irq affinity feature, else keep it disable by
default. As REQ_HIPRI has been replaced with REQ_POLLED,
hence using this flag in ufs_qcom_hook_compl_command will
complete the request in hard irq context.
With this, a significant improvement is observed with
UFS 2.x devices.
--------------------------------------------------------------
UFS 2.2 Hynix |
-------------------------------------------------------------
operation | default | with irq affinity feature |
-------------------------------------------------------------
Rnd Read (IOPS) | 29713 | 43221 |
Rnd Write (IOPS) | 28094 | 44087 |
-------------------------------------------------------------..
Change-Id: I63b0e5b2bc38a08c42a2332e8fc691a94e4983f6
Co-developed-by: Nitin Rawat <quic_nitirawa@quicinc.com>
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Enable VIBRATOR_LDO and AMOLED modules for Cliffs platform.
Change-Id: Ic6b6f4db0ec9e1e94eb55dd535ad0c64aace472b
Signed-off-by: Rakesh Kota <quic_kotarake@quicinc.com>
Disable walt and thermal_pause driver for gen3auto targets.
Change-Id: Iff7684913510f82375a8a7e1faa2425ee59fb2ab
Signed-off-by: Shashi Shekar Shankar <quic_ssbang@quicinc.com>
Signed-off-by: Shreyas K K <quic_shrekk@quicinc.com>
This change enables RPMH, PDC and CMD DB drivers.
Change-Id: Ia6b972ce02fc5b5f8d2a631287b288378aa62f90
Signed-off-by: Tushar Nimkar <quic_tnimkar@quicinc.com>
Currently the kernel implementation disables L1 in HS since
there are target which does not support gadget L1.
However, implementing this leads to Ch9 compliance
failures.
Therefore implementing a sysfs parameter through which
this can be controlled, when testing for compliance it can
be set to true and carry out the tests.
Change-Id: Ia74a9ff6e282f2b05e5b511901e82d71635d7411
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
Signed-off-by: Rajashekar kuruva <quic_kuruva@quicinc.com>
Remove regulator_is_enabled() calls in GDSC driver as they are resulting
in deadlock cases when lock debug options are enabled. But it is critical
to check if parent is enabled or not before performing any GDSC operation,
as GDSC register access requires parent to be enabled.
Use the parent's use_count to check if parent is enabled or not. For
gdsc_disable(), in most cases, parent's mutex is locked by regulator
framework before calling the gdsc_disable() callback, hence it is safe
to read use_count. But in code paths where parent lock is not acquired
by regulator framework, acquire parent's mutex before reading use_count
to avoid parent getting disabled while in the middle of GDSC operations.
For gdsc_set_mode(), parent locking is needed to avoid parent getting
disabled in the middle of set mode operation. Therefore acquire the
parent lock before checking parent is enabled or not and release the
lock at the end of set mode call using ww_mutex_lock and ww_mutex_unlock
API's.
Change-Id: Ic20f9a7478b47c9fde2e686b68d636342a4b1d48
Signed-off-by: Jagadeesh Kona <jkona@codeaurora.org>
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Currently, there's no way to generate a dpm.img file from the Bazel
build. As this should be generated when a dpm overlay dtbo exists,
generate it in that case.
To make use of this macro, just set dpm_overlay = True when defining
an LA target.
Change-Id: I10222499737ffb9b43cb2bac235ada66c8cae2e5
Signed-off-by: John Moon <quic_johmoo@quicinc.com>
In some targets, it is observed that the time difference between vbus
being provided by exerciser and the terminations being applied is
more than 1 second causing failures of Type-C compliance testcases
4.10.2 and 4.10.3
When policy engine's psy changed work gets kicked in first time from
vbus present interrupt callback of charger driver, we kick in usb pd
sm work and it keeps running. Since apsd is not yet done, we don't
queue peripheral work. When apsd is done and charger driver invokes
power supply changed work, policy engine bails out as sm work is
already running although the charger type is detected as SDP/CDP and
were supposed to send an extcon notification. As a result the extcon
is sent when the sm work hits enter snk startup call and it
recognises that apsd is done and charger type is SDP or CDP and sends
extcon. This is results in a delay of roughly 1.3 seconds from the
moment vbus got detected to the moment we provide extcon notification
to dwc3-msm.
To avoid this, check for charger type and provide extcon if haven't
done already in the psy_changed_notifier_work. This reduces the time
delay to around 0.5 seconds helping resolve compliance issue.
Change-Id: I02c9a4a6b21ca75d43fd68f2447a7388210a4856
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Fix dependencies of CONFIG_SCHED_WALT in msm_performance
driver.
Change-Id: I40eab66f12b96541f2c2896a5d4ad003c8505d0a
Signed-off-by: Shreyas K K <quic_shrekk@quicinc.com>
Add the memory regions which are not valid registers as
keepout regions in qfprom driver for Cliffs.
Change-Id: I1eb5cde0438ec450c1858a01271dca042ee37f55
Signed-off-by: Naman Jain <quic_namajain@quicinc.com>
The secondary vote path that utilizes bus width is using the
primary vote as a frequency when it should be using the primary
vote in units of MBPS. Save and use the primary vote in MBPS to
fix the calculation.
Change-Id: I16fc11d84c820b3e3400ecd6acd1be97782a772a
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
This patch adds the mpm to gic mapping for the wakeup capable
interrupt so that these interrupts can wakeup the APSS from
rpm assisted sleep.
Change-Id: Ic374277b8c01dea3c0f729c9b7d9367d20d16abb
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
If i3c geni master driver receives Nack or timeout, then
driver does gsi stop sequence, if i3c bus is idle
stop command is executed by IBI controller. During the
execution of stop command, IBI can be received from the slave.
IBI controller FSM cannot handle stop command execution
when BUS is not IDLE, so IBI is stuck never recovered.
To solve this added stall bit for every transfer, it will
stretch the clock line, so bus will not release, will release
the bus by generating stop command after last transfer done.
This complete sequence is as per the HW suggested SW workaround.
Change-Id: I45a95f992ff263351090401ae5e07e7f37e2e29d
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Fix below compilation error due to unused function
qcom_rproc.h:60:12: error: unused function
'\''qcom_rproc_set_dtb_firmware'\'' [-Werror,-Wunused-function].
Change-Id: I9a38dee54d0415408d5a940b3c662a566c894d38
Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com>
