Some targets may have multiple instances of PM8550B and PM8550VX. Add
required ADC channel macros for these extra instances.
Change-Id: I29b407d812b8eafe7c24d0a0f56c63750c914f65
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Current q2spi transfer timeout is relaxed(2secs).
During deepsleep UWB ranging tests, UWB android framework
app expects response for certain q2spi transfers under
1 second else ending up in retry and failures.
Reduced the q2spi transfer timeout to 250msecs to
unblock UWB ranging tests during deepsleep.
Change-Id: If410c96adf2db7130ec6f3e0a313292dd6c72747
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
If application does not consume Rx buffers fast enough,
driver will run short of available Rx buffers.
When short of Rx buffers, induce sleep delay to let the
application consume the buffers. After the delay again
check if any free Rx buffers are available for driver usage.
Change-Id: I922708cb52d1f71c6369d8661da421395b7eec33
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
During enabling the perf mode for the controller, it checked
the pm qos latency is configured or not.If it is not configure
then it return before calling cpu_latency_qos_add_request .So
during disable perf mode if for that controiller if it is not
configure then putting the check so that it return before the
cpu_latency_qos_remove_request because there is no requiremen
as pm_qos_latency is not configure.
Change-Id: I19fd0db382e3f155d8a32d566c0f040cbfe7c402
Signed-off-by: Manish Nagar <quic_mnagar@quicinc.com>
Update the gpu_cc_pll0 configurations as per the latest
HW recommendation for PITTI platform. While at it, update
the vdd_data for gpu_cc_gx_gfx3d_clk_src clock.
Change-Id: I246608d35395d8c4ac84f7a99663bf5a25febd8d
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
The Zonda PLL has a 16 bit signed alpha and in the cases where the alpha
value is greater than 0.5, the L value needs to be adjusted accordingly.
Thus update the logic for the same.
Change-Id: Id3163dc53e66cc8dcd5e61d6e997ef24b6cf3534
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Add DISPCC volcano module to modules list, to enable it to load
during first stage init.
Change-Id: I5f0edadbd99fb92fd1480d0996811cda34f8d76d
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Add support for CAMCC and DISPCC clock drivers module on volcano
platform.
Change-Id: I31c97be7b053b532b05cf81019db53bf4a5b5145
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
eMMC is the storage device for hibernation image. As such it needs
to be working when hibernation image is created and written. Also for
loading hibernation image after reboot, eMMC driver needs to be
probed and running.
During reboot, kernel comes up and does its own eMMC probe and sets
speed for eMMC. A late system call then checks for hibernation image.
If there is a hibernation image, the current kernel will stay only
temporarily.
Once the hibernation image is found and loaded, the temporary kernel
suspends the eMMC device and then gives control to kernel in
hibernation image.
The hibernation image then restores the eMMC device based on the eMMC
driver state saved just before creating hibernation image.
This gives rise to a possible mismatch between the HW state of eMMC
(Specifically the bus speed) when temporary kernel suspends it and the
state driver restores after hibernation restore.
So a synchornization has been done by making the eMMC run in max speed
during:
1. Just before hibernation image is created (So the driver
state in hibernation image will be for max speed mode).
2. After reboot, just before temporary kernel loads image and
suspends (so the mmc driver in temporary kernel will put the
eMMC in suspend while HW state is in highest speed mode).
This ensures that the HW state, mmc_resume post the hibernation
expects, will be same as the HW state actually present in the eMMC
at the point of hibernation restore.
This also ensures we save the hibernation image in max performance and
we restore the hibernation image also in max performance.
Also, SD card detection is done through card detection (CD) GPIO.
The IRQ for this cd GPIO should be freed before going to hibernation and
restored in resume path.
Change-Id: I844017537f62df49eade965c308f33ce5451770e
Signed-off-by: Vijay Viswanath <vviswana@codeaurora.org>
Signed-off-by: Anjana Hari <quic_ahari@quicinc.com>
Signed-off-by: Jayasri Bhattacharyya <quic_jbhattac@quicinc.com>
Enable configs for GENI based peripheral protocols such as uart,i2c,
spi,gsi,sps and bam for Niobe.
Change-Id: I345c909110d124d62a00bb317425aaab2a057684
Signed-off-by: Krishna Chaithanya Reddy G <quic_kgangapu@quicinc.com>
The LVS test module is used to verify host link layer compliance, as it
allows for control of specific root hub operations, such as bus power
management. Enable the module in the kernel configuration, as
it should only be used in debug builds for compliance testing.
Change-Id: I2aed854e42410db58cf4b07ee205223ab946503b
Signed-off-by: Rajashekar kuruva <quic_kuruva@quicinc.com>
This patch adds the thermal interrupt to the mpm wakeup
capable interrupt map.
Change-Id: I86bcb4a733a5809c2d3b54e67222d912d1307ca7
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
Enable clock scaling for msmnile_au and add module to .bzl and
modules.list.msm.gen3auto to compile successfully.
Change-Id: I1cac3ead24c084abbac036b00595b43b0e83c366
Signed-off-by: Jayasri Bhattacharyya <quic_jbhattac@quicinc.com>
Add remote debugger device configuration. The Remote Debugger driver
allows a debugger running on a host PC to communicate with a remote
stub running on peripheral subsystems.
Change-Id: I2c495dab9a6b5e3d07920f73c8a1a75d8035e2f6
Signed-off-by: Devender Kaushik <quic_dkaushik@quicinc.com>
Free the memory allocated for vm ids and permissions once
secure call for reassigning ownership is returned.
Change-Id: I3e811f93e6e00453fe6d7debb86ecf275ed448b9
Signed-off-by: Fenil Panwala <quic_fpanwala@quicinc.com>
