wcd_usbss is not support on pitti, so remove.
Change-Id: I1a0648fd5a5c55bab03ed14d8e81e266996f26d5
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
The perf_mode flag doesn't exist upstream yet, so the new
bcm_aggregate_mask() brought in from the LTS merge doesn't handle it.
Add back the perf_mode support.
Change-Id: I27d03ceceb55816c1d26735c8b3713fc32bbd9c2
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Enable the fastmap, ECATS debug, TLB sync timeout debug and
iommu logger features through related configs for pitti.
Change-Id: Ie854215fb42754500bc1e4f7cc54d5b8f0fc140c
Signed-off-by: Jaskaran Singh <quic_jasksing@quicinc.com>
Move XO clock in phy driver to remove the dependency on
dwc3 glue driver. Add the votes required for phy to
be operational using the optional ref_clk.
Change-Id: Ieb081ad1bbf9a00c4029ae9abdc1c58eaff81462
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Some devices are slow in responding to Control transfers. Scheduling
multiple transactions in one microframe/frame can cause these devices
to misbehave.
This change enables Sparse Control transaction so that the host
controller schedules each phase of a Control transfer in different
microframes/frames.
Change-Id: I6b1320d980852e6d85b0bb39fd566d6fdfaa54e9
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
The SoC Control Processor (SoCCPP) is small RISCV subsystem providing
support for general SoC infrastructure management that cannot be
effectively managed by the CPU or larger DSPs. It provides a solution
for control-plane processing, reducing per-subsystem microcontroller
reinvention.
SoCCP driver borrows the unprepare/start/stop/load/coredump callback
from the pas client driver and in addition adds an API (rproc_set_state),
this API is exposed to the SoCCP client drivers to control the power
modes of SoCCP. The power modes controlled by the clients are dormant
and active.
rproc_set_state is refcounted and the request to set to dormant state
is sent to SoCCP only if there are no active clients for SoCCP.
set_state_soccp is blocking API which polls on the config register for
the requested state change.
Change-Id: I7e2bf5e7c13afdb849a8008985a33b7d0f9b321a
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Signed-off-by: Kamati Srinivas <quic_kamasrin@quicinc.com>
Currently during system shutdown, power down command
is sent to ufs subsystem. After this we put all the
UFS rails in low power modes immediately but it seems
some ufs devices may still draw more than sleep current
from UFS rails (especially from VCCQ rail) at least for
some micro seconds. It causes OCP on VCCQ rail.
Hence avoid turning off UFS VCCQ regulator in ufs
shutdown by putting an additional vote on VCCQ
LDO if 'qcom,vccq-shutdown' is defined in target
DTS. UFS device LDO would be turned off by PMIC
regulator itself.
Change-Id: Ibf5764152e9460a0dc96ec121345920c06b985a5
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Memory dump and DCC modules need to be loaded at first stage to
setup the memory dump table and DCC link list early during boot
up.
Change-Id: Id5d4258ef7c8dafab218aac430aaf867546cfe6d
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
Add the register offset pair of USB3-DP phy for pitti.
Change-Id: Ia2a261fb88e6fb17fc772902f3fc17f5dbbc9ec7
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
Add support for gpu scan dump skip cooling device driver. This
driver will register with thermal framework as a cooling device.
This driver will enable the feature to update a PMIC SDAM and a
SOC cookie which will be checked in SDI path to disable GFX rail
and skip GPU Scan dump when ambient temperature is more than the
recommended threshold.
Change-Id: I8976a150e61254d98063ec9d5eabbfe733009fc6
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
limits_stress driver doesn't need to be probed at boot time.
It is a limits stress module and needs to be probed
on need basis for thermal stress testing.
Change-Id: Ib913a587905904672924988bf695224e1c52c11b
Signed-off-by: Nitesh Kumar <quic_nitekuma@quicinc.com>
Pitti is not DMA-coherent, so the support of an uncached system heap is
required for clients. Enable the uncached system heap for Pitti via the
config for it.
Change-Id: I7cbe19506f034b896acd771875cbefdfa4406b08
Signed-off-by: Jaskaran Singh <quic_jasksing@quicinc.com>
Enable the secure buffer driver for Pitti to allow memory buffers to be
secured.
Change-Id: I50893eb871d054efad458c7147ffc77d4fdcec6e
Signed-off-by: Jaskaran Singh <quic_jasksing@quicinc.com>
Enable the DMA-BUF system secure heaps for Pitti.
Change-Id: I3786a5b470c9266a7a2cbd04e0468b28addbdf8e
Signed-off-by: Jaskaran Singh <quic_jasksing@quicinc.com>
