net: mvneta: fix bit assignment for RX packet irq enable
A value originally defined in the driver was inappropriate. Even though the ingress was somehow working, writing MVNETA_RXQ_INTR_ENABLE_ALL_MASK to MVNETA_INTR_ENABLE didn't make any effect, because the bits [31:16] are reserved and read-only. This commit updates MVNETA_RXQ_INTR_ENABLE_ALL_MASK to be compliant with the controller's documentation. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Fixes: c5aff18204da ("net: mvneta: driver for Marvell Armada 370/XP network unit") Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller
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e5bdf689d3
commit
dc1aadf6f1
@ -160,7 +160,7 @@
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#define MVNETA_INTR_ENABLE 0x25b8
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#define MVNETA_TXQ_INTR_ENABLE_ALL_MASK 0x0000ff00
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#define MVNETA_RXQ_INTR_ENABLE_ALL_MASK 0xff000000 // note: neta says it's 0x000000FF
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#define MVNETA_RXQ_INTR_ENABLE_ALL_MASK 0x000000ff
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#define MVNETA_RXQ_CMD 0x2680
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#define MVNETA_RXQ_DISABLE_SHIFT 8
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