drm/i915/gvt: fix incorrect cache entry for guest page mapping
GPU hang observed during the guest OCL conformance test which is caused by THP GTT feature used durning the test. It was observed the same GFN with different size (4K and 2M) requested from the guest in GVT. So during the guest page dma map stage, it is required to unmap first with orginal size and then remap again with requested size. Fixes: b901b252b6cf ("drm/i915/gvt: Add 2M huge gtt support") Cc: stable@vger.kernel.org Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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Zhenyu Wang
parent
2089a76ade
commit
7366aeb77c
@ -1904,6 +1904,18 @@ static int kvmgt_dma_map_guest_page(unsigned long handle, unsigned long gfn,
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entry = __gvt_cache_find_gfn(info->vgpu, gfn);
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if (!entry) {
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ret = gvt_dma_map_page(vgpu, gfn, dma_addr, size);
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if (ret)
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goto err_unlock;
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ret = __gvt_cache_add(info->vgpu, gfn, *dma_addr, size);
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if (ret)
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goto err_unmap;
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} else if (entry->size != size) {
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/* the same gfn with different size: unmap and re-map */
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gvt_dma_unmap_page(vgpu, gfn, entry->dma_addr, entry->size);
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__gvt_cache_remove_entry(vgpu, entry);
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ret = gvt_dma_map_page(vgpu, gfn, dma_addr, size);
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if (ret)
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goto err_unlock;
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