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V_01-00-55

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1. 2500Base-X support for line speeds 2.5Gbps, 1Gbps, 100Mbps.
This commit is contained in:
TC956X 2022-09-02 18:20:48 +09:00 committed by jianzhou
parent b4f89f9d5c
commit 4c01755b35
4 changed files with 50 additions and 25 deletions
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11
Readme.md
View File

@ -1,7 +1,7 @@
# Toshiba Electronic Devices & Storage Corporation TC956X PCIe Ethernet Host Driver
Release Date: 31 Aug 2022
Release Date: 02 Sep 2022
Release Version: V_01-00-54 : Limited-tested version
Release Version: V_01-00-55 : Limited-tested version
TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
@ -65,8 +65,8 @@ TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
argument info:
mac0_interface: For PORT0 interface mode setting
mac1_interface: For PORT1 interface mode setting
x = [0: USXGMII, 1: XFI (default), 2: RGMII (unsupported), 3: SGMII]
y = [0: USXGMII (unsupported), 1: XFI (unsupported), 2: RGMII, 3: SGMII(default)]
x = [0: USXGMII, 1: XFI (default), 2: RGMII (unsupported), 3: SGMII, 4: 2500Base-X]
y = [0: USXGMII (unsupported), 1: XFI (unsupported), 2: RGMII, 3: SGMII(default), 4: 2500Base-X]
If invalid and unsupported modes are passed as kernel module parameter, the default interface mode will be selected.
@ -537,3 +537,6 @@ TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
## TC956X_Host_Driver_20220831_V_01-00-54:
1. Fix for configuring Rx Parser when EEE is enabled and RGMII Interface is used
## TC956X_Host_Driver_202200902_V_01-00-55:
1. 2500Base-X support for line speeds 2.5Gbps, 1Gbps, 100Mbps.

43
tc956x_pci.c
View File

@ -169,6 +169,9 @@
* VERSION : 01-00-53
* 31 Aug 2022 : 1. Version update
* VERSION : 01-00-54
* 02 Sep 2022 : 1. 2500Base-X support for line speeds 2.5Gbps, 1Gbps, 100Mbps.
* 2. Version update
* VERSION : 01-00-55
*/
#include <linux/clk-provider.h>
@ -235,7 +238,7 @@ unsigned int mac1_en_lp_pause_frame_cnt = DISABLE;
unsigned int mac_power_save_at_link_down = DISABLE;
static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 5, 4};
static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 5, 5};
static int tc956xmac_pm_usage_counter; /* Device Usage Counter */
struct mutex tc956x_pm_suspend_lock; /* This mutex is shared between all available EMAC ports. */
@ -955,7 +958,8 @@ static void xgmac_default_data(struct plat_tc956xmacenet_data *plat)
if (plat->port_interface == ENABLE_RGMII_INTERFACE)
plat->mac_port_sel_speed = 1000;
if (plat->port_interface == ENABLE_SGMII_INTERFACE) {
if ((plat->port_interface == ENABLE_SGMII_INTERFACE) ||
(plat->port_interface == ENABLE_2500BASE_X_INTERFACE)) {
plat->mac_port_sel_speed = 2500;
}
@ -1019,7 +1023,8 @@ static int tc956xmac_xgmac3_default_data(struct pci_dev *pdev,
plat->interface = PHY_INTERFACE_MODE_RGMII;
plat->max_speed = 1000;
}
if (plat->port_interface == ENABLE_SGMII_INTERFACE) {
if ((plat->port_interface == ENABLE_SGMII_INTERFACE) ||
(plat->port_interface == ENABLE_2500BASE_X_INTERFACE)) {
plat->interface = PHY_INTERFACE_MODE_SGMII;
plat->max_speed = 2500;
}
@ -2433,7 +2438,7 @@ static int tc956xmac_pci_probe(struct pci_dev *pdev,
if (res.port_num == RM_PF0_ID) {
/* Set the PORT0 interface mode to default, in case of invalid input */
if ((mac0_interface == ENABLE_RGMII_INTERFACE) ||
(mac0_interface > ENABLE_SGMII_INTERFACE))
(mac0_interface > ENABLE_2500BASE_X_INTERFACE))
mac0_interface = ENABLE_XFI_INTERFACE;
res.port_interface = mac0_interface;
@ -2442,7 +2447,7 @@ static int tc956xmac_pci_probe(struct pci_dev *pdev,
if (res.port_num == RM_PF1_ID) {
/* Set the PORT1 interface mode to default, in case of invalid input */
if ((mac1_interface < ENABLE_RGMII_INTERFACE) ||
(mac1_interface > ENABLE_SGMII_INTERFACE))
(mac1_interface > ENABLE_2500BASE_X_INTERFACE))
mac1_interface = ENABLE_SGMII_INTERFACE;
res.port_interface = mac1_interface;
@ -2591,7 +2596,8 @@ static int tc956xmac_pci_probe(struct pci_dev *pdev,
ret |= ((NCLKCTRL0_MAC0TXCEN | NCLKCTRL0_MAC0ALLCLKEN | NCLKCTRL0_MAC0RXCEN));
/* Only if "current" port is SGMII 2.5G, configure below clocks. */
if (res.port_interface == ENABLE_SGMII_INTERFACE) {
if ((res.port_interface == ENABLE_SGMII_INTERFACE) ||
(res.port_interface == ENABLE_2500BASE_X_INTERFACE)) {
ret &= ~NCLKCTRL0_POEPLLCEN;
ret &= ~NCLKCTRL0_SGMPCIEN;
ret &= ~NCLKCTRL0_REFCLKOCEN;
@ -2603,7 +2609,8 @@ static int tc956xmac_pci_probe(struct pci_dev *pdev,
/* Interface configuration for port0*/
ret = readl(res.addr + NEMAC0CTL_OFFSET);
ret &= ~(NEMACCTL_SP_SEL_MASK | NEMACCTL_PHY_INF_SEL_MASK);
if (res.port_interface == ENABLE_SGMII_INTERFACE)
if ((res.port_interface == ENABLE_SGMII_INTERFACE) ||
(res.port_interface == ENABLE_2500BASE_X_INTERFACE))
ret |= NEMACCTL_SP_SEL_SGMII_2500M;
else if ((res.port_interface == ENABLE_USXGMII_INTERFACE) ||
(res.port_interface == ENABLE_XFI_INTERFACE))
@ -2635,7 +2642,8 @@ static int tc956xmac_pci_probe(struct pci_dev *pdev,
ret |= ((NCLKCTRL1_MAC1TXCEN | NCLKCTRL1_MAC1RXCEN |
NCLKCTRL1_MAC1ALLCLKEN1 | 1 << 15));
if (res.port_interface == ENABLE_SGMII_INTERFACE) {
if ((res.port_interface == ENABLE_SGMII_INTERFACE) ||
(res.port_interface == ENABLE_2500BASE_X_INTERFACE)) {
ret &= ~NCLKCTRL1_MAC1125CLKEN1;
ret &= ~NCLKCTRL1_MAC1312CLKEN1;
}
@ -2646,7 +2654,8 @@ static int tc956xmac_pci_probe(struct pci_dev *pdev,
ret &= ~(NEMACCTL_SP_SEL_MASK | NEMACCTL_PHY_INF_SEL_MASK);
if (res.port_interface == ENABLE_RGMII_INTERFACE)
ret |= NEMACCTL_SP_SEL_RGMII_1000M;
else if (res.port_interface == ENABLE_SGMII_INTERFACE)
else if ((res.port_interface == ENABLE_SGMII_INTERFACE) ||
(res.port_interface == ENABLE_2500BASE_X_INTERFACE))
ret |= NEMACCTL_SP_SEL_SGMII_2500M;
else if ((res.port_interface == ENABLE_USXGMII_INTERFACE) ||
(res.port_interface == ENABLE_XFI_INTERFACE))
@ -3058,7 +3067,8 @@ static int tc956x_pcie_resume_config(struct pci_dev *pdev)
ret = readl(priv->tc956x_SFR_pci_base_addr + NCLKCTRL0_OFFSET);
ret |= ((NCLKCTRL0_MAC0TXCEN | NCLKCTRL0_MAC0ALLCLKEN | NCLKCTRL0_MAC0RXCEN));
if (priv->port_interface == ENABLE_SGMII_INTERFACE) {
if ((priv->port_interface == ENABLE_SGMII_INTERFACE) ||
(priv->port_interface == ENABLE_2500BASE_X_INTERFACE)) {
/* Disable Clocks for 2.5Gbps SGMII */
ret &= ~NCLKCTRL0_POEPLLCEN;
ret &= ~NCLKCTRL0_SGMPCIEN;
@ -3071,7 +3081,8 @@ static int tc956x_pcie_resume_config(struct pci_dev *pdev)
/* Interface configuration for port0*/
ret = readl(priv->tc956x_SFR_pci_base_addr + NEMAC0CTL_OFFSET);
ret &= ~(NEMACCTL_SP_SEL_MASK | NEMACCTL_PHY_INF_SEL_MASK);
if (priv->port_interface == ENABLE_SGMII_INTERFACE)
if ((priv->port_interface == ENABLE_SGMII_INTERFACE) ||
(priv->port_interface == ENABLE_2500BASE_X_INTERFACE))
ret |= NEMACCTL_SP_SEL_SGMII_2500M;
else if ((priv->port_interface == ENABLE_USXGMII_INTERFACE) ||
(priv->port_interface == ENABLE_XFI_INTERFACE))
@ -3103,7 +3114,8 @@ static int tc956x_pcie_resume_config(struct pci_dev *pdev)
ret |= ((NCLKCTRL1_MAC1TXCEN | NCLKCTRL1_MAC1RXCEN |
NCLKCTRL1_MAC1ALLCLKEN1 | 1 << 15));
if (priv->port_interface == ENABLE_SGMII_INTERFACE) {
if ((priv->port_interface == ENABLE_SGMII_INTERFACE) ||
(priv->port_interface == ENABLE_2500BASE_X_INTERFACE)) {
ret &= ~NCLKCTRL1_MAC1125CLKEN1;
ret &= ~NCLKCTRL1_MAC1312CLKEN1;
}
@ -3114,7 +3126,8 @@ static int tc956x_pcie_resume_config(struct pci_dev *pdev)
ret &= ~(NEMACCTL_SP_SEL_MASK | NEMACCTL_PHY_INF_SEL_MASK);
if (priv->port_interface == ENABLE_RGMII_INTERFACE)
ret |= NEMACCTL_SP_SEL_RGMII_1000M;
else if (priv->port_interface == ENABLE_SGMII_INTERFACE)
else if ((priv->port_interface == ENABLE_SGMII_INTERFACE) ||
(priv->port_interface == ENABLE_2500BASE_X_INTERFACE))
ret |= NEMACCTL_SP_SEL_SGMII_2500M;
else if ((priv->port_interface == ENABLE_USXGMII_INTERFACE) ||
(priv->port_interface == ENABLE_XFI_INTERFACE))
@ -3522,12 +3535,12 @@ MODULE_PARM_DESC(pcie_link_speed,
module_param(mac0_interface, uint, 0444);
MODULE_PARM_DESC(mac0_interface,
"PORT0 interface mode TC956X - default is 1,\
[0: USXGMII, 1: XFI, 2: RGMII(not supported), 3: SGMII]");
[0: USXGMII, 1: XFI, 2: RGMII(not supported), 3: SGMII, 4: 2500Base-X]");
module_param(mac1_interface, uint, 0444);
MODULE_PARM_DESC(mac1_interface,
"PORT1 interface mode TC956X - default is 3,\
[0: USXGMII(not supported), 1: XFI(not supported), 2: RGMII, 3: SGMII]");
[0: USXGMII(not supported), 1: XFI(not supported), 2: RGMII, 3: SGMII, 4: 2500Base-X]");
module_param(mac0_filter_phy_pause, uint, 0444);
MODULE_PARM_DESC(mac0_filter_phy_pause,

7
tc956xmac.h
View File

@ -160,6 +160,9 @@
* 31 Aug 2022 : 1. Added Fix for configuring Rx Parser when EEE is enabled and RGMII Interface is used
* 2. Version update.
* VERSION : 01-00-54
* 02 Sep 2022 : 1. 2500Base-X support for line speeds 2.5Gbps, 1Gbps, 100Mbps.
* 2. Version update
* VERSION : 01-00-55
*/
#ifndef __TC956XMAC_H__
@ -215,7 +218,7 @@
#define IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0") : ("eth1"))
#define WOL_IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0_wol") : ("eth1_wol"))
#define DRV_MODULE_VERSION "V_01-00-54"
#define DRV_MODULE_VERSION "V_01-00-55"
#define TC956X_FW_MAX_SIZE (64*1024)
#define ATR_AXI4_SLV_BASE 0x0800
@ -345,7 +348,7 @@
#define ENABLE_XFI_INTERFACE 1 /* XFI/SFI, this is same as USXGMII, except XPCS autoneg disabled */
#define ENABLE_RGMII_INTERFACE 2
#define ENABLE_SGMII_INTERFACE 3
#define ENABLE_2500BASE_X_INTERFACE 4
#define MTL_FPE_AFSZ_64 0
#define MTL_FPE_AFSZ_128 1
#define MTL_FPE_AFSZ_192 2

14
tc956xmac_main.c
View File

@ -133,6 +133,8 @@
* VERSION : 01-00-53
* 31 Aug 2022 : 1. Added Fix for configuring Rx Parser when EEE is enabled and RGMII Interface is used
* VERSION : 01-00-54
* 02 Sep 2022 : 1. 2500Base-X support for line speeds 2.5Gbps, 1Gbps, 100Mbps.
* VERSION : 01-00-55
*/
#include <linux/clk.h>
@ -3096,7 +3098,8 @@ static void tc956xmac_mac_config(struct phylink_config *config, unsigned int mod
tc956x_xpcs_write(priv->xpcsaddr, XGMAC_VR_XS_PCS_DIG_CTRL1, val);
config_done = true;
}
if (state->interface == PHY_INTERFACE_MODE_SGMII) { /* Autonegotiation not supported for SGMII */
if( (state->interface == PHY_INTERFACE_MODE_SGMII)
&& (priv->port_interface != ENABLE_2500BASE_X_INTERFACE) ) { /* Autonegotiation not supported for SGMII */
reg_value = tc956x_xpcs_read(priv->xpcsaddr, XGMAC_VR_MII_AN_INTR_STS);
/* Clear autonegotiation only if completed. As for XPCS, 2.5G autonegotiation is not supported */
/* Switching from SGMII 2.5G to any speed doesn't cause AN completion */
@ -3210,7 +3213,8 @@ static void tc956xmac_mac_an_restart(struct phylink_config *config)
if (priv->hw->xpcs) {
/*Enable XPCS Autoneg*/
if (priv->plat->interface == PHY_INTERFACE_MODE_10GKR) {
if ((priv->plat->interface == PHY_INTERFACE_MODE_10GKR) ||
(priv->plat->interface == ENABLE_2500BASE_X_INTERFACE)) {
enable_en = false;
KPRINT_INFO("%s :Port %d AN Enable:%d", __func__, priv->port_num, enable_en);
} else if (priv->plat->interface == PHY_INTERFACE_MODE_SGMII) {
@ -5625,7 +5629,8 @@ static int tc956xmac_hw_setup(struct net_device *dev, bool init_ptp)
#ifdef TC956X
if (priv->hw->xpcs) {
/*C37 AN enable*/
if (priv->plat->interface == PHY_INTERFACE_MODE_10GKR)
if ((priv->plat->interface == PHY_INTERFACE_MODE_10GKR) ||
(priv->plat->interface == ENABLE_2500BASE_X_INTERFACE))
enable_en = false;
else if (priv->plat->interface == PHY_INTERFACE_MODE_SGMII) {
if (priv->is_sgmii_2p5g == true)
@ -12807,7 +12812,8 @@ void tc956xmac_link_change_set_power(struct tc956xmac_priv *priv, enum TC956X_PO
KPRINT_INFO("XPCS initialization error\n");
/*C37 AN enable*/
if (priv->plat->interface == PHY_INTERFACE_MODE_10GKR)
if ((priv->plat->interface == PHY_INTERFACE_MODE_10GKR) ||
(priv->plat->interface == ENABLE_2500BASE_X_INTERFACE))
enable_en = false;
else if (priv->plat->interface == PHY_INTERFACE_MODE_SGMII) {
if (priv->is_sgmii_2p5g == true)