V_01-00-54
1. Fix for configuring Rx Parser when EEE is enabled and RGMII Interface is used
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@ -1,7 +1,7 @@
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# Toshiba Electronic Devices & Storage Corporation TC956X PCIe Ethernet Host Driver
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Release Date: 08 Aug 2022
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Release Date: 31 Aug 2022
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Release Version: V_01-00-53 : Limited-tested version
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Release Version: V_01-00-54 : Limited-tested version
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TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
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@ -534,3 +534,6 @@ TC956X PCIe EMAC driver is based on "Fedora 30, kernel-5.4.19".
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## TC956X_Host_Driver_20220808_V_01-00-53:
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1. For IPA offload path, disable RBU interrupt when RBU interrupt occurs.
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Interrupt should be enabled back in IPA SW.
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## TC956X_Host_Driver_20220831_V_01-00-54:
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1. Fix for configuring Rx Parser when EEE is enabled and RGMII Interface is used
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@ -167,6 +167,8 @@
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* VERSION : 01-00-52
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* 08 Aug 2022 : 1. Version update
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* VERSION : 01-00-53
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* 31 Aug 2022 : 1. Version update
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* VERSION : 01-00-54
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*/
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#include <linux/clk-provider.h>
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@ -233,7 +235,7 @@ unsigned int mac1_en_lp_pause_frame_cnt = DISABLE;
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unsigned int mac_power_save_at_link_down = DISABLE;
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static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 5, 3};
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static const struct tc956x_version tc956x_drv_version = {0, 1, 0, 0, 5, 4};
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static int tc956xmac_pm_usage_counter; /* Device Usage Counter */
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struct mutex tc956x_pm_suspend_lock; /* This mutex is shared between all available EMAC ports. */
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10
tc956xmac.h
10
tc956xmac.h
@ -154,9 +154,12 @@
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* VERSION : 01-00-51
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* 15 Jun 2022 : 1. Added debugfs support for module specific register dump
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* 2. Version update.
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* VERSION : 01-00-52
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* VERSION : 01-00-52
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* 08 Aug 2022 : 1. Version update
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* VERSION : 01-00-53
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* 31 Aug 2022 : 1. Added Fix for configuring Rx Parser when EEE is enabled and RGMII Interface is used
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* 2. Version update.
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* VERSION : 01-00-54
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*/
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#ifndef __TC956XMAC_H__
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@ -212,7 +215,7 @@
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#define IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0") : ("eth1"))
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#define WOL_IRQ_DEV_NAME(x) (((x) == RM_PF0_ID) ? ("eth0_wol") : ("eth1_wol"))
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#define DRV_MODULE_VERSION "V_01-00-53"
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#define DRV_MODULE_VERSION "V_01-00-54"
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#define TC956X_FW_MAX_SIZE (64*1024)
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#define ATR_AXI4_SLV_BASE 0x0800
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@ -357,6 +360,8 @@
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#define TC956XMAC_ALIGN(x) ALIGN(ALIGN(x, SMP_CACHE_BYTES), 16)
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#define TC956X_MAX_LINK_DELAY 800
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#ifdef DMA_OFFLOAD_ENABLE
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struct tc956xmac_cm3_tamap {
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u32 trsl_addr_hi;
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@ -705,6 +710,7 @@ struct tc956xmac_priv {
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#ifdef CONFIG_DEBUG_FS
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struct dentry *debugfs_dir; /* debugfs structure pointer for port specific */
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#endif
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unsigned long link_state;
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};
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struct tc956x_version {
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@ -128,9 +128,11 @@
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* 2. Added kernel Module parameter for selecting Power saving at Link down.
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* VERSION : 01-00-51
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* 15 Jun 2022 : 1. Added debugfs support for module specific register dump
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* VERSION : 01-00-52
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* VERSION : 01-00-52
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* 08 Aug 2022 : 1. Disable RBU interrupt on RBU interrupt occurance. IPA SW should enable it back.
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* VERSION : 01-00-53
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* VERSION : 01-00-53
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* 31 Aug 2022 : 1. Added Fix for configuring Rx Parser when EEE is enabled and RGMII Interface is used
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* VERSION : 01-00-54
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*/
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#include <linux/clk.h>
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@ -299,6 +301,7 @@ extern unsigned int mac_power_save_at_link_down;
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extern unsigned int mac0_force_speed_mode;
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extern unsigned int mac1_force_speed_mode;
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extern int phy_ethtool_set_eee_2p5(struct phy_device *phydev, struct ethtool_eee *data);
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static int dwxgmac2_rx_parser_read_entry(struct tc956xmac_priv *priv,
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struct tc956xmac_rx_parser_entry *entry, int entry_pos)
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@ -3517,6 +3520,8 @@ static void tc956xmac_mac_link_up(struct phylink_config *config,
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#endif
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DBGPR_FUNC(priv->device, "%s priv->eee_enabled: %d priv->eee_active: %d\n", __func__, priv->eee_enabled, priv->eee_active);
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clear_bit(TC956XMAC_DOWN, &priv->link_state);
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#ifdef TC956X_PM_DEBUG
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pm_generic_resume(priv->device);
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#endif
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@ -7631,11 +7636,45 @@ static void tc956xmac_poll_controller(struct net_device *dev)
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int tc956xmac_rx_parser_configuration(struct tc956xmac_priv *priv)
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{
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int ret = -EINVAL;
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int ret = -EINVAL, re_init_eee = 0, dly_cnt = 0, ret_val;
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struct ethtool_eee edata;
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/* Disable XPCS Rx LPI to configure FRP in EEE mode */
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if (priv->eee_enabled)
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tc956x_xpcs_ctrl0_lrx(priv, false);
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/* Disable EEE before configuring FRP */
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if (priv->eee_active) {
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if (priv->hw->xpcs)
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tc956x_xpcs_ctrl0_lrx(priv, false);
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else {
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ret_val = phylink_ethtool_get_eee(priv->phylink, &edata);
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if (ret_val)
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KPRINT_INFO("Phylink get EEE error \n\r");
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KPRINT_INFO("Disabling EEE \n\r");
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priv->eee_enabled = 0;
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edata.tx_lpi_enabled = priv->eee_enabled;
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edata.tx_lpi_timer = priv->tx_lpi_timer;
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edata.eee_enabled = priv->eee_enabled;
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set_bit(TC956XMAC_DOWN, &priv->link_state);
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tc956xmac_disable_eee_mode(priv);
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ret_val = phylink_ethtool_set_eee(priv->phylink, &edata);
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ret_val |= phy_ethtool_set_eee_2p5(priv->dev->phydev, &edata);
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if (ret_val)
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KPRINT_INFO("Phylink EEE config error \n\r");
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/* Wait for AN - link down, link up sequence */
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while (test_bit(TC956XMAC_DOWN, &priv->link_state)) {
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msleep(10);
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if (dly_cnt++ >= TC956X_MAX_LINK_DELAY) {
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KPRINT_INFO("Link Up Timeout \n\r");
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break;
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}
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}
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KPRINT_INFO("AN duration : %d \n\r", dly_cnt*10);
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}
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re_init_eee = 1;
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}
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if (priv->hw->mac->rx_parser_init && priv->plat->rxp_cfg.enable)
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ret = tc956xmac_rx_parser_init(priv,
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@ -7643,11 +7682,49 @@ int tc956xmac_rx_parser_configuration(struct tc956xmac_priv *priv)
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priv->dma_cap.frpsel, priv->dma_cap.frpes,
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&priv->plat->rxp_cfg);
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/* Enable XPCS Rx LPI after configuring FRP in EEE mode */
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if (priv->eee_enabled)
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tc956x_xpcs_ctrl0_lrx(priv, true);
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/* Restore EEE state */
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if (re_init_eee) {
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re_init_eee = 0;
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/* spram feautre is not present in TC956X */
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if (priv->hw->xpcs)
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tc956x_xpcs_ctrl0_lrx(priv, true);
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else {
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ret_val = phylink_ethtool_get_eee(priv->phylink, &edata);
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if (ret_val)
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KPRINT_INFO("Phylink get EEE error \n\r");
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KPRINT_INFO("Enabling EEE \n\r");
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edata.tx_lpi_enabled = priv->eee_enabled;
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edata.tx_lpi_timer = priv->tx_lpi_timer;
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edata.eee_enabled = 1;
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set_bit(TC956XMAC_DOWN, &priv->link_state);
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edata.eee_enabled = tc956xmac_eee_init(priv);
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priv->eee_enabled = edata.eee_enabled;
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if (!edata.eee_enabled)
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KPRINT_INFO("Error in init_eee \n\r");
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ret_val = phylink_ethtool_set_eee(priv->phylink, &edata);
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ret_val |= phy_ethtool_set_eee_2p5(priv->dev->phydev, &edata);
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if (ret_val)
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KPRINT_INFO("Phylink EEE config error \n\r");
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/* Wait for AN - link down, link up sequence */
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dly_cnt = 0;
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while (test_bit(TC956XMAC_DOWN, &priv->link_state)) {
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msleep(10);
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if (dly_cnt++ >= TC956X_MAX_LINK_DELAY) {
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KPRINT_INFO("Link Up Timeout \n\r");
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break;
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}
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}
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KPRINT_INFO("AN duration : %d \n\r", dly_cnt*10);
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}
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}
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/* spram feautre is not present in TC956X */
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if (ret)
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priv->rxp_enabled = false;
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else
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