mfd: lpc_ich: Remove lpc_ich_cfg struct use
Future chipsets will use different register layouts that don't map cleanly to the lpc_ich_cfg fields. Remove the lpc_ich_cfg struct and add explicit fields to the higher level lpc_ich_priv structure. This change should have no functional impact. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Rajat Jain <rajatjain@juniper.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -89,16 +89,16 @@
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#define wdt_mem_res(i) wdt_res(ICH_RES_MEM_OFF, i)
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#define wdt_res(b, i) (&wdt_ich_res[(b) + (i)])
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struct lpc_ich_cfg {
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int base;
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int ctrl;
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int save;
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};
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struct lpc_ich_priv {
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int chipset;
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struct lpc_ich_cfg acpi;
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struct lpc_ich_cfg gpio;
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int abase; /* ACPI base */
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int actrl; /* ACPI control or PMC base */
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int gbase; /* GPIO base */
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int gctrl; /* GPIO control */
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int actrl_save; /* Cached ACPI control base value */
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int gctrl_save; /* Cached GPIO control value */
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};
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static struct resource wdt_ich_res[] = {
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@ -742,14 +742,14 @@ static void lpc_ich_restore_config_space(struct pci_dev *dev)
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{
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struct lpc_ich_priv *priv = pci_get_drvdata(dev);
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if (priv->acpi.save >= 0) {
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pci_write_config_byte(dev, priv->acpi.ctrl, priv->acpi.save);
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priv->acpi.save = -1;
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if (priv->actrl_save >= 0) {
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pci_write_config_byte(dev, priv->actrl, priv->actrl_save);
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priv->actrl_save = -1;
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}
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if (priv->gpio.save >= 0) {
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pci_write_config_byte(dev, priv->gpio.ctrl, priv->gpio.save);
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priv->gpio.save = -1;
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if (priv->gctrl_save >= 0) {
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pci_write_config_byte(dev, priv->gctrl, priv->gctrl_save);
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priv->gctrl_save = -1;
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}
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}
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@ -758,9 +758,9 @@ static void lpc_ich_enable_acpi_space(struct pci_dev *dev)
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struct lpc_ich_priv *priv = pci_get_drvdata(dev);
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u8 reg_save;
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pci_read_config_byte(dev, priv->acpi.ctrl, ®_save);
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pci_write_config_byte(dev, priv->acpi.ctrl, reg_save | 0x80);
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priv->acpi.save = reg_save;
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pci_read_config_byte(dev, priv->actrl, ®_save);
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pci_write_config_byte(dev, priv->actrl, reg_save | 0x80);
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priv->actrl_save = reg_save;
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}
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static void lpc_ich_enable_gpio_space(struct pci_dev *dev)
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@ -768,9 +768,9 @@ static void lpc_ich_enable_gpio_space(struct pci_dev *dev)
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struct lpc_ich_priv *priv = pci_get_drvdata(dev);
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u8 reg_save;
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pci_read_config_byte(dev, priv->gpio.ctrl, ®_save);
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pci_write_config_byte(dev, priv->gpio.ctrl, reg_save | 0x10);
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priv->gpio.save = reg_save;
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pci_read_config_byte(dev, priv->gctrl, ®_save);
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pci_write_config_byte(dev, priv->gctrl, reg_save | 0x10);
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priv->gctrl_save = reg_save;
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}
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static void lpc_ich_finalize_cell(struct pci_dev *dev, struct mfd_cell *cell)
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@ -815,7 +815,7 @@ static int lpc_ich_init_gpio(struct pci_dev *dev)
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struct resource *res;
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/* Setup power management base register */
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pci_read_config_dword(dev, priv->acpi.base, &base_addr_cfg);
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pci_read_config_dword(dev, priv->abase, &base_addr_cfg);
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base_addr = base_addr_cfg & 0x0000ff80;
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if (!base_addr) {
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dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n");
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@ -841,7 +841,7 @@ static int lpc_ich_init_gpio(struct pci_dev *dev)
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gpe0_done:
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/* Setup GPIO base register */
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pci_read_config_dword(dev, priv->gpio.base, &base_addr_cfg);
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pci_read_config_dword(dev, priv->gbase, &base_addr_cfg);
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base_addr = base_addr_cfg & 0x0000ff80;
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if (!base_addr) {
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dev_notice(&dev->dev, "I/O space for GPIO uninitialized\n");
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@ -891,7 +891,7 @@ static int lpc_ich_init_wdt(struct pci_dev *dev)
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struct resource *res;
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/* Setup power management base register */
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pci_read_config_dword(dev, priv->acpi.base, &base_addr_cfg);
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pci_read_config_dword(dev, priv->abase, &base_addr_cfg);
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base_addr = base_addr_cfg & 0x0000ff80;
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if (!base_addr) {
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dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n");
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@ -952,17 +952,18 @@ static int lpc_ich_probe(struct pci_dev *dev,
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return -ENOMEM;
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priv->chipset = id->driver_data;
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priv->acpi.save = -1;
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priv->acpi.base = ACPIBASE;
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priv->acpi.ctrl = ACPICTRL;
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priv->gpio.save = -1;
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priv->actrl_save = -1;
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priv->abase = ACPIBASE;
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priv->actrl = ACPICTRL;
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priv->gctrl_save = -1;
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if (priv->chipset <= LPC_ICH5) {
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priv->gpio.base = GPIOBASE_ICH0;
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priv->gpio.ctrl = GPIOCTRL_ICH0;
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priv->gbase = GPIOBASE_ICH0;
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priv->gctrl = GPIOCTRL_ICH0;
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} else {
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priv->gpio.base = GPIOBASE_ICH6;
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priv->gpio.ctrl = GPIOCTRL_ICH6;
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priv->gbase = GPIOBASE_ICH6;
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priv->gctrl = GPIOCTRL_ICH6;
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}
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pci_set_drvdata(dev, priv);
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