Merge "Revert "mmc: sdhci-msm: Update dll_config_3 as per HSR""

This commit is contained in:
qctecmdr 2023-09-05 02:34:25 -07:00 committed by Gerrit - the friendly Code Review server
commit 3bc91ac7f1

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@ -90,9 +90,6 @@
#define FINE_TUNE_MODE_EN BIT(27) #define FINE_TUNE_MODE_EN BIT(27)
#define BIAS_OK_SIGNAL BIT(29) #define BIAS_OK_SIGNAL BIT(29)
#define DLL_CONFIG_3_LOW_FREQ_VAL 0x08
#define DLL_CONFIG_3_HIGH_FREQ_VAL 0x10
#define CORE_VENDOR_SPEC_POR_VAL 0xa9c #define CORE_VENDOR_SPEC_POR_VAL 0xa9c
#define CORE_CLK_PWRSAVE BIT(1) #define CORE_CLK_PWRSAVE BIT(1)
#define CORE_VNDR_SPEC_ADMA_ERR_SIZE_EN BIT(7) #define CORE_VNDR_SPEC_ADMA_ERR_SIZE_EN BIT(7)
@ -1041,16 +1038,6 @@ static int msm_init_cm_dll(struct sdhci_host *host,
ENABLE_DLL_LOCK_STATUS | BIAS_OK_SIGNAL; ENABLE_DLL_LOCK_STATUS | BIAS_OK_SIGNAL;
writel_relaxed(config, host->ioaddr + writel_relaxed(config, host->ioaddr +
msm_offset->core_dll_usr_ctl); msm_offset->core_dll_usr_ctl);
config = readl_relaxed(host->ioaddr +
msm_offset->core_dll_config_3);
config &= ~0xFF;
if (msm_host->clk_rate < 150000000)
config |= DLL_CONFIG_3_LOW_FREQ_VAL;
else
config |= DLL_CONFIG_3_HIGH_FREQ_VAL;
writel_relaxed(config, host->ioaddr +
msm_offset->core_dll_config_3);
} }
/* Step 11 - Wait for 52us */ /* Step 11 - Wait for 52us */