84c021cfef
Add the E3 release HW header files for QCA5018 Change-Id: Iab5b1cedf7b72f391adc4ebe57a4376a9c1c4239
229 lines
6.2 KiB
C
229 lines
6.2 KiB
C
/*
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* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _RX_MPDU_LINK_PTR_H_
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#define _RX_MPDU_LINK_PTR_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "buffer_addr_info.h"
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// ################ START SUMMARY #################
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//
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// Dword Fields
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// 0-1 struct buffer_addr_info mpdu_link_desc_addr_info;
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//
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// ################ END SUMMARY #################
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#define NUM_OF_DWORDS_RX_MPDU_LINK_PTR 2
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struct rx_mpdu_link_ptr {
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struct buffer_addr_info mpdu_link_desc_addr_info;
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};
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/*
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struct buffer_addr_info mpdu_link_desc_addr_info
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Details of the physical address of an MPDU link
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descriptor
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*/
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/* EXTERNAL REFERENCE : struct buffer_addr_info mpdu_link_desc_addr_info */
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/* Description RX_MPDU_LINK_PTR_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
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Address (lower 32 bits) of the MSDU buffer OR
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MSDU_EXTENSION descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define RX_MPDU_LINK_PTR_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
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#define RX_MPDU_LINK_PTR_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
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#define RX_MPDU_LINK_PTR_0_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
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/* Description RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
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Address (upper 8 bits) of the MSDU buffer OR
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MSDU_EXTENSION descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
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#define RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
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#define RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
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/* Description RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
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Consumer: WBM
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Producer: SW/FW
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In case of 'NULL' pointer, this field is set to 0
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Indicates to which buffer manager the buffer OR
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MSDU_EXTENSION descriptor OR link descriptor that is being
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pointed to shall be returned after the frame has been
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processed. It is used by WBM for routing purposes.
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<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
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to the WMB buffer idle list
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<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
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returned to the WMB idle link descriptor idle list
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<enum 2 FW_BM> This buffer shall be returned to the FW
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<enum 3 SW0_BM> This buffer shall be returned to the SW,
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ring 0
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<enum 4 SW1_BM> This buffer shall be returned to the SW,
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ring 1
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<enum 5 SW2_BM> This buffer shall be returned to the SW,
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ring 2
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<enum 6 SW3_BM> This buffer shall be returned to the SW,
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ring 3
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<enum 7 SW4_BM> This buffer shall be returned to the SW,
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ring 4
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<legal all>
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*/
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#define RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
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#define RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
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#define RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
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/* Description RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
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Cookie field exclusively used by SW.
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In case of 'NULL' pointer, this field is set to 0
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HW ignores the contents, accept that it passes the
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programmed value on to other descriptors together with the
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physical address
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Field can be used by SW to for example associate the
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buffers physical address with the virtual address
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The bit definitions as used by SW are within SW HLD
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specification
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NOTE1:
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The three most significant bits can have a special
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meaning in case this struct is embedded in a TX_MPDU_DETAILS
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STRUCT, and field transmit_bw_restriction is set
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In case of NON punctured transmission:
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Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
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Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
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Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
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Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
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In case of punctured transmission:
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Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
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Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
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Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
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Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
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Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
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Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
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Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
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Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
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Note: a punctured transmission is indicated by the
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presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
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TLV
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NOTE 2:The five most significant bits can have a special
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meaning in case this struct is embedded in an
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RX_MSDU_DETAILS STRUCT, and Maple/Spruce Rx DMA is
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configured for passing on the additional info
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from 'RX_MPDU_INFO' structure in 'RX_MPDU_START' TLV
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(FR56821). This is not supported in HastingsPrime, Pine or
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Moselle.
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Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS
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control field
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Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field
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indicates MPDUs with a QoS control field.
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<legal all>
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*/
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#define RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
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#define RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
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#define RX_MPDU_LINK_PTR_1_MPDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
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#endif // _RX_MPDU_LINK_PTR_H_
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