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Add 'qcom/opensource/dataipa/' from commit 'c743113db7f6155cc71476182dfbbbc78f32dc29'

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git-subtree-dir: qcom/opensource/dataipa
git-subtree-mainline: 78e1eefbdb
git-subtree-split: c743113db7
Change-Id:
repo: https://git.codelinaro.org/clo/la/platform/vendor/opensource/dataipa
tag: LA.VENDOR.14.3.0.r1-17300-lanai.QSSI15.0
This commit is contained in:
David Wronek 2024-10-06 16:44:09 +02:00
commit 235599e5f6
345 changed files with 630105 additions and 0 deletions
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116
qcom/opensource/dataipa/BUILD.bazel Normal file
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load(":define_modules.bzl", "define_modules")
load("//build/kernel/kleaf:kernel.bzl", "ddk_headers")
define_modules("pineapple", "consolidate")
define_modules("pineapple", "gki")
define_modules("blair", "consolidate")
define_modules("blair", "gki")
define_modules("monaco", "consolidate")
define_modules("monaco", "gki")
define_modules("pitti", "consolidate")
define_modules("pitti", "gki")
define_modules("volcano", "consolidate")
define_modules("volcano", "gki")
define_modules("niobe", "consolidate")
define_modules("niobe", "gki")
package(
default_visibility = [
"//visibility:public",
],
)
ddk_headers(
name = "include_headers",
hdrs = glob([
"drivers/platform/msm/include/linux/*.h",
"drivers/platform/msm/include/uapi/linux/*.h",
]),
includes = [
"drivers/platform/msm/include",
"drivers/platform/msm/include/linux",
"drivers/platform/msm/include/uapi",
],
)
ddk_headers(
name = "gsi_headers",
hdrs = glob([
"drivers/platform/msm/gsi/*.h",
"drivers/platform/msm/gsi/gsihal/*.h",
]),
includes = [
"drivers/platform/msm/gsi",
"drivers/platform/msm/gsi/gsihal",
],
)
ddk_headers(
name = "ipa_headers",
hdrs = glob([
"drivers/platform/msm/ipa/*.h",
"drivers/platform/msm/ipa/ipa_test_module/*.h",
"drivers/platform/msm/ipa/ipa_v3/*.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/*.h",
]),
includes = [
"drivers/platform/msm/ipa",
"drivers/platform/msm/ipa/ipa_test_module",
"drivers/platform/msm/ipa/ipa_v3",
"drivers/platform/msm/ipa/ipa_v3/ipahal",
],
)
ddk_headers(
name = "ipa_clients",
hdrs = glob([
"drivers/platform/msm/ipa/ipa_clients/*.h",
]),
includes = ["drivers/platform/msm/ipa/ipa_clients"],
)
ddk_headers(
name = "consolidate_config_headers",
hdrs = [
"config/dataipa_debug.h",
"config/dataipa_vendor.h",
],
includes = ["config"],
)
ddk_headers(
name = "gki_config_headers",
hdrs = [
"config/dataipa_vendor.h",
],
includes = ["config"],
)
genrule(
name = "consolidate_defconfig",
srcs = [
"config/dataipa_GKI_consolidate.conf",
"config/dataipa_GKI.conf",
],
outs = ["consolidate_defconfig.conf"],
cmd = "cat $(SRCS) | sed -e 's/^export //g' > $@",
)
genrule(
name = "gki_defconfig",
srcs = [
"config/dataipa_GKI.conf",
],
outs = ["gki_defconfig.conf"],
cmd = "cat $(SRCS) | sed -e 's/^export //g' > $@",
)

3
qcom/opensource/dataipa/Makefile Normal file
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# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_ARCH_QCOM) += drivers/platform/msm/

68
qcom/opensource/dataipa/config/Kconfig Normal file
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config GSI
tristate "Short description of export GSI"
help
Long description of export GSI
config IPA_CLIENTS_MANAGER
tristate "Short description of export IPA_CLIENTS_MANAGER"
help
Long description of export IPA_CLIENTS_MANAGER
config IPA_WDI_UNIFIED_API
bool "Short description of export IPA_WDI_UNIFIED_API"
help
Long description of export IPA_WDI_UNIFIED_API
config RMNET_IPA3
bool "Short description of export RMNET_IPA3"
help
Long description of export RMNET_IPA3
config RNDIS_IPA
tristate "Short description of export RNDIS_IPA"
help
Long description of export RNDIS_IPA
config IPA3_REGDUMP
bool "Short description of export IPA3_REGDUMP"
help
Long description of export IPA3_REGDUMP
config IPA3_REGDUMP_IPA_5_5
bool "Short description of export IPA3_REGDUMP_IPA_5_5"
help
Long description of export IPA3_REGDUMP_IPA_5_5
config IPA_KERNEL_TESTS_MODULE
tristate "Short description of export IPA_KERNEL_TESTS_MODULE"
help
Long description of export IPA_KERNEL_TESTS_MODULE
config IPA3_MHI_PRIME_MANAGER
bool "Short description of export IPA_KERNEL_TESTS_MODULE"
help
Long description of export IPA_KERNEL_TESTS_MODULE
config IPA_TSP
bool "Short description of export IPA_TSP"
help
Long description of export IPA_TSP
config ECM_IPA
bool "Short description of export CONFIG_ECM_IPA"
help
Long description of export CONFIG_ECM_IPA
config IPA_EMULATION
bool "Short description of export CONFIG_IPA_EMULATION"
help
Long description of export CONFIG_IPA_EMULATION
config IPA_DEBUG
bool "Short description of export IPA_DEBUG"
help
Long description of export IPA_DEBUG
config IPA_UT
bool "Short description of export CONFIG_IPA_UT"
help
Long description of export CONFIG_IPA_UT

339
qcom/opensource/dataipa/config/LICENSE Normal file
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GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Lesser General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
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These restrictions translate to certain responsibilities for you if you
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For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
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rights.
We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
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that everyone understands that there is no warranty for this free
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Finally, any free program is threatened constantly by software
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The precise terms and conditions for copying, distribution and
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GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.
You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.
2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
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a) You must cause the modified files to carry prominent notices
stating that you changed the files and the date of any change.
b) You must cause any work that you distribute or publish, that in
whole or in part contains or is derived from the Program or any
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c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
interactive use in the most ordinary way, to print or display an
announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
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these conditions, and telling the user how to view a copy of this
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
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this License, whose permissions for other licensees extend to the
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Thus, it is not the intent of this section to claim rights or contest
your rights to work written entirely by you; rather, the intent is to
exercise the right to control the distribution of derivative or
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In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
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a) Accompany it with the complete corresponding machine-readable
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except as expressly provided under this License. Any attempt
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the only way you could satisfy both it and this License would be to
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any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
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such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
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This section is intended to make thoroughly clear what is believed to
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certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
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NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
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YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
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END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

10
qcom/opensource/dataipa/config/NOTICE Normal file
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Copyright (c) 2021 The Linux Foundation. All rights reserved.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 2 and
only version 2 as published by the Free Software Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.

13
qcom/opensource/dataipa/config/dataipa.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#define CONFIG_GSI 1
#define CONFIG_RMNET_IPA3 1
#define CONFIG_RNDIS_IPA 1
#define CONFIG_IPA_WDI_UNIFIED_API 1
#define CONFIG_ECM_IPA 1
#define CONFIG_IPA3_REGDUMP 1
#define CONFIG_IPA3_REGDUMP_IPA_5_5 1

8
qcom/opensource/dataipa/config/dataipa_GKI.conf Normal file
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export CONFIG_GSI=m
export CONFIG_IPA_CLIENTS_MANAGER=m
export CONFIG_IPA_WDI_UNIFIED_API=y
export CONFIG_RMNET_IPA3=y
export CONFIG_RNDIS_IPA=m
export CONFIG_IPA3_REGDUMP=y
export CONFIG_IPA3_REGDUMP_IPA_5_5=y
export CONFIG_IPA_KERNEL_TESTS_MODULE=m

2
qcom/opensource/dataipa/config/dataipa_GKI_consolidate.conf Normal file
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export CONFIG_IPA_DEBUG=y
export CONFIG_IPA_UT=y

5
qcom/opensource/dataipa/config/dataipa_GKI_ipav4.conf Normal file
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export CONFIG_GSI=m
export CONFIG_IPA_CLIENTS_MANAGER=m
export CONFIG_IPA_WDI_UNIFIED_API=y
export CONFIG_RMNET_IPA3=y
export CONFIG_RNDIS_IPA=m

8
qcom/opensource/dataipa/config/dataipa_QGKI.conf Normal file
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export CONFIG_GSI=y
export CONFIG_IPA_CLIENTS_MANAGER=y
export CONFIG_IPA_WDI_UNIFIED_API=y
export CONFIG_RMNET_IPA3=y
export CONFIG_RNDIS_IPA=y
export CONFIG_ECM_IPA=y
export CONFIG_IPA3_REGDUMP=y
export CONFIG_IPA3_REGDUMP_IPA_5_5=y

3
qcom/opensource/dataipa/config/dataipa_debug.conf Normal file
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export CONFIG_IPA_DEBUG=y
export CONFIG_IPA_UT=y
export CONFIG_IPA_KERNEL_TESTS_MODULE=y

8
qcom/opensource/dataipa/config/dataipa_debug.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
*/
#define CONFIG_IPA_DEBUG 1
#define CONFIG_IPA_UT 1
#define CONFIG_IPA_KERNEL_TESTS_MODULE 1

14
qcom/opensource/dataipa/config/dataipa_vendor.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#define CONFIG_GSI 1
#define CONFIG_RMNET_IPA3 1
#define CONFIG_RNDIS_IPA 1
#define CONFIG_IPA_WDI_UNIFIED_API 1
#define CONFIG_IPA_VENDOR_DLKM 1
#define CONFIG_IPA3_REGDUMP 1
#define CONFIG_IPA3_REGDUMP_IPA_5_5 1
#define CONFIG_IPA_KERNEL_TESTS_MODULE 1

10
qcom/opensource/dataipa/config/dataipa_vendor_ipav4.h Normal file
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/*
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/* SPDX-License-Identifier: GPL-2.0-only */
#define CONFIG_GSI 1
#define CONFIG_RMNET_IPA3 1
#define CONFIG_RNDIS_IPA 1
#define CONFIG_IPA_WDI_UNIFIED_API 1
#define CONFIG_IPA_VENDOR_DLKM 1

10
qcom/opensource/dataipa/config/sa410mdataipa.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#define CONFIG_GSI 1
#define CONFIG_RMNET_IPA3 1
#define CONFIG_RNDIS_IPA 1
#define CONFIG_ECM_IPA 1
#define CONFIG_IPA_WDI_UNIFIED_API 1

6
qcom/opensource/dataipa/config/sa410mdataipa_QGKI.conf Normal file
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export CONFIG_GSI=y
export CONFIG_IPA_CLIENTS_MANAGER=y
export CONFIG_IPA_WDI_UNIFIED_API=y
export CONFIG_RMNET_IPA3=y
export CONFIG_RNDIS_IPA=y
export CONFIG_ECM_IPA=y

10
qcom/opensource/dataipa/config/sdx12dataipa.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*/
#define CONFIG_GSI 1
#define CONFIG_RMNET_IPA3 1
#define CONFIG_RNDIS_IPA 1
#define CONFIG_ECM_IPA 1

5
qcom/opensource/dataipa/config/sdx12dataipa_QGKI.conf Normal file
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export CONFIG_GSI=y
export CONFIG_IPA_CLIENTS_MANAGER=y
export CONFIG_RMNET_IPA3=y
export CONFIG_RNDIS_IPA=y
export CONFIG_ECM_IPA=y

4
qcom/opensource/dataipa/dataipa_binary_vendor_product.mk Normal file
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ifeq ($(CONFIG_LOCALVERSION), "-gki-consolidate")
PRODUCT_PACKAGES += ipa-kernel-tests
$(warning "added ipa-kernel-tests")
endif

23
qcom/opensource/dataipa/dataipa_dlkm_vendor_board.mk Normal file
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#Build ipa
TARGET_DATAIPA_DLKM_ENABLE := false
ifeq ($(TARGET_KERNEL_DLKM_DISABLE), true)
ifeq ($(TARGET_KERNEL_DLKM_DATAIPA_OVERRIDE), true)
TARGET_DATAIPA_DLKM_ENABLE := true
endif
else
TARGET_DATAIPA_DLKM_ENABLE := true
endif
ifeq ($(TARGET_DATAIPA_DLKM_ENABLE), true)
DATA_DLKM_BOARD_PLATFORMS_LIST := taro kalama bengal monaco pineapple blair holi cliffs pitti volcano niobe
ifneq ($(TARGET_BOARD_AUTO),true)
ifeq ($(call is-board-platform-in-list,$(DATA_DLKM_BOARD_PLATFORMS_LIST)),true)
BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/gsim.ko
BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/ipam.ko
BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/ipanetm.ko
ifeq ($(CONFIG_LOCALVERSION), "-gki-consolidate")
BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/ipatestm.ko
endif
endif
endif
endif

6
qcom/opensource/dataipa/dataipa_dlkm_vendor_product.mk Normal file
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PRODUCT_PACKAGES += gsim.ko
PRODUCT_PACKAGES += ipam.ko
PRODUCT_PACKAGES += ipanetm.ko
ifeq ($(CONFIG_LOCALVERSION), "-gki-consolidate")
PRODUCT_PACKAGES += ipatestm.ko
endif

296
qcom/opensource/dataipa/define_modules.bzl Normal file
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load("//build/bazel_common_rules/dist:dist.bzl", "copy_to_dist_dir")
load("//msm-kernel:target_variants.bzl", "get_all_variants")
load("//build/kernel/kleaf:kernel.bzl", "ddk_module")
def define_modules(target, variant):
kernel_build_variant = "{}_{}".format(target, variant)
include_base = "../../../{}".format(native.package_name())
#The below will take care of the defconfig
include_defconfig = ":{}_defconfig".format(variant)
mod_list = []
ipam_deps_list = []
ipam_local_defines = []
if target != "niobe":
ipam_deps_list.append(
"//vendor/qcom/opensource/datarmnet-ext/mem:{}_rmnet_mem".format(kernel_build_variant),
)
ipam_local_defines.append(
"CONFIG_IPA_RMNET_MEM=y".format(include_base),
)
if target == "niobe":
ipam_deps_list.extend([
"//vendor/qcom/opensource/synx-kernel:synx_headers",
"//vendor/qcom/opensource/synx-kernel:{}_modules".format(kernel_build_variant),
])
ipam_local_defines.append(
"CONFIG_IPA_RTP=y".format(include_base),
)
ddk_module(
name = "{}_gsim".format(kernel_build_variant),
out = "gsim.ko",
srcs = [
"drivers/platform/msm/gsi/gsi.c",
"drivers/platform/msm/gsi/gsi.h",
"drivers/platform/msm/gsi/gsi_dbg.c",
"drivers/platform/msm/gsi/gsi_emulation.h",
"drivers/platform/msm/gsi/gsi_emulation_stubs.h",
"drivers/platform/msm/gsi/gsi_trace.h",
"drivers/platform/msm/gsi/gsihal/gsihal.c",
"drivers/platform/msm/gsi/gsihal/gsihal.h",
"drivers/platform/msm/gsi/gsihal/gsihal_i.h",
"drivers/platform/msm/gsi/gsihal/gsihal_reg.c",
"drivers/platform/msm/gsi/gsihal/gsihal_reg.h",
"drivers/platform/msm/gsi/gsihal/gsihal_reg_i.h",
],
kconfig = "config/Kconfig",
defconfig = include_defconfig,
conditional_srcs = {
"CONFIG_IPA_EMULATION": {
True: [
"drivers/platform/msm/gsi/gsi_emulation.c",
],
},
},
local_defines = [
"GSI_TRACE_INCLUDE_PATH={}/drivers/platform/msm/gsi".format(include_base),
],
kernel_build = "//msm-kernel:{}".format(kernel_build_variant),
deps = [
":gsi_headers",
":include_headers",
"//msm-kernel:all_headers",
],
)
mod_list.append("{}_gsim".format(kernel_build_variant))
ddk_module(
name = "{}_ipam".format(kernel_build_variant),
out = "ipam.ko",
srcs = [
"drivers/platform/msm/ipa/ipa_v3/ipa.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_client.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_defs.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_dma.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_dp.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_emulation_stubs.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_eth_i.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_flt.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_hdr.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_hw_stats.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_i.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_interrupts.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_intf.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_nat.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_odl.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_odl.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_pm.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_pm.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_qdss.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service_v01.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_rt.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_stats.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_stats.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_trace.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_uc.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_uc_holb_monitor.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_uc_holb_monitor.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_uc_mhi.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_uc_ntn.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_uc_offload_i.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_uc_wdi.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_utils.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_wdi3_i.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_wigig_i.c",
"drivers/platform/msm/ipa/ipa_v3/rmnet_ctl_ipa.c",
"drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c",
"drivers/platform/msm/ipa/ipa_v3/rmnet_ipa_fd_ioctl.c",
"drivers/platform/msm/ipa/ipa_v3/rmnet_ll_ipa.c",
"drivers/platform/msm/ipa/ipa_v3/teth_bridge.c",
"drivers/platform/msm/ipa/ipa_clients/ipa_eth.c",
"drivers/platform/msm/ipa/ipa_clients/ipa_gsb.c",
"drivers/platform/msm/ipa/ipa_clients/ipa_mhi_client.c",
"drivers/platform/msm/ipa/ipa_clients/ipa_uc_offload.c",
"drivers/platform/msm/ipa/ipa_clients/ipa_usb.c",
"drivers/platform/msm/ipa/ipa_clients/ipa_wdi3.c",
"drivers/platform/msm/ipa/ipa_clients/ipa_wigig.c",
"drivers/platform/msm/ipa/ipa_clients/rndis_ipa.h",
"drivers/platform/msm/ipa/ipa_clients/rndis_ipa_trace.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.c",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.c",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt_i.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_hw_stats.c",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_hw_stats.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_hw_stats_i.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_i.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_nat.c",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_nat.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_nat_i.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.h",
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg_i.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_tsp.h",
"drivers/platform/msm/ipa/ipa_clients/ecm_ipa.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/gsi_hwio.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/gsi_hwio_def.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/ipa_access_control.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/ipa_gcc_hwio.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/ipa_gcc_hwio_def.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/ipa_hw_common_ex.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/ipa_hwio.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/ipa_hwio_def.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/ipa_pkt_cntxt.h",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/ipa_reg_dump.c",
"drivers/platform/msm/ipa/ipa_v3/dump/ipa5.5/ipa_reg_dump.h",
"drivers/platform/msm/ipa/ipa_common_i.h",
"drivers/platform/msm/ipa/ipa_rm.c",
"drivers/platform/msm/ipa/ipa_rm_dependency_graph.c",
"drivers/platform/msm/ipa/ipa_rm_dependency_graph.h",
"drivers/platform/msm/ipa/ipa_rm_i.h",
"drivers/platform/msm/ipa/ipa_rm_inactivity_timer.c",
"drivers/platform/msm/ipa/ipa_rm_peers_list.c",
"drivers/platform/msm/ipa/ipa_rm_peers_list.h",
"drivers/platform/msm/ipa/ipa_rm_resource.c",
"drivers/platform/msm/ipa/ipa_rm_resource.h",
"drivers/platform/msm/ipa/ipa_uc_offload_common_i.h",
],
kconfig = "config/Kconfig",
defconfig = include_defconfig,
conditional_srcs = {
"CONFIG_IPA3_MHI_PRIME_MANAGER": {
True: [
"drivers/platform/msm/ipa/ipa_v3/ipa_mpm.c",
],
},
"CONFIG_IPA3_MHI_PROXY": {
True: [
"drivers/platform/msm/ipa/ipa_v3/ipa_mhi_proxy.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_mhi_proxy.c",
],
},
"CONFIG_IPA_TSP": {
True: [
"drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_tsp.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_tsp.c",
],
},
"CONFIG_ECM_IPA": {
True: [
"drivers/platform/msm/ipa/ipa_clients/ecm_ipa.c",
],
},
"CONFIG_RNDIS_IPA": {
True: [
"drivers/platform/msm/ipa/ipa_clients/rndis_ipa.c",
],
},
"CONFIG_IPA_UT": {
True: [
"drivers/platform/msm/ipa/test/ipa_ut_framework.c",
"drivers/platform/msm/ipa/test/ipa_ut_framework.h",
"drivers/platform/msm/ipa/test/ipa_ut_i.h",
"drivers/platform/msm/ipa/test/ipa_ut_suite_list.h",
"drivers/platform/msm/ipa/test/ipa_test_example.c",
"drivers/platform/msm/ipa/test/ipa_test_mhi.c",
"drivers/platform/msm/ipa/test/ipa_test_dma.c",
"drivers/platform/msm/ipa/test/ipa_test_hw_stats.c",
"drivers/platform/msm/ipa/test/ipa_pm_ut.c",
"drivers/platform/msm/ipa/test/ipa_test_wdi3.c",
"drivers/platform/msm/ipa/test/ipa_test_ntn.c",
],
},
"CONFIG_ARCH_NIOBE": {
True: [
"drivers/platform/msm/ipa/ipa_v3/ipa_rtp_genl.h",
"drivers/platform/msm/ipa/ipa_v3/ipa_rtp_genl.c",
"drivers/platform/msm/ipa/ipa_v3/ipa_uc_rtp.c",
],
},
},
local_defines = [
"GSI_TRACE_INCLUDE_PATH={}/drivers/platform/msm/gsi".format(include_base),
"IPA_TRACE_INCLUDE_PATH={}/drivers/platform/msm/ipa/ipa_v3".format(include_base),
"RNDIS_TRACE_INCLUDE_PATH={}/drivers/platform/msm/ipa/ipa_clients".format(include_base),
] + ipam_local_defines,
kernel_build = "//msm-kernel:{}".format(kernel_build_variant),
deps = [
":{}_config_headers".format(variant),
":gsi_headers",
":include_headers",
":ipa_headers",
":ipa_clients",
"//msm-kernel:all_headers",
":{}_gsim".format(kernel_build_variant),
] + ipam_deps_list,
)
mod_list.append("{}_ipam".format(kernel_build_variant))
ddk_module(
name = "{}_ipanetm".format(kernel_build_variant),
out = "ipanetm.ko",
srcs = [
"drivers/platform/msm/ipa/ipa_v3/ipa_net.c",
],
kconfig = "config/Kconfig",
defconfig = include_defconfig,
kernel_build = "//msm-kernel:{}".format(kernel_build_variant),
local_defines = [
"RNDIS_TRACE_INCLUDE_PATH={}/drivers/platform/msm/ipa/ipa_clients".format(include_base),
],
deps = [
":{}_config_headers".format(variant),
":{}_ipam".format(kernel_build_variant),
":gsi_headers",
":include_headers",
":ipa_headers",
":ipa_clients",
"//msm-kernel:all_headers",
],
)
mod_list.append("{}_ipanetm".format(kernel_build_variant))
if variant == "consolidate":
ddk_module(
name = "{}_ipatestm".format(kernel_build_variant),
out = "ipatestm.ko",
srcs = [
"drivers/platform/msm/ipa/ipa_test_module/ipa_rm_ut.c",
"drivers/platform/msm/ipa/ipa_test_module/ipa_rm_ut.h",
"drivers/platform/msm/ipa/ipa_test_module/ipa_test_module.h",
"drivers/platform/msm/ipa/ipa_test_module/ipa_test_module_impl.c",
"drivers/platform/msm/ipa/ipa_test_module/ipa_test_module_tsp.h",
],
kconfig = "config/Kconfig",
defconfig = include_defconfig,
kernel_build = "//msm-kernel:{}".format(kernel_build_variant),
deps = [
":consolidate_config_headers",
":{}_ipam".format(kernel_build_variant),
":gsi_headers",
":include_headers",
":ipa_headers",
":ipa_clients",
"//msm-kernel:all_headers",
":{}_gsim".format(kernel_build_variant),
],
)
mod_list.append("{}_ipatestm".format(kernel_build_variant))
copy_to_dist_dir(
name = "{}_modules_dist".format(kernel_build_variant),
data = mod_list,
dist_dir = "out/target/product/{}/dlkm/lib/modules/".format(target),
flat = True,
wipe_dist_dir = False,
allow_duplicate_filenames = False,
mode_overrides = {"**/*": "644"},
log = "info",
)

339
qcom/opensource/dataipa/drivers/LICENSE Normal file
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GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Lesser General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
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We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
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Finally, any free program is threatened constantly by software
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patent must be licensed for everyone's free use or not licensed at all.
The precise terms and conditions for copying, distribution and
modification follow.
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TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
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a notice placed by the copyright holder saying it may be distributed
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anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.
If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.
4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.
5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.
6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.
7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.
If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.
It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.
This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.
9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.
10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

10
qcom/opensource/dataipa/drivers/NOTICE Normal file
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Copyright (c) 2021 The Linux Foundation. All rights reserved.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 2 and
only version 2 as published by the Free Software Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.

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headers_src = [
"include/uapi/linux/*.h",
]
test_headers_src = [
"ipa/ipa_test_module/ipa_test_module.h",
]
ipa_headers_out = [
"linux/msm_ipa.h",
"linux/ipa_qmi_service_v01.h",
"linux/rmnet_ipa_fd_ioctl.h",
]
ipa_test_headers_out = [
"ipa_test_module.h",
]
ipa_kernel_headers_verbose = "--verbose "
ipa_test_kernel_headers_verbose = "--verbose "
genrule {
name: "qti_generate_ipa_kernel_headers",
tools: ["headers_install.sh",
"unifdef"
],
tool_files: [
"ipa_kernel_headers.py",
],
srcs: headers_src,
cmd: "python3 -u $(location ipa_kernel_headers.py) " +
ipa_kernel_headers_verbose +
"--gen_dir $(genDir) " +
"--ipa_include_uapi $(locations include/uapi/linux/*.h) " +
"--unifdef $(location unifdef) " +
"--headers_install $(location headers_install.sh)",
out: ipa_headers_out,
}
genrule {
name: "qti_generate_ipa_test_kernel_headers",
tools: ["headers_install.sh",
"unifdef"
],
tool_files: [
"ipa_test_kernel_headers.py",
],
srcs: test_headers_src,
cmd: "python3 -u $(location ipa_test_kernel_headers.py) " +
ipa_test_kernel_headers_verbose +
"--gen_dir $(genDir) " +
"--ipa_test_include_uapi $(locations ipa/ipa_test_module/ipa_test_module.h) " +
"--unifdef $(location unifdef) " +
"--headers_install $(location headers_install.sh)",
out: ipa_test_headers_out,
}
cc_library_headers {
name: "qti_ipa_kernel_headers",
generated_headers: ["qti_generate_ipa_kernel_headers"],
export_generated_headers: ["qti_generate_ipa_kernel_headers"],
vendor: true,
recovery_available: true
}
cc_library_headers {
name: "qti_ipa_test_kernel_headers",
generated_headers: ["qti_generate_ipa_test_kernel_headers"],
export_generated_headers: ["qti_generate_ipa_test_kernel_headers"],
vendor: true,
recovery_available: true
}

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ifeq ($(TARGET_DATAIPA_DLKM_ENABLE), true)
ifneq ($(TARGET_BOARD_PLATFORM),qssi)
GSI_DLKM_PLATFORMS_LIST := taro kalama bengal monaco pineapple blair holi cliffs pitti volcano niobe
#Enabling BAZEL
LOCAL_MODULE_DDK_BUILD := true
LOCAL_MODULE_KO_DIRS := gsi/gsim.ko
LOCAL_MODULE_KO_DIRS += ipa/ipam.ko
LOCAL_MODULE_KO_DIRS += ipa/ipanetm.ko
ifeq ($(CONFIG_LOCALVERSION), "-gki-consolidate")
LOCAL_MODULE_KO_DIRS += ipa/ipatestm.ko
endif
ifeq ($(call is-board-platform-in-list, $(GSI_DLKM_PLATFORMS_LIST)),true)
#Make file to create GSI DLKM
BOARD_COMMON_DIR ?= device/qcom/common
DLKM_DIR := $(TOP)/$(BOARD_COMMON_DIR)/dlkm
LOCAL_PATH := $(call my-dir)
include $(CLEAR_VARS)
LOCAL_CFLAGS := -Wno-macro-redefined -Wno-unused-function -Wall -Werror
LOCAL_CLANG :=true
KBUILD_OPTIONS += MODNAME=gsim
LOCAL_SRC_FILES := $(wildcard $(LOCAL_PATH)/**/*) $(wildcard $(LOCAL_PATH)/*)
LOCAL_MODULE := gsim.ko
LOCAL_MODULE_KBUILD_NAME := gsi/gsim.ko
LOCAL_MODULE_DEBUG_ENABLE := true
LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT)
$(warning $(DLKM_DIR))
include $(DLKM_DIR)/Build_external_kernelmodule.mk
include $(CLEAR_VARS)
KBUILD_OPTIONS += MODNAME=ipam
LOCAL_SRC_FILES := $(wildcard $(LOCAL_PATH)/**/*) $(wildcard $(LOCAL_PATH)/*)
LOCAL_MODULE := ipam.ko
LOCAL_MODULE_KBUILD_NAME := ipa/ipam.ko
LOCAL_MODULE_DEBUG_ENABLE := true
LOCAL_EXPORT_KO_INCLUDE_DIRS := $(LOCAL_PATH)/include
LOCAL_EXPORT_KO_INCLUDE_DIRS += $(LOCAL_PATH)/include/uapi
LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT)
$(warning $(DLKM_DIR))
include $(DLKM_DIR)/Build_external_kernelmodule.mk
include $(CLEAR_VARS)
KBUILD_OPTIONS += MODNAME=ipanetm
LOCAL_SRC_FILES := $(wildcard $(LOCAL_PATH)/**/*) $(wildcard $(LOCAL_PATH)/*)
LOCAL_MODULE := ipanetm.ko
LOCAL_MODULE_KBUILD_NAME := ipa/ipanetm.ko
LOCAL_MODULE_DEBUG_ENABLE := true
LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT)
$(warning $(DLKM_DIR))
include $(DLKM_DIR)/Build_external_kernelmodule.mk
ifeq ($(CONFIG_LOCALVERSION), "-gki-consolidate")
include $(CLEAR_VARS)
KBUILD_OPTIONS += MODNAME=ipatestm
LOCAL_SRC_FILES := $(wildcard $(LOCAL_PATH)/**/*) $(wildcard $(LOCAL_PATH)/*)
LOCAL_MODULE := ipatestm.ko
LOCAL_MODULE_KBUILD_NAME := ipa/ipatestm.ko
LOCAL_MODULE_DEBUG_ENABLE := true
LOCAL_HEADER_LIBRARIES := ipa_test_kernel_headers
LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT)
$(warning $(DLKM_DIR))
include $(DLKM_DIR)/Build_external_kernelmodule.mk
endif
endif #End of Check for target
endif #End of Check for qssi target
endif #DLKM

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# SPDX-License-Identifier: GPL-2.0-only
DATAIPADRVTOP = $(srctree)/techpack/dataipa/drivers/platform/msm
#MSMs - GKI
ifeq ($(CONFIG_ARCH_LAHAINA), y)
LINUXINCLUDE += -include $(srctree)/techpack/dataipa/config/dataipa.h
ifeq ($(CONFIG_QGKI),y)
include $(srctree)/techpack/dataipa/config/dataipa_QGKI.conf
ifeq ($(CONFIG_LOCALVERSION), "-qgki-debug")
include $(srctree)/techpack/dataipa/config/dataipa_debug.conf
LINUXINCLUDE += -include $(srctree)/techpack/dataipa/config/dataipa_debug.h
endif
else
include $(srctree)/techpack/dataipa/config/dataipa_GKI.conf
endif
endif
#MSM - Vendor SI
ifeq ($(filter $(CONFIG_ARCH_WAIPIO) $(CONFIG_ARCH_KALAMA) $(CONFIG_ARCH_PINEAPPLE) $(CONFIG_ARCH_CLIFFS) $(CONFIG_ARCH_PITTI) $(CONFIG_ARCH_VOLCANO), y),y)
DATAIPADRVTOP = $(srctree)/../../vendor/qcom/opensource/dataipa/drivers/platform/msm
LINUXINCLUDE += -include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_vendor.h
include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_GKI.conf
ifeq ($(CONFIG_LOCALVERSION), "-gki-consolidate")
include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_GKI_consolidate.conf
LINUXINCLUDE += -include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_debug.h
endif
endif
ifeq ($(filter $(CONFIG_ARCH_KHAJE) $(CONFIG_ARCH_BLAIR) $(CONFIG_ARCH_HOLI) $(CONFIG_ARCH_MONACO), y), y)
DATAIPADRVTOP = $(srctree)/../../vendor/qcom/opensource/dataipa/drivers/platform/msm
LINUXINCLUDE += -include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_vendor_ipav4.h
include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_GKI_ipav4.conf
ifeq ($(CONFIG_LOCALVERSION), "-gki-consolidate")
include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_GKI_consolidate.conf
LINUXINCLUDE += -include $(srctree)/../../vendor/qcom/opensource/dataipa/config/dataipa_debug.h
endif
endif
#MDMs
ifeq ($(CONFIG_ARCH_SDXLEMUR), y)
LINUXINCLUDE += -include $(srctree)/techpack/dataipa/config/dataipa.h
include $(srctree)/techpack/dataipa/config/dataipa_QGKI.conf
ifneq ($(CONFIG_LOCALVERSION), "-perf")
include $(srctree)/techpack/dataipa/config/dataipa_debug.conf
LINUXINCLUDE += -include $(srctree)/techpack/dataipa/config/dataipa_debug.h
endif
endif
ifeq ($(CONFIG_ARCH_SDXNIGHTJAR), y)
LINUXINCLUDE += -include $(srctree)/techpack/dataipa/config/sdx12dataipa.h
include $(srctree)/techpack/dataipa/config/sdx12dataipa_QGKI.conf
ifneq ($(CONFIG_LOCALVERSION), "-perf")
include $(srctree)/techpack/dataipa/config/dataipa_debug.conf
LINUXINCLUDE += -include $(srctree)/techpack/dataipa/config/dataipa_debug.h
endif
endif
ifeq ($(CONFIG_ARCH_SCUBA), y)
LINUXINCLUDE += -include $(srctree)/techpack/dataipa/config/sa410mdataipa.h
include $(srctree)/techpack/dataipa/config/sa410mdataipa_QGKI.conf
ifneq ($(CONFIG_LOCALVERSION), "-perf")
include $(srctree)/techpack/dataipa/config/dataipa_debug.conf
LINUXINCLUDE += -include $(srctree)/techpack/dataipa/config/dataipa_debug.h
endif
endif
ifneq (,$(filter $(CONFIG_IPA3) $(CONFIG_GSI),y m))
LINUXINCLUDE += -I$(DATAIPADRVTOP)/include
LINUXINCLUDE += -I$(DATAIPADRVTOP)/include/linux
LINUXINCLUDE += -I$(DATAIPADRVTOP)/include/uapi
LINUXINCLUDE += -I$(DATAIPADRVTOP)/gsi
LINUXINCLUDE += -I$(DATAIPADRVTOP)/gsi/gsihal
LINUXINCLUDE += -I$(DATAIPADRVTOP)/ipa
LINUXINCLUDE += -I$(DATAIPADRVTOP)/ipa/ipa_v3
LINUXINCLUDE += -I$(DATAIPADRVTOP)/ipa/ipa_v3/ipahal
LINUXINCLUDE += -I$(DATAIPADRVTOP)/ipa/ipa_clients
ifneq (,$(filter $(CONFIG_IPA_KERNEL_TESTS_MODULE),y m))
LINUXINCLUDE += -I$(DATAIPADRVTOP)/ipa/ipa_test_module
endif
endif
ifneq (,$(filter $(CONFIG_IPA3_REGDUMP),y m))
LINUXINCLUDE += -I$(DATAIPADRVTOP)/ipa/ipa_v3/dump
endif
ifneq (,$(filter $(CONFIG_IPA3_REGDUMP_IPA_4_5),y m))
LINUXINCLUDE += -I$(DATAIPADRVTOP)/ipa/ipa_v3/dump/ipa4.5
endif
ifneq (,$(filter $(CONFIG_IPA3_REGDUMP_IPA_5_0),y m))
LINUXINCLUDE += -I$(DATAIPADRVTOP)/ipa/ipa_v3/dump/ipa5.0
endif
ifneq (,$(filter $(CONFIG_IPA3_REGDUMP_IPA_5_5),y m))
LINUXINCLUDE += -I$(DATAIPADRVTOP)/ipa/ipa_v3/dump/ipa5.5
endif
obj-$(CONFIG_GSI) += gsi/
obj-$(CONFIG_IPA3) += ipa/

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ifeq ($(KP_MODULE_ROOT),)
KP_MODULE_ROOT=$(KERNEL_SRC)/$(M)
endif
KBUILD_OPTIONS+=KBUILD_DTC_INCLUDE=$(KP_MODULE_ROOT)
all: modules # dtbs
clean:
$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
%:
$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)

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# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_GSI) += gsim.o
gsim-objs := gsi.o gsihal/gsihal.o gsihal/gsihal_reg.o
gsim-$(CONFIG_DEBUG_FS) += gsi_dbg.o
gsim-$(CONFIG_IPA_EMULATION) += gsi_emulation.o

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qcom/opensource/dataipa/drivers/platform/msm/gsi/gsi.c Normal file
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File diff suppressed because it is too large Load Diff

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qcom/opensource/dataipa/drivers/platform/msm/gsi/gsi.h Normal file
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File diff suppressed because it is too large Load Diff

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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
*/
#include <linux/completion.h>
#include <linux/debugfs.h>
#include <linux/dma-mapping.h>
#include <linux/random.h>
#include <linux/uaccess.h>
#include <linux/msm_gsi.h>
#include "gsi.h"
#include "gsihal.h"
#define GSI_MAX_MSG_LEN 4096
#define TERR(fmt, args...) \
pr_err("%s:%d " fmt, __func__, __LINE__, ## args)
#define TDBG(fmt, args...) \
pr_debug("%s:%d " fmt, __func__, __LINE__, ## args)
#define PRT_STAT(fmt, args...) \
pr_err(fmt, ## args)
static struct dentry *dent;
static char dbg_buff[GSI_MAX_MSG_LEN];
static void *gsi_ipc_logbuf_low;
static void gsi_wq_print_dp_stats(struct work_struct *work);
static DECLARE_DELAYED_WORK(gsi_print_dp_stats_work, gsi_wq_print_dp_stats);
static void gsi_wq_update_dp_stats(struct work_struct *work);
static DECLARE_DELAYED_WORK(gsi_update_dp_stats_work, gsi_wq_update_dp_stats);
static ssize_t gsi_dump_evt(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
u32 arg1;
u32 arg2;
unsigned long missing;
char *sptr, *token;
uint32_t val;
struct gsi_evt_ctx *ctx;
uint16_t i;
if (count >= sizeof(dbg_buff))
return -EINVAL;
missing = copy_from_user(dbg_buff, buf, count);
if (missing)
return -EFAULT;
dbg_buff[count] = '\0';
sptr = dbg_buff;
token = strsep(&sptr, " ");
if (!token)
return -EINVAL;
if (kstrtou32(token, 0, &arg1))
return -EINVAL;
token = strsep(&sptr, " ");
if (!token)
return -EINVAL;
if (kstrtou32(token, 0, &arg2))
return -EINVAL;
TDBG("arg1=%u arg2=%u\n", arg1, arg2);
if (arg1 >= gsi_ctx->max_ev) {
TERR("invalid evt ring id %u\n", arg1);
return -EINVAL;
}
gsi_ctx->per.vote_clk_cb();
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_0,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX0 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_1,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX1 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_2,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX2 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_3,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX3 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_4,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX4 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_5,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX5 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_6,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX6 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_7,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX7 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_8,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX8 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_9,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX9 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_10,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX10 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_11,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX11 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_12,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX12 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_CNTXT_13,
gsi_ctx->per.ee, arg1);
TERR("EV%2d CTX13 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_SCRATCH_0,
gsi_ctx->per.ee, arg1);
TERR("EV%2d SCR0 0x%x\n", arg1, val);
val = gsihal_read_reg_nk(GSI_EE_n_EV_CH_k_SCRATCH_1,
gsi_ctx->per.ee, arg1);
TERR("EV%2d SCR1 0x%x\n", arg1, val);
gsi_ctx->per.unvote_clk_cb();
if (arg2) {
ctx = &gsi_ctx->evtr[arg1];
if (ctx->props.ring_base_vaddr) {
for (i = 0; i < ctx->props.ring_len / 16; i++)
TERR("EV%2d (0x%08llx) %08x %08x %08x %08x\n",
arg1, ctx->props.ring_base_addr + i * 16,
*(u32 *)((u8 *)ctx->props.ring_base_vaddr +
i * 16 + 0),
*(u32 *)((u8 *)ctx->props.ring_base_vaddr +
i * 16 + 4),
*(u32 *)((u8 *)ctx->props.ring_base_vaddr +
i * 16 + 8),
*(u32 *)((u8 *)ctx->props.ring_base_vaddr +
i * 16 + 12));
} else {
TERR("No VA supplied for event ring id %u\n", arg1);
}
}
return count;
}
static ssize_t gsi_dump_ch(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
u32 arg1;
u32 arg2;
unsigned long missing;
char *sptr, *token;
struct gsi_chan_ctx *ctx;
uint16_t i;
if (count >= sizeof(dbg_buff))
return -EINVAL;
missing = copy_from_user(dbg_buff, buf, count);
if (missing)
return -EFAULT;
dbg_buff[count] = '\0';
sptr = dbg_buff;
token = strsep(&sptr, " ");
if (!token)
return -EINVAL;
if (kstrtou32(token, 0, &arg1))
return -EINVAL;
token = strsep(&sptr, " ");
if (!token)
return -EINVAL;
if (kstrtou32(token, 0, &arg2))
return -EINVAL;
TDBG("arg1=%u arg2=%u\n", arg1, arg2);
if (arg1 >= gsi_ctx->max_ch) {
TERR("invalid chan id %u\n", arg1);
return -EINVAL;
}
gsi_ctx->per.vote_clk_cb();
gsi_dump_ch_info(arg1);
gsi_ctx->per.unvote_clk_cb();
if (arg2) {
ctx = &gsi_ctx->chan[arg1];
if (ctx->props.ring_base_vaddr) {
for (i = 0; i < ctx->props.ring_len / 16; i++)
TERR("CH%2d (0x%08llx) %08x %08x %08x %08x\n",
arg1, ctx->props.ring_base_addr + i * 16,
*(u32 *)((u8 *)ctx->props.ring_base_vaddr +
i * 16 + 0),
*(u32 *)((u8 *)ctx->props.ring_base_vaddr +
i * 16 + 4),
*(u32 *)((u8 *)ctx->props.ring_base_vaddr +
i * 16 + 8),
*(u32 *)((u8 *)ctx->props.ring_base_vaddr +
i * 16 + 12));
} else {
TERR("No VA supplied for chan id %u\n", arg1);
}
}
return count;
}
static void gsi_dump_ch_stats(struct gsi_chan_ctx *ctx)
{
if (!ctx->allocated)
return;
PRT_STAT("CH%2d:\n", ctx->props.ch_id);
PRT_STAT("queued=%lu compl=%lu\n",
ctx->stats.queued,
ctx->stats.completed);
PRT_STAT("cb->poll=%lu poll->cb=%lu poll_pend_irq=%lu\n",
ctx->stats.callback_to_poll,
ctx->stats.poll_to_callback,
ctx->stats.poll_pending_irq);
PRT_STAT("invalid_tre_error=%lu\n",
ctx->stats.invalid_tre_error);
PRT_STAT("poll_ok=%lu poll_empty=%lu\n",
ctx->stats.poll_ok, ctx->stats.poll_empty);
if (ctx->evtr)
PRT_STAT("compl_evt=%lu\n",
ctx->evtr->stats.completed);
PRT_STAT("userdata_in_use=%lu\n", ctx->stats.userdata_in_use);
PRT_STAT("ch_below_lo=%lu\n", ctx->stats.dp.ch_below_lo);
PRT_STAT("ch_below_hi=%lu\n", ctx->stats.dp.ch_below_hi);
PRT_STAT("ch_above_hi=%lu\n", ctx->stats.dp.ch_above_hi);
PRT_STAT("time_empty=%lums\n", ctx->stats.dp.empty_time);
PRT_STAT("\n");
}
static ssize_t gsi_dump_stats(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
int ch_id;
int min, max, ret;
ret = kstrtos32_from_user(buf, count, 0, &ch_id);
if (ret)
return ret;
if (ch_id == -1) {
min = 0;
max = gsi_ctx->max_ch;
} else if (ch_id < 0 || ch_id >= gsi_ctx->max_ch ||
!gsi_ctx->chan[ch_id].allocated) {
goto error;
} else {
min = ch_id;
max = ch_id + 1;
}
for (ch_id = min; ch_id < max; ch_id++)
gsi_dump_ch_stats(&gsi_ctx->chan[ch_id]);
return count;
error:
TERR("Usage: echo ch_id > stats. Use -1 for all\n");
return -EINVAL;
}
static int gsi_dbg_create_stats_wq(void)
{
gsi_ctx->dp_stat_wq =
create_singlethread_workqueue("gsi_stat");
if (!gsi_ctx->dp_stat_wq) {
TERR("failed create workqueue\n");
return -ENOMEM;
}
return 0;
}
static void gsi_dbg_destroy_stats_wq(void)
{
cancel_delayed_work_sync(&gsi_update_dp_stats_work);
cancel_delayed_work_sync(&gsi_print_dp_stats_work);
flush_workqueue(gsi_ctx->dp_stat_wq);
destroy_workqueue(gsi_ctx->dp_stat_wq);
gsi_ctx->dp_stat_wq = NULL;
}
static ssize_t gsi_enable_dp_stats(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
int ch_id;
bool enable;
int ret;
if (count >= sizeof(dbg_buff))
goto error;
if (copy_from_user(dbg_buff, buf, count))
goto error;
dbg_buff[count] = '\0';
if (dbg_buff[0] != '+' && dbg_buff[0] != '-')
goto error;
enable = (dbg_buff[0] == '+');
if (kstrtos32(dbg_buff + 1, 0, &ch_id))
goto error;
if (ch_id < 0 || ch_id >= gsi_ctx->max_ch ||
!gsi_ctx->chan[ch_id].allocated) {
goto error;
}
if (gsi_ctx->chan[ch_id].enable_dp_stats == enable) {
TERR("ch_%d: already enabled/disabled\n", ch_id);
return -EINVAL;
}
gsi_ctx->chan[ch_id].enable_dp_stats = enable;
if (enable)
gsi_ctx->num_ch_dp_stats++;
else
gsi_ctx->num_ch_dp_stats--;
if (enable) {
if (gsi_ctx->num_ch_dp_stats == 1) {
ret = gsi_dbg_create_stats_wq();
if (ret)
return ret;
}
cancel_delayed_work_sync(&gsi_update_dp_stats_work);
queue_delayed_work(gsi_ctx->dp_stat_wq,
&gsi_update_dp_stats_work, msecs_to_jiffies(10));
} else if (!enable && gsi_ctx->num_ch_dp_stats == 0) {
gsi_dbg_destroy_stats_wq();
}
return count;
error:
TERR("Usage: echo [+-]ch_id > enable_dp_stats\n");
return -EINVAL;
}
static ssize_t gsi_set_max_elem_dp_stats(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
u32 ch_id;
u32 max_elem;
unsigned long missing;
char *sptr, *token;
if (count >= sizeof(dbg_buff))
goto error;
missing = copy_from_user(dbg_buff, buf, count);
if (missing)
goto error;
dbg_buff[count] = '\0';
sptr = dbg_buff;
token = strsep(&sptr, " ");
if (!token) {
TERR("\n");
goto error;
}
if (kstrtou32(token, 0, &ch_id)) {
TERR("\n");
goto error;
}
token = strsep(&sptr, " ");
if (!token) {
/* get */
if (kstrtou32(dbg_buff, 0, &ch_id))
goto error;
if (ch_id >= gsi_ctx->max_ch)
goto error;
PRT_STAT("ch %d: max_re_expected=%d\n", ch_id,
gsi_ctx->chan[ch_id].props.max_re_expected);
return count;
}
if (kstrtou32(token, 0, &max_elem)) {
TERR("\n");
goto error;
}
TDBG("ch_id=%u max_elem=%u\n", ch_id, max_elem);
if (ch_id >= gsi_ctx->max_ch) {
TERR("invalid chan id %u\n", ch_id);
goto error;
}
gsi_ctx->chan[ch_id].props.max_re_expected = max_elem;
return count;
error:
TERR("Usage: (set) echo <ch_id> <max_elem> > max_elem_dp_stats\n");
TERR("Usage: (get) echo <ch_id> > max_elem_dp_stats\n");
return -EINVAL;
}
static void gsi_wq_print_dp_stats(struct work_struct *work)
{
int ch_id;
for (ch_id = 0; ch_id < gsi_ctx->max_ch; ch_id++) {
if (gsi_ctx->chan[ch_id].print_dp_stats)
gsi_dump_ch_stats(&gsi_ctx->chan[ch_id]);
}
queue_delayed_work(gsi_ctx->dp_stat_wq, &gsi_print_dp_stats_work,
msecs_to_jiffies(1000));
}
static void gsi_dbg_update_ch_dp_stats(struct gsi_chan_ctx *ctx)
{
uint16_t start_hw;
uint16_t end_hw;
uint64_t rp_hw;
uint64_t wp_hw;
int ee = gsi_ctx->per.ee;
uint16_t used_hw;
gsi_ctx->per.vote_clk_cb();
rp_hw = gsihal_read_reg_nk(GSI_EE_n_GSI_CH_k_CNTXT_4,
ee, ctx->props.ch_id);
rp_hw |= ((uint64_t)gsihal_read_reg_nk(GSI_EE_n_GSI_CH_k_CNTXT_5,
ee, ctx->props.ch_id)) << 32;
wp_hw = gsihal_read_reg_nk(GSI_EE_n_GSI_CH_k_CNTXT_6,
ee, ctx->props.ch_id);
wp_hw |= ((uint64_t)gsihal_read_reg_nk(GSI_EE_n_GSI_CH_k_CNTXT_7,
ee, ctx->props.ch_id)) << 32;
gsi_ctx->per.unvote_clk_cb();
start_hw = gsi_find_idx_from_addr(&ctx->ring, rp_hw);
end_hw = gsi_find_idx_from_addr(&ctx->ring, wp_hw);
if (end_hw >= start_hw)
used_hw = end_hw - start_hw;
else
used_hw = ctx->ring.max_num_elem + 1 - (start_hw - end_hw);
TDBG("ch %d used %d\n", ctx->props.ch_id, used_hw);
gsi_update_ch_dp_stats(ctx, used_hw);
}
static void gsi_wq_update_dp_stats(struct work_struct *work)
{
int ch_id;
for (ch_id = 0; ch_id < gsi_ctx->max_ch; ch_id++) {
if (gsi_ctx->chan[ch_id].allocated &&
gsi_ctx->chan[ch_id].enable_dp_stats)
gsi_dbg_update_ch_dp_stats(&gsi_ctx->chan[ch_id]);
}
queue_delayed_work(gsi_ctx->dp_stat_wq, &gsi_update_dp_stats_work,
msecs_to_jiffies(10));
}
static ssize_t gsi_rst_stats(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
int ch_id;
int min, max, ret;
ret = kstrtos32_from_user(buf, count, 0, &ch_id);
if (ret)
return ret;
if (ch_id == -1) {
min = 0;
max = gsi_ctx->max_ch;
} else if (ch_id < 0 || ch_id >= gsi_ctx->max_ch ||
!gsi_ctx->chan[ch_id].allocated) {
goto error;
} else {
min = ch_id;
max = ch_id + 1;
}
for (ch_id = min; ch_id < max; ch_id++)
memset(&gsi_ctx->chan[ch_id].stats, 0,
sizeof(gsi_ctx->chan[ch_id].stats));
return count;
error:
TERR("Usage: echo ch_id > rst_stats. Use -1 for all\n");
return -EINVAL;
}
static ssize_t gsi_print_dp_stats(struct file *file,
const char __user *buf, size_t count, loff_t *ppos)
{
int ch_id;
bool enable;
int ret;
if (count >= sizeof(dbg_buff))
goto error;
if (copy_from_user(dbg_buff, buf, count))
goto error;
dbg_buff[count] = '\0';
if (dbg_buff[0] != '+' && dbg_buff[0] != '-')
goto error;
enable = (dbg_buff[0] == '+');
if (kstrtos32(dbg_buff + 1, 0, &ch_id))
goto error;
if (ch_id < 0 || ch_id >= gsi_ctx->max_ch ||
!gsi_ctx->chan[ch_id].allocated) {
goto error;
}
if (gsi_ctx->chan[ch_id].print_dp_stats == enable) {
TERR("ch_%d: already enabled/disabled\n", ch_id);
return -EINVAL;
}
gsi_ctx->chan[ch_id].print_dp_stats = enable;
if (enable)
gsi_ctx->num_ch_dp_stats++;
else
gsi_ctx->num_ch_dp_stats--;
if (enable) {
if (gsi_ctx->num_ch_dp_stats == 1) {
ret = gsi_dbg_create_stats_wq();
if (ret)
return ret;
}
cancel_delayed_work_sync(&gsi_print_dp_stats_work);
queue_delayed_work(gsi_ctx->dp_stat_wq,
&gsi_print_dp_stats_work, msecs_to_jiffies(10));
} else if (!enable && gsi_ctx->num_ch_dp_stats == 0) {
gsi_dbg_destroy_stats_wq();
}
return count;
error:
TERR("Usage: echo [+-]ch_id > print_dp_stats\n");
return -EINVAL;
}
static ssize_t gsi_enable_ipc_low(struct file *file,
const char __user *ubuf, size_t count, loff_t *ppos)
{
s8 option = 0;
int ret;
ret = kstrtos8_from_user(ubuf, count, 0, &option);
if (ret)
return ret;
mutex_lock(&gsi_ctx->mlock);
if (option) {
if (!gsi_ipc_logbuf_low) {
gsi_ipc_logbuf_low =
ipc_log_context_create(GSI_IPC_LOG_PAGES,
"gsi_low", MINIDUMP_MASK);
if (gsi_ipc_logbuf_low == NULL)
TERR("failed to get ipc_logbuf_low\n");
}
gsi_ctx->ipc_logbuf_low = gsi_ipc_logbuf_low;
} else {
gsi_ctx->ipc_logbuf_low = NULL;
}
mutex_unlock(&gsi_ctx->mlock);
return count;
}
static ssize_t gsi_read_gsi_hw_profiling_stats(struct file *file,
char __user *buf, size_t count, loff_t *ppos)
{
struct gsi_hw_profiling_data stats;
int ret, nbytes, cnt = 0;
u64 totalCycles = 0, util = 0;
if (gsi_ctx->per.ver < GSI_VER_2_9) {
nbytes = scnprintf(dbg_buff, GSI_MAX_MSG_LEN,
"This feature only support on GSI2.9+\n");
cnt += nbytes;
goto done;
}
gsi_ctx->per.vote_clk_cb();
ret = gsi_get_hw_profiling_stats(&stats);
gsi_ctx->per.unvote_clk_cb();
if (!ret) {
totalCycles = stats.mcs_busy_cnt + stats.mcs_idle_cnt +
stats.bp_and_pending_cnt;
if (totalCycles != 0)
util = div_u64(
100 * (stats.mcs_busy_cnt + stats.bp_and_pending_cnt),
totalCycles);
else
util = 0;
nbytes = scnprintf(dbg_buff, GSI_MAX_MSG_LEN,
"bp_count=0x%llx\n"
"bp_and_pending_count=0x%llx\n"
"mcs_busy=0x%llx\n"
"mcs_idle=0x%llx\n"
"total_cycle_count=0x%llx\n"
"utilization_percentage=%llu%%\n",
stats.bp_cnt,
stats.bp_and_pending_cnt,
stats.mcs_busy_cnt,
stats.mcs_idle_cnt,
totalCycles,
util);
cnt += nbytes;
} else {
nbytes = scnprintf(dbg_buff, GSI_MAX_MSG_LEN,
"Fail to read GSI HW Profiling stats\n");
cnt += nbytes;
}
done:
return simple_read_from_buffer(buf, count, ppos, dbg_buff, cnt);
}
static ssize_t gsi_read_gsi_fw_version(struct file *file,
char __user *buf, size_t count, loff_t *ppos)
{
struct gsi_fw_version ver;
int ret, nbytes, cnt = 0;
if (gsi_ctx->per.ver < GSI_VER_2_9) {
nbytes = scnprintf(dbg_buff, GSI_MAX_MSG_LEN,
"This feature only support on GSI2.9+\n");
cnt += nbytes;
goto done;
}
gsi_ctx->per.vote_clk_cb();
ret = gsi_get_fw_version(&ver);
gsi_ctx->per.unvote_clk_cb();
if (!ret) {
nbytes = scnprintf(dbg_buff, GSI_MAX_MSG_LEN,
"hw=%d\nflavor=%d\nfw=%d\n",
ver.hw,
ver.flavor,
ver.fw);
cnt += nbytes;
} else {
nbytes = scnprintf(dbg_buff, GSI_MAX_MSG_LEN,
"Fail to read GSI FW version\n");
cnt += nbytes;
}
done:
return simple_read_from_buffer(buf, count, ppos, dbg_buff, cnt);
}
static const struct file_operations gsi_ev_dump_ops = {
.write = gsi_dump_evt,
};
static const struct file_operations gsi_ch_dump_ops = {
.write = gsi_dump_ch,
};
static const struct file_operations gsi_stats_ops = {
.write = gsi_dump_stats,
};
static const struct file_operations gsi_enable_dp_stats_ops = {
.write = gsi_enable_dp_stats,
};
static const struct file_operations gsi_max_elem_dp_stats_ops = {
.write = gsi_set_max_elem_dp_stats,
};
static const struct file_operations gsi_rst_stats_ops = {
.write = gsi_rst_stats,
};
static const struct file_operations gsi_print_dp_stats_ops = {
.write = gsi_print_dp_stats,
};
static const struct file_operations gsi_ipc_low_ops = {
.write = gsi_enable_ipc_low,
};
static const struct file_operations gsi_hw_profiling_ops = {
.read = gsi_read_gsi_hw_profiling_stats,
};
static const struct file_operations gsi_ver_ops = {
.read = gsi_read_gsi_fw_version,
};
void gsi_debugfs_init(void)
{
static struct dentry *dfile;
const mode_t write_only_mode = 0220;
const mode_t read_only_mode = 0440;
dent = debugfs_create_dir("gsi", 0);
if (IS_ERR(dent)) {
TERR("fail to create dir\n");
return;
}
dfile = debugfs_create_file("ev_dump", write_only_mode,
dent, 0, &gsi_ev_dump_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("fail to create ev_dump file\n");
goto fail;
}
dfile = debugfs_create_file("ch_dump", write_only_mode,
dent, 0, &gsi_ch_dump_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("fail to create ch_dump file\n");
goto fail;
}
dfile = debugfs_create_file("stats", write_only_mode, dent,
0, &gsi_stats_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("fail to create stats file\n");
goto fail;
}
dfile = debugfs_create_file("enable_dp_stats", write_only_mode, dent,
0, &gsi_enable_dp_stats_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("fail to create stats file\n");
goto fail;
}
dfile = debugfs_create_file("max_elem_dp_stats", write_only_mode,
dent, 0, &gsi_max_elem_dp_stats_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("fail to create stats file\n");
goto fail;
}
dfile = debugfs_create_file("rst_stats", write_only_mode,
dent, 0, &gsi_rst_stats_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("fail to create stats file\n");
goto fail;
}
dfile = debugfs_create_file("print_dp_stats",
write_only_mode, dent, 0, &gsi_print_dp_stats_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("fail to create stats file\n");
goto fail;
}
dfile = debugfs_create_file("ipc_low", write_only_mode,
dent, 0, &gsi_ipc_low_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("could not create ipc_low\n");
goto fail;
}
dfile = debugfs_create_file("gsi_hw_profiling_stats", read_only_mode,
dent, 0, &gsi_hw_profiling_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("could not create gsi_hw_profiling_stats\n");
goto fail;
}
dfile = debugfs_create_file("gsi_fw_version", read_only_mode, dent, 0,
&gsi_ver_ops);
if (!dfile || IS_ERR(dfile)) {
TERR("could not create gsi_fw_version\n");
goto fail;
}
return;
fail:
debugfs_remove_recursive(dent);
}

227
qcom/opensource/dataipa/drivers/platform/msm/gsi/gsi_emulation.c Normal file
View File

@ -0,0 +1,227 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*/
#include "gsi_emulation.h"
/*
* *****************************************************************************
* The following used to set up the EMULATION interrupt controller...
* *****************************************************************************
*/
int setup_emulator_cntrlr(
void __iomem *intcntrlr_base,
u32 intcntrlr_mem_size)
{
uint32_t val, ver, intrCnt, rangeCnt, range;
val = gsi_emu_readl(intcntrlr_base + GE_INT_CTL_VER_CNT);
intrCnt = val & 0xFFFF;
ver = (val >> 16) & 0xFFFF;
rangeCnt = intrCnt / 32;
GSIDBG(
"CTL_VER_CNT reg val(0x%x) intr cnt(%u) cntrlr ver(0x%x) rangeCnt(%u)\n",
val, intrCnt, ver, rangeCnt);
/*
* Verify the interrupt controller version
*/
if (ver == 0 || ver == 0xFFFF || ver < DEO_IC_INT_CTL_VER_MIN) {
GSIERR(
"Error: invalid interrupt controller version 0x%x\n",
ver);
return -GSI_STATUS_INVALID_PARAMS;
}
/*
* Verify the interrupt count
*
* NOTE: intrCnt must be at least one block and multiple of 32
*/
if ((intrCnt % 32) != 0) {
GSIERR(
"Invalid interrupt count read from HW 0x%04x\n",
intrCnt);
return -GSI_STATUS_ERROR;
}
/*
* Calculate number of ranges used, each range handles 32 int lines
*/
if (rangeCnt > DEO_IC_MAX_RANGE_CNT) {
GSIERR(
"SW interrupt limit(%u) passed, increase DEO_IC_MAX_RANGE_CNT(%u)\n",
rangeCnt,
DEO_IC_MAX_RANGE_CNT);
return -GSI_STATUS_ERROR;
}
/*
* Let's take the last register offset minus the first
* register offset (ie. range) and compare it to the interrupt
* controller's dtsi defined memory size. The range better
* fit within the size.
*/
val = GE_SOFT_INT_n(rangeCnt-1) - GE_INT_CTL_VER_CNT;
if (val > intcntrlr_mem_size) {
GSIERR(
"Interrupt controller register range (%u) exceeds dtsi provisioned size (%u)\n",
val, intcntrlr_mem_size);
return -GSI_STATUS_ERROR;
}
/*
* The following will disable the emulators interrupt controller,
* so that we can config it...
*/
GSIDBG("Writing GE_INT_MASTER_ENABLE\n");
gsi_emu_writel(
0x0,
intcntrlr_base + GE_INT_MASTER_ENABLE);
/*
* Init register maps of all ranges
*/
for (range = 0; range < rangeCnt; range++) {
/*
* Disable all int sources by setting all enable clear bits
*/
GSIDBG("Writing GE_INT_ENABLE_CLEAR_n(%u)\n", range);
gsi_emu_writel(
0xFFFFFFFF,
intcntrlr_base + GE_INT_ENABLE_CLEAR_n(range));
/*
* Clear all raw statuses
*/
GSIDBG("Writing GE_INT_CLEAR_n(%u)\n", range);
gsi_emu_writel(
0xFFFFFFFF,
intcntrlr_base + GE_INT_CLEAR_n(range));
/*
* Init all int types
*/
GSIDBG("Writing GE_INT_TYPE_n(%u)\n", range);
gsi_emu_writel(
0x0,
intcntrlr_base + GE_INT_TYPE_n(range));
}
/*
* The following tells the interrupt controller to interrupt us
* when it sees interrupts from ipa and/or gsi.
*
* Interrupts:
* ===================================================================
* DUT0 [ 63 : 16 ]
* ipa_irq [ 3 : 0 ] <---HERE
* ipa_gsi_bam_irq [ 7 : 4 ] <---HERE
* ipa_bam_apu_sec_error_irq [ 8 ]
* ipa_bam_apu_non_sec_error_irq [ 9 ]
* ipa_bam_xpu2_msa_intr [ 10 ]
* ipa_vmidmt_nsgcfgirpt [ 11 ]
* ipa_vmidmt_nsgirpt [ 12 ]
* ipa_vmidmt_gcfgirpt [ 13 ]
* ipa_vmidmt_girpt [ 14 ]
* bam_xpu3_qad_non_secure_intr_sp [ 15 ]
*/
GSIDBG("Writing GE_INT_ENABLE_n(0)\n");
gsi_emu_writel(
0x00FF, /* See <---HERE above */
intcntrlr_base + GE_INT_ENABLE_n(0));
/*
* The following will enable the IC post config...
*/
GSIDBG("Writing GE_INT_MASTER_ENABLE\n");
gsi_emu_writel(
0x1,
intcntrlr_base + GE_INT_MASTER_ENABLE);
return 0;
}
/*
* *****************************************************************************
* The following for EMULATION hard irq...
* *****************************************************************************
*/
irqreturn_t emulator_hard_irq_isr(
int irq,
void *ctxt)
{
struct gsi_ctx *gsi_ctx_ptr = (struct gsi_ctx *) ctxt;
uint32_t val;
val = gsi_emu_readl(gsi_ctx_ptr->intcntrlr_base + GE_INT_MASTER_STATUS);
/*
* If bit zero is set, interrupt is for us, hence return IRQ_NONE
* when it's not set...
*/
if (!(val & 0x00000001))
return IRQ_NONE;
/*
* The following will mask (ie. turn off) future interrupts from
* the emulator's interrupt controller. It wil stay this way until
* we turn back on...which will be done in the bottom half
* (ie. emulator_soft_irq_isr)...
*/
gsi_emu_writel(
0x0,
gsi_ctx_ptr->intcntrlr_base + GE_INT_OUT_ENABLE);
return IRQ_WAKE_THREAD;
}
/*
* *****************************************************************************
* The following for EMULATION soft irq...
* *****************************************************************************
*/
irqreturn_t emulator_soft_irq_isr(
int irq,
void *ctxt)
{
struct gsi_ctx *gsi_ctx_ptr = (struct gsi_ctx *) ctxt;
irqreturn_t retVal = IRQ_HANDLED;
uint32_t val;
val = gsi_emu_readl(gsi_ctx_ptr->intcntrlr_base + GE_IRQ_STATUS_n(0));
GSIDBG("Got irq(%d) with status(0x%08X)\n", irq, val);
if (val & 0xF0 && gsi_ctx_ptr->intcntrlr_gsi_isr) {
GSIDBG("Got gsi interrupt\n");
retVal = gsi_ctx_ptr->intcntrlr_gsi_isr(irq, ctxt);
}
if (val & 0x0F && gsi_ctx_ptr->intcntrlr_client_isr) {
GSIDBG("Got ipa interrupt\n");
retVal = gsi_ctx_ptr->intcntrlr_client_isr(irq, 0);
}
/*
* The following will clear the interrupts...
*/
gsi_emu_writel(
0xFFFFFFFF,
gsi_ctx_ptr->intcntrlr_base + GE_INT_CLEAR_n(0));
/*
* The following will unmask (ie. turn on) future interrupts from
* the emulator's interrupt controller...
*/
gsi_emu_writel(
0x1,
gsi_ctx_ptr->intcntrlr_base + GE_INT_OUT_ENABLE);
return retVal;
}

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qcom/opensource/dataipa/drivers/platform/msm/gsi/gsi_emulation.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*/
#if !defined(_GSI_EMULATION_H_)
# define _GSI_EMULATION_H_
# include <linux/interrupt.h>
# include "gsi.h"
#if defined(CONFIG_IPA_EMULATION)
# include "gsi_emulation_stubs.h"
#endif
# define gsi_emu_readl(c) (readl_relaxed(c))
# define gsi_emu_writel(v, c) ({ __iowmb(); writel_relaxed((v), (c)); })
# define CNTRLR_BASE 0
/*
* The following file contains definitions and declarations that are
* germane only to the IPA emulation system, which is run from an X86
* environment. Declaration's for non-X86 (ie. arm) are merely stubs
* to facilitate compile and link.
*
* Interrupt controller registers.
* Descriptions taken from the EMULATION interrupt controller SWI.
* - There is only one Master Enable register
* - Each group of 32 interrupt lines (range) is controlled by 8 registers,
* which are consecutive in memory:
* GE_INT_ENABLE_n
* GE_INT_ENABLE_CLEAR_n
* GE_INT_ENABLE_SET_n
* GE_INT_TYPE_n
* GE_IRQ_STATUS_n
* GE_RAW_STATUS_n
* GE_INT_CLEAR_n
* GE_SOFT_INT_n
* - After the above 8 registers, there are the registers of the next
* group (range) of 32 interrupt lines, and so on.
*/
/** @brief The interrupt controller version and interrupt count register.
* Specifies interrupt controller version (upper 16 bits) and the
* number of interrupt lines supported by HW (lower 16 bits).
*/
# define GE_INT_CTL_VER_CNT \
(CNTRLR_BASE + 0x0000)
/** @brief Enable or disable physical IRQ output signal to the system,
* not affecting any status registers.
*
* 0x0 : DISABLE IRQ output disabled
* 0x1 : ENABLE IRQ output enabled
*/
# define GE_INT_OUT_ENABLE \
(CNTRLR_BASE + 0x0004)
/** @brief The IRQ master enable register.
* Bit #0: IRQ_ENABLE, set 0 to disable, 1 to enable.
*/
# define GE_INT_MASTER_ENABLE \
(CNTRLR_BASE + 0x0008)
# define GE_INT_MASTER_STATUS \
(CNTRLR_BASE + 0x000C)
/** @brief Each bit disables (bit=0, default) or enables (bit=1) the
* corresponding interrupt source
*/
# define GE_INT_ENABLE_n(n) \
(CNTRLR_BASE + 0x0010 + 0x20 * (n))
/** @brief Write bit=1 to clear (to 0) the corresponding bit(s) in INT_ENABLE.
* Does nothing for bit=0
*/
# define GE_INT_ENABLE_CLEAR_n(n) \
(CNTRLR_BASE + 0x0014 + 0x20 * (n))
/** @brief Write bit=1 to set (to 1) the corresponding bit(s) in INT_ENABLE.
* Does nothing for bit=0
*/
# define GE_INT_ENABLE_SET_n(n) \
(CNTRLR_BASE + 0x0018 + 0x20 * (n))
/** @brief Select level (bit=0, default) or edge (bit=1) sensitive input
* detection logic for each corresponding interrupt source
*/
# define GE_INT_TYPE_n(n) \
(CNTRLR_BASE + 0x001C + 0x20 * (n))
/** @brief Shows the interrupt sources captured in RAW_STATUS that have been
* steered to irq_n by INT_SELECT. Interrupts must also be enabled by
* INT_ENABLE and MASTER_ENABLE. Read only register.
* Bit values: 1=active, 0=inactive
*/
# define GE_IRQ_STATUS_n(n) \
(CNTRLR_BASE + 0x0020 + 0x20 * (n))
/** @brief Shows the interrupt sources that have been latched by the input
* logic of the Interrupt Controller. Read only register.
* Bit values: 1=active, 0=inactive
*/
# define GE_RAW_STATUS_n(n) \
(CNTRLR_BASE + 0x0024 + 0x20 * (n))
/** @brief Write bit=1 to clear the corresponding bit(s) in RAW_STATUS.
* Does nothing for bit=0
*/
# define GE_INT_CLEAR_n(n) \
(CNTRLR_BASE + 0x0028 + 0x20 * (n))
/** @brief Write bit=1 to set the corresponding bit(s) in RAW_STATUS.
* Does nothing for bit=0.
* @note Only functional for edge detected interrupts
*/
# define GE_SOFT_INT_n(n) \
(CNTRLR_BASE + 0x002C + 0x20 * (n))
/** @brief Maximal number of ranges in SW. Each range supports 32 interrupt
* lines. If HW is extended considerably, increase this value
*/
# define DEO_IC_MAX_RANGE_CNT 8
/** @brief Size of the registers of one range in memory, in bytes */
# define DEO_IC_RANGE_MEM_SIZE 32 /* SWI: 8 registers, no gaps */
/** @brief Minimal Interrupt controller HW version */
# define DEO_IC_INT_CTL_VER_MIN 0x0102
#if defined(CONFIG_IPA_EMULATION) /* declarations to follow */
/*
* *****************************************************************************
* The following used to set up the EMULATION interrupt controller...
* *****************************************************************************
*/
int setup_emulator_cntrlr(
void __iomem *intcntrlr_base,
u32 intcntrlr_mem_size);
/*
* *****************************************************************************
* The following for EMULATION hard irq...
* *****************************************************************************
*/
irqreturn_t emulator_hard_irq_isr(
int irq,
void *ctxt);
/*
* *****************************************************************************
* The following for EMULATION soft irq...
* *****************************************************************************
*/
irqreturn_t emulator_soft_irq_isr(
int irq,
void *ctxt);
# else /* #if !defined(CONFIG_IPA_EMULATION) then definitions to follow */
static inline int setup_emulator_cntrlr(
void __iomem *intcntrlr_base,
u32 intcntrlr_mem_size)
{
return 0;
}
static inline irqreturn_t emulator_hard_irq_isr(
int irq,
void *ctxt)
{
return IRQ_NONE;
}
static inline irqreturn_t emulator_soft_irq_isr(
int irq,
void *ctxt)
{
return IRQ_HANDLED;
}
# endif /* #if defined(CONFIG_IPA_EMULATION) */
#endif /* #if !defined(_GSI_EMULATION_H_) */

12
qcom/opensource/dataipa/drivers/platform/msm/gsi/gsi_emulation_stubs.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*/
#if !defined(_GSI_EMULATION_STUBS_H_)
# define _GSI_EMULATION_STUBS_H_
# include <asm/barrier.h>
# define __iowmb() wmb() /* used in gsi.h */
#endif /* #if !defined(_GSI_EMULATION_STUBS_H_) */

59
qcom/opensource/dataipa/drivers/platform/msm/gsi/gsi_trace.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#undef TRACE_SYSTEM
#define TRACE_SYSTEM gsi
#define TRACE_INCLUDE_FILE gsi_trace
#if !defined(_GSI_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
#define _GSI_TRACE_H
#include <linux/tracepoint.h>
TRACE_EVENT(
gsi_qtimer,
TP_PROTO(u64 qtimer, bool is_ll, uint8_t evt, uint32_t ch, uint32_t msk),
TP_ARGS(qtimer, is_ll, evt, ch, msk),
TP_STRUCT__entry(
__field(u64, qtimer)
__field(bool, is_ll)
__field(uint8_t, evt)
__field(uint32_t, ch)
__field(uint32_t, msk)
),
TP_fast_assign(
__entry->qtimer = qtimer;
__entry->is_ll = is_ll;
__entry->evt = evt;
__entry->ch = ch;
__entry->msk = msk;
),
TP_printk("qtimer=%llu is_ll=%s, evt=%u, ch=0x%x, msk=0x%x",
__entry->qtimer,
__entry->is_ll ? "true" : "false",
__entry->evt,
__entry->ch,
__entry->msk)
);
#endif /* _GSI_TRACE_H */
/* This part must be outside protection */
#ifndef GSI_TRACE_INCLUDE_PATH
#ifdef CONFIG_IPA_VENDOR_DLKM
#define GSI_TRACE_INCLUDE_PATH ../../../../vendor/qcom/opensource/dataipa/drivers/platform/msm/gsi
#else
#define GSI_TRACE_INCLUDE_PATH ../../techpack/dataipa/drivers/platform/msm/gsi
#endif
#endif
#define TRACE_INCLUDE_PATH GSI_TRACE_INCLUDE_PATH
#include <trace/define_trace.h>

71
qcom/opensource/dataipa/drivers/platform/msm/gsi/gsihal/gsihal.c Normal file
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*/
#include "gsihal_i.h"
#include "gsihal_reg.h"
struct gsihal_context *gsihal_ctx;
int gsihal_init(enum gsi_ver gsi_ver, void __iomem *base)
{
int result = 0;
GSIDBG("initializing GSI HAL, GSI ver %d, base = %pK\n",
gsi_ver, base);
if (gsihal_ctx) {
GSIDBG("gsihal already initialized\n");
if (base != gsihal_ctx->base) {
GSIERR(
"base address of early init is differnet.\n"
);
WARN_ON(1);
}
result = -EEXIST;
goto bail_err_exit;
}
if (gsi_ver < GSI_VER_1_0 || gsi_ver >= GSI_VER_MAX) {
GSIERR("invalid GSI version %d\n", gsi_ver);
result = -EINVAL;
goto bail_err_exit;
}
if (!base) {
GSIERR("invalid memory io mapping addr\n");
result = -EINVAL;
goto bail_err_exit;
}
gsihal_ctx = kzalloc(sizeof(*gsihal_ctx), GFP_KERNEL);
if (!gsihal_ctx) {
GSIERR("kzalloc err for gsihal_ctx\n");
result = -ENOMEM;
goto bail_err_exit;
}
gsihal_ctx->gsi_ver = gsi_ver;
gsihal_ctx->base = base;
if (gsihal_reg_init(gsi_ver)) {
GSIERR("failed to initialize gsihal regs\n");
result = -EINVAL;
goto bail_free_ctx;
}
return 0;
bail_free_ctx:
kfree(gsihal_ctx);
gsihal_ctx = NULL;
bail_err_exit:
return result;
}
void gsihal_destroy(void)
{
GSIDBG("Entry\n");
kfree(gsihal_ctx);
gsihal_ctx = NULL;
}

14
qcom/opensource/dataipa/drivers/platform/msm/gsi/gsihal/gsihal.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2030, The Linux Foundation. All rights reserved.
*/
#ifndef _GSIHAL_H_
#define _GSIHAL_H_
#include "gsihal_reg.h"
int gsihal_init(enum gsi_ver gsi_ver, void __iomem *base);
void gsihal_destroy(void);
#endif /* _GSIHAL_H_ */

19
qcom/opensource/dataipa/drivers/platform/msm/gsi/gsihal/gsihal_i.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*/
#ifndef _GSIHAL_I_H_
#define _GSIHAL_I_H_
#include "../gsi.h"
#include <linux/slab.h>
#include <linux/io.h>
struct gsihal_context {
enum gsi_ver gsi_ver;
void __iomem *base;
};
extern struct gsihal_context *gsihal_ctx;
#endif /* _GSIHAL_I_H_ */

2527
qcom/opensource/dataipa/drivers/platform/msm/gsi/gsihal/gsihal_reg.c Normal file
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511
qcom/opensource/dataipa/drivers/platform/msm/gsi/gsihal/gsihal_reg.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2030, The Linux Foundation. All rights reserved.
*/
#ifndef _GSIHAL_REG_H_
#define _GSIHAL_REG_H_
/*
* Registers names
*
* NOTE:: Any change to this enum, need to change to gsireg_name_to_str
* array as well.
*/
enum gsihal_reg_name {
GSI_EE_n_CNTXT_TYPE_IRQ_MSK,
GSI_EE_n_CNTXT_SRC_GSI_CH_IRQ_MSK,
GSI_EE_n_CNTXT_SRC_EV_CH_IRQ_MSK,
GSI_EE_n_CNTXT_SRC_IEOB_IRQ_MSK,
GSI_EE_n_CNTXT_GLOB_IRQ_EN,
GSI_EE_n_CNTXT_GSI_IRQ_EN,
GSI_EE_n_CNTXT_TYPE_IRQ,
GSI_EE_n_CNTXT_SRC_GSI_CH_IRQ,
GSI_EE_n_GSI_CH_k_CNTXT_0,
GSI_EE_n_CNTXT_SRC_GSI_CH_IRQ_CLR,
GSI_EE_n_CNTXT_SRC_EV_CH_IRQ,
GSI_EE_n_CNTXT_SRC_EV_CH_IRQ_CLR,
GSI_EE_n_EV_CH_k_CNTXT_0,
GSI_EE_n_CNTXT_GLOB_IRQ_STTS,
GSI_EE_n_ERROR_LOG,
GSI_EE_n_ERROR_LOG_CLR,
GSI_EE_n_CNTXT_GLOB_IRQ_CLR,
GSI_EE_n_EV_CH_k_DOORBELL_0,
GSI_EE_n_GSI_CH_k_DOORBELL_0,
GSI_EE_n_CNTXT_SRC_IEOB_IRQ,
GSI_EE_n_CNTXT_SRC_IEOB_IRQ_CLR,
GSI_INTER_EE_n_SRC_GSI_CH_IRQ,
GSI_INTER_EE_n_SRC_GSI_CH_IRQ_CLR,
GSI_INTER_EE_n_SRC_EV_CH_IRQ,
GSI_INTER_EE_n_SRC_EV_CH_IRQ_CLR,
GSI_EE_n_CNTXT_GSI_IRQ_STTS,
GSI_EE_n_CNTXT_GSI_IRQ_CLR,
GSI_EE_n_GSI_HW_PARAM,
GSI_EE_n_GSI_HW_PARAM_0,
GSI_EE_n_GSI_HW_PARAM_2,
GSI_EE_n_GSI_HW_PARAM_4,
GSI_EE_n_GSI_SW_VERSION,
GSI_EE_n_CNTXT_INTSET,
GSI_EE_n_CNTXT_MSI_BASE_LSB,
GSI_EE_n_CNTXT_MSI_BASE_MSB,
GSI_EE_n_GSI_STATUS,
GSI_EE_n_CNTXT_SCRATCH_0,
GSI_EE_n_EV_CH_k_CNTXT_1,
GSI_EE_n_EV_CH_k_CNTXT_2,
GSI_EE_n_EV_CH_k_CNTXT_3,
GSI_EE_n_EV_CH_k_CNTXT_8,
GSI_EE_n_EV_CH_k_CNTXT_9,
GSI_EE_n_EV_CH_k_CNTXT_10,
GSI_EE_n_EV_CH_k_CNTXT_11,
GSI_EE_n_EV_CH_k_CNTXT_12,
GSI_EE_n_EV_CH_k_CNTXT_13,
GSI_EE_n_EV_CH_k_DOORBELL_1,
GSI_EE_n_EV_CH_CMD,
GSI_EE_n_EV_CH_k_SCRATCH_0,
GSI_EE_n_EV_CH_k_SCRATCH_1,
GSI_EE_n_GSI_CH_k_DOORBELL_1,
GSI_EE_n_GSI_CH_k_QOS,
GSI_EE_n_GSI_CH_k_CNTXT_1,
GSI_EE_n_GSI_CH_k_CNTXT_2,
GSI_EE_n_GSI_CH_k_CNTXT_3,
GSI_EE_n_GSI_CH_CMD,
GSI_EE_n_GSI_CH_k_SCRATCH_0,
GSI_EE_n_GSI_CH_k_SCRATCH_1,
GSI_EE_n_GSI_CH_k_SCRATCH_2,
GSI_EE_n_GSI_CH_k_SCRATCH_3,
GSI_EE_n_GSI_CH_k_SCRATCH_4,
GSI_EE_n_GSI_CH_k_SCRATCH_5,
GSI_EE_n_GSI_CH_k_SCRATCH_6,
GSI_EE_n_GSI_CH_k_SCRATCH_7,
GSI_EE_n_GSI_CH_k_SCRATCH_8,
GSI_EE_n_GSI_CH_k_SCRATCH_9,
GSI_EE_n_GSI_CH_k_CNTXT_4,
GSI_EE_n_GSI_CH_k_CNTXT_5,
GSI_EE_n_GSI_CH_k_CNTXT_6,
GSI_EE_n_GSI_CH_k_CNTXT_7,
GSI_EE_n_GSI_CH_k_CNTXT_8,
GSI_EE_n_EV_CH_k_CNTXT_4,
GSI_EE_n_EV_CH_k_CNTXT_5,
GSI_EE_n_EV_CH_k_CNTXT_6,
GSI_EE_n_EV_CH_k_CNTXT_7,
GSI_GSI_IRAM_PTR_CH_CMD,
GSI_GSI_IRAM_PTR_CH_DB,
GSI_GSI_IRAM_PTR_CH_DIS_COMP,
GSI_GSI_IRAM_PTR_CH_EMPTY,
GSI_GSI_IRAM_PTR_EE_GENERIC_CMD,
GSI_GSI_IRAM_PTR_EVENT_GEN_COMP,
GSI_GSI_IRAM_PTR_INT_MOD_STOPPED,
GSI_GSI_IRAM_PTR_PERIPH_IF_TLV_IN_0,
GSI_GSI_IRAM_PTR_PERIPH_IF_TLV_IN_2,
GSI_GSI_IRAM_PTR_PERIPH_IF_TLV_IN_1,
GSI_GSI_IRAM_PTR_NEW_RE,
GSI_GSI_IRAM_PTR_READ_ENG_COMP,
GSI_GSI_IRAM_PTR_TIMER_EXPIRED,
GSI_GSI_IRAM_PTR_EV_DB,
GSI_GSI_IRAM_PTR_UC_GP_INT,
GSI_GSI_IRAM_PTR_WRITE_ENG_COMP,
GSI_GSI_IRAM_PTR_TLV_CH_NOT_FULL,
GSI_IC_DISABLE_CHNL_BCK_PRS_LSB,
GSI_IC_DISABLE_CHNL_BCK_PRS_MSB,
GSI_IC_GEN_EVNT_BCK_PRS_LSB,
GSI_IC_GEN_EVNT_BCK_PRS_MSB,
GSI_IC_GEN_INT_BCK_PRS_LSB,
GSI_IC_GEN_INT_BCK_PRS_MSB,
GSI_IC_STOP_INT_MOD_BCK_PRS_LSB,
GSI_IC_STOP_INT_MOD_BCK_PRS_MSB,
GSI_IC_PROCESS_DESC_BCK_PRS_LSB,
GSI_IC_PROCESS_DESC_BCK_PRS_MSB,
GSI_IC_TLV_STOP_BCK_PRS_LSB,
GSI_IC_TLV_STOP_BCK_PRS_MSB,
GSI_IC_TLV_RESET_BCK_PRS_LSB,
GSI_IC_TLV_RESET_BCK_PRS_MSB,
GSI_IC_RGSTR_TIMER_BCK_PRS_LSB,
GSI_IC_RGSTR_TIMER_BCK_PRS_MSB,
GSI_IC_READ_BCK_PRS_LSB,
GSI_IC_READ_BCK_PRS_MSB,
GSI_IC_WRITE_BCK_PRS_LSB,
GSI_IC_WRITE_BCK_PRS_MSB,
GSI_IC_UCONTROLLER_GPR_BCK_PRS_LSB,
GSI_IC_UCONTROLLER_GPR_BCK_PRS_MSB,
GSI_GSI_PERIPH_BASE_ADDR_MSB,
GSI_GSI_PERIPH_BASE_ADDR_LSB,
GSI_GSI_MCS_CFG,
GSI_GSI_CFG,
GSI_EE_n_GSI_EE_GENERIC_CMD,
GSI_MAP_EE_n_CH_k_VP_TABLE,
GSI_EE_n_GSI_CH_k_RE_FETCH_READ_PTR,
GSI_EE_n_GSI_CH_k_RE_FETCH_WRITE_PTR,
GSI_GSI_INST_RAM_n,
GSI_GSI_IRAM_PTR_MSI_DB,
GSI_GSI_IRAM_PTR_INT_NOTIFY_MCS,
GSI_EE_n_CNTXT_SRC_GSI_CH_IRQ_k,
GSI_EE_n_CNTXT_SRC_EV_CH_IRQ_k,
GSI_EE_n_CNTXT_SRC_GSI_CH_IRQ_MSK_k,
GSI_EE_n_CNTXT_SRC_EV_CH_IRQ_MSK_k,
GSI_EE_n_CNTXT_SRC_GSI_CH_IRQ_CLR_k,
GSI_EE_n_CNTXT_SRC_EV_CH_IRQ_CLR_k,
GSI_EE_n_CNTXT_SRC_IEOB_IRQ_k,
GSI_EE_n_CNTXT_SRC_IEOB_IRQ_MSK_k,
GSI_EE_n_CNTXT_SRC_IEOB_IRQ_CLR_k,
GSI_INTER_EE_n_SRC_GSI_CH_IRQ_k,
GSI_INTER_EE_n_SRC_GSI_CH_IRQ_CLR_k,
GSI_INTER_EE_n_SRC_EV_CH_IRQ_k,
GSI_INTER_EE_n_SRC_EV_CH_IRQ_CLR_k,
GSI_GSI_SHRAM_n,
GSI_GSI_MCS_PROFILING_BP_CNT_LSB,
GSI_GSI_MCS_PROFILING_BP_CNT_MSB,
GSI_GSI_MCS_PROFILING_BP_AND_PENDING_CNT_LSB,
GSI_GSI_MCS_PROFILING_BP_AND_PENDING_CNT_MSB,
GSI_GSI_MCS_PROFILING_MCS_BUSY_CNT_LSB,
GSI_GSI_MCS_PROFILING_MCS_BUSY_CNT_MSB,
GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_LSB,
GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_MSB,
GSI_EE_n_CH_k_CH_ALMST_EMPTY_THRSHOLD,
GSI_EE_n_GSI_DEBUG_PC_FOR_DEBUG,
GSI_EE_n_GSI_DEBUG_BUSY_REG,
GSI_REG_MAX
};
struct gsihal_reg_ctx_type_irq {
uint32_t general;
uint32_t inter_ee_ev_ctrl;
uint32_t inter_ee_ch_ctrl;
uint32_t ieob;
uint32_t glob_ee;
uint32_t ev_ctrl;
uint32_t ch_ctrl;
};
struct gsihal_reg_ch_k_cntxt_0 {
uint32_t element_size;
uint32_t chstate;
uint32_t erindex;
uint32_t chtype_protocol_msb;
uint32_t chid;
uint32_t ee;
uint32_t chtype_dir;
uint32_t chtype_protocol;
};
struct gsihal_reg_cntxt_glob_irq_stts {
uint8_t gp_int3;
uint8_t gp_int2;
uint8_t gp_int1;
uint8_t error_int;
};
struct gsihal_reg_cntxt_gsi_irq_stts {
uint8_t gsi_mcs_stack_ovrflow;
uint8_t gsi_cmd_fifo_ovrflow;
uint8_t gsi_bus_error;
uint8_t gsi_break_point;
};
struct gsihal_reg_hw_param {
uint32_t periph_sec_grp;
uint32_t use_axi_m;
uint32_t periph_conf_addr_bus_w;
uint32_t num_ees;
uint32_t gsi_ch_num;
uint32_t gsi_ev_ch_num;
};
struct gsihal_reg_hw_param2 {
uint32_t gsi_use_inter_ee;
uint32_t gsi_use_rd_wr_eng;
uint32_t gsi_sdma_n_iovec;
uint32_t gsi_sdma_max_burst;
uint32_t gsi_sdma_n_int;
uint32_t gsi_use_sdma;
uint32_t gsi_ch_full_logic;
uint32_t gsi_ch_pend_translate;
uint32_t gsi_num_ev_per_ee;
uint32_t gsi_num_ch_per_ee;
uint32_t gsi_iram_size;
};
struct gsihal_reg_hw_param4 {
uint32_t gsi_iram_protcol_cnt;
uint32_t gsi_num_ev_per_ee;
};
struct gsihal_reg_gsi_status {
uint8_t enabled;
};
struct gsihal_reg_ev_ch_k_cntxt_0 {
uint32_t element_size;
uint32_t chstate;
uint32_t intype;
uint32_t evchid;
uint32_t ee;
uint32_t chtype;
};
struct gsihal_reg_ev_ch_k_cntxt_1 {
uint32_t r_length;
};
struct gsihal_reg_ev_ch_k_cntxt_2 {
uint32_t r_base_addr_lsbs;
};
struct gsihal_reg_ev_ch_k_cntxt_3 {
uint32_t r_base_addr_msbs;
};
struct gsihal_reg_ev_ch_k_cntxt_8 {
uint32_t int_mod_cnt;
uint32_t int_modc;
uint32_t int_modt;
};
struct gsihal_reg_ev_ch_k_cntxt_9 {
uint32_t intvec;
};
union gsihal_reg_ev_ch_k_cntxt_10 {
uint32_t msi_addr_lsb;
uint32_t rp_addr_lsb;
};
union gsihal_reg_ev_ch_k_cntxt_11 {
uint32_t msi_addr_msb;
uint32_t rp_addr_msb;
};
struct gsihal_reg_ev_ch_k_cntxt_12 {
uint32_t rp_update_addr_lsb;
};
struct gsihal_reg_ev_ch_k_cntxt_13 {
uint32_t rp_update_addr_msb;
};
struct gsihal_reg_gsi_ee_n_ev_ch_k_doorbell_1 {
uint32_t write_ptr_msb;
};
struct gsihal_reg_ee_n_ev_ch_cmd {
uint32_t opcode;
uint32_t chid;
};
struct gsihal_reg_ee_n_gsi_ch_cmd {
uint32_t opcode;
uint32_t chid;
};
struct gsihal_reg_gsi_ee_n_gsi_ch_k_qos {
uint32_t low_latency_en; //3.0
uint32_t db_in_bytes; //2.9
uint32_t empty_lvl_thrshold;
uint32_t prefetch_mode;
uint32_t use_escape_buf_only; //stringray
uint32_t use_db_eng; //mclaren
uint32_t max_prefetch;
uint32_t wrr_weight;
};
struct gsihal_reg_ch_k_cntxt_1 {
uint32_t r_length;
uint32_t erindex;
};
struct gsihal_reg_gsi_cfg {
uint32_t sleep_clk_div;
uint32_t bp_mtrix_disable;
uint32_t gsi_pwr_clps;
uint32_t uc_is_mcs;
uint32_t double_mcs_clk_freq;
uint32_t mcs_enable;
uint32_t gsi_enable;
};
struct gsihal_reg_gsi_ee_generic_cmd {
uint32_t opcode;
uint32_t virt_chan_idx;
uint32_t ee;
bool prmy_scnd_fc;
};
struct gsihal_reg_gsi_ee_n_cntxt_gsi_irq {
uint8_t gsi_mcs_stack_ovrflow;
uint8_t gsi_cmd_fifo_ovrflow;
uint8_t gsi_bus_error;
uint8_t gsi_break_point;
};
/*
* gsihal_reg_init() - intialize gsihal regsiters module
*/
int gsihal_reg_init(enum gsi_ver gsi_ver);
/*
* gsihal_read_reg_nk() - Get nk parameterized reg value
*/
u32 gsihal_read_reg_nk(enum gsihal_reg_name reg, u32 n, u32 k);
/*
* gsihal_read_reg_n() - Get n parameterized reg value
*/
static inline u32 gsihal_read_reg_n(enum gsihal_reg_name reg, u32 n)
{
return gsihal_read_reg_nk(reg, n, 0);
}
/*
* gsihal_read_reg() - Get reg value
*/
static inline u32 gsihal_read_reg(enum gsihal_reg_name reg)
{
return gsihal_read_reg_nk(reg, 0, 0);
}
/*
* gsihal_write_reg_nk() - Write to n/k parameterized reg a raw value
*/
void gsihal_write_reg_nk(enum gsihal_reg_name reg, u32 n, u32 k, u32 val);
/*
* gsihal_write_reg_n() - Write to n parameterized reg a raw value
*/
static inline void gsihal_write_reg_n(enum gsihal_reg_name reg, u32 n, u32 val)
{
gsihal_write_reg_nk(reg, n, 0, val);
}
/*
* gsihal_write_reg() - Write to reg a raw value
*/
static inline void gsihal_write_reg(enum gsihal_reg_name reg, u32 val)
{
gsihal_write_reg_nk(reg, 0, 0, val);
}
/*
* gsihal_read_reg_nk_fields() - Get the parsed value of nk parameterized reg
*/
u32 gsihal_read_reg_nk_fields(enum gsihal_reg_name reg,
u32 n, u32 k, void *fields);
/*
* gsihal_write_reg_nk_fields() - Write to nk parameterized reg a prased value
*/
void gsihal_write_reg_nk_fields(enum gsihal_reg_name reg, u32 n, u32 k,
const void *fields);
/*
* gsihal_read_reg_n_fields() - Get the parsed value of n parameterized reg
*/
u32 gsihal_read_reg_n_fields(enum gsihal_reg_name reg, u32 n, void *fields);
/*
* gsihal_write_reg_n_fields() - Write to n parameterized reg a prased value
*/
void gsihal_write_reg_n_fields(enum gsihal_reg_name reg, u32 n,
const void *fields);
/*
* gsihal_write_reg_fields() - Write to reg a prased value
*/
void gsihal_write_reg_fields(enum gsihal_reg_name reg, const void *fields);
/*
* gsihal_read_reg_fields() - Get the parsed value of reg
*/
u32 gsihal_read_reg_fields(enum gsihal_reg_name reg, void *fields);
/*
* gsihal_get_bit_map_array_size() - Get the size of the bit map
* array size according to the
* GSI version.
*/
u32 gsihal_get_bit_map_array_size(void);
/*
* gsihal_read_ch_reg() - Get the raw value of a ch reg
*/
u32 gsihal_read_ch_reg(enum gsihal_reg_name reg, u32 ch_num);
/*
* gsihal_test_ch_bit() - return true if a ch bit is set
*/
bool gsihal_test_ch_bit(u32 reg_val, u32 ch_num);
/*
* gsihal_get_ch_bit() - get ch bit set in the right offset
*/
u32 gsihal_get_ch_bit(u32 ch_num);
/*
* gsihal_get_ch_reg_idx() - get ch reg index according to ch num
*/
u32 gsihal_get_ch_reg_idx(u32 ch_num);
/*
* gsihal_get_ch_reg_mask() - get ch reg mask according to ch num
*/
u32 gsihal_get_ch_reg_mask(u32 ch_num);
/*
* gsihal_get_ch_reg_offset() - Get the offset of a ch register according to
* ch index
*/
u32 gsihal_get_ch_reg_offset(enum gsihal_reg_name reg, u32 ch_num);
/*
* gsihal_get_ch_reg_n_offset() - Get the offset of a ch n register according
* to ch index and n
*/
u32 gsihal_get_ch_reg_n_offset(enum gsihal_reg_name reg, u32 n, u32 ch_num);
/*
* gsihal_write_ch_bit_map_reg_n() - Write mask to ch reg a raw value
*/
void gsihal_write_ch_bit_map_reg_n(enum gsihal_reg_name reg, u32 n, u32 ch_num,
u32 mask);
/*
* gsihal_write_set_ch_bit_map_reg_n() - Set ch bit in reg a raw value
*/
void gsihal_write_set_ch_bit_map_reg_n(enum gsihal_reg_name reg, u32 n,
u32 ch_num);
/*
* Get the offset of a nk parameterized register
*/
u32 gsihal_get_reg_nk_ofst(enum gsihal_reg_name reg, u32 n, u32 k);
/*
* Check that ring length is valid
*/
bool gsihal_check_ring_length_valid(u32 r_len, u32 elem_size);
/*
* Get the offset of a n parameterized register
*/
static inline u32 gsihal_get_reg_n_ofst(enum gsihal_reg_name reg, u32 n)
{
return gsihal_get_reg_nk_ofst(reg, n, 0);
}
/*
* Get the offset of a register
*/
static inline u32 gsihal_get_reg_ofst(enum gsihal_reg_name reg)
{
return gsihal_get_reg_nk_ofst(reg, 0, 0);
}
/*
* Get GSI instruction ram MAX size
*/
unsigned long gsihal_get_inst_ram_size(void);
/*
* Get mask for GP_int1
*/
u32 gsihal_get_glob_irq_en_gp_int1_mask(void);
#endif /* _GSIHAL_REG_H_ */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _GSIHAL_REG_I_H_
#define _GSIHAL_REG_I_H_
#define GSI_SETFIELD(val, shift, mask) (((val) << (shift)) & (mask))
#define GSI_SETFIELD_IN_REG(reg, val, shift, mask) \
(reg |= ((val) << (shift)) & (mask))
#define GSI_GETFIELD_FROM_REG(reg, shift, mask) \
(((reg) & (mask)) >> (shift))
/* GSI_GSI_INST_RAM_n */
#define GSI_GSI_INST_RAM_n_WORD_SZ 0x4
/* GSI_GSI_SHRAM_n */
#define GSI_GSI_SHRAM_n_WORD_SZ 0x4
#define GSI_GSI_INST_RAM_n_MAXn 4095
#define GSI_V2_0_GSI_INST_RAM_n_MAXn 6143
#define GSI_V2_2_GSI_INST_RAM_n_MAXn 4095
#define GSI_V2_5_GSI_INST_RAM_n_MAXn 8191
#define GSI_V2_7_GSI_INST_RAM_n_MAXn 5119
#define GSI_V2_9_GSI_INST_RAM_n_MAXn 6143
#define GSI_V3_0_GSI_INST_RAM_n_MAXn 8255
#define GSI_V5_2_GSI_INST_RAM_n_MAXn 6207
/* GSI_EE_n_CNTXT_TYPE_IRQ */
#define GSI_EE_n_CNTXT_TYPE_IRQ_GENERAL_BMSK 0x40
#define GSI_EE_n_CNTXT_TYPE_IRQ_GENERAL_SHFT 0x6
#define GSI_EE_n_CNTXT_TYPE_IRQ_INTER_EE_EV_CTRL_BMSK 0x20
#define GSI_EE_n_CNTXT_TYPE_IRQ_INTER_EE_EV_CTRL_SHFT 0x5
#define GSI_EE_n_CNTXT_TYPE_IRQ_INTER_EE_CH_CTRL_BMSK 0x10
#define GSI_EE_n_CNTXT_TYPE_IRQ_INTER_EE_CH_CTRL_SHFT 0x4
#define GSI_EE_n_CNTXT_TYPE_IRQ_IEOB_BMSK 0x8
#define GSI_EE_n_CNTXT_TYPE_IRQ_IEOB_SHFT 0x3
#define GSI_EE_n_CNTXT_TYPE_IRQ_GLOB_EE_BMSK 0x4
#define GSI_EE_n_CNTXT_TYPE_IRQ_GLOB_EE_SHFT 0x2
#define GSI_EE_n_CNTXT_TYPE_IRQ_EV_CTRL_BMSK 0x2
#define GSI_EE_n_CNTXT_TYPE_IRQ_EV_CTRL_SHFT 0x1
#define GSI_EE_n_CNTXT_TYPE_IRQ_CH_CTRL_BMSK 0x1
#define GSI_EE_n_CNTXT_TYPE_IRQ_CH_CTRL_SHFT 0x0
/* GSI_EE_n_GSI_CH_k_CNTXT_0 */
#define GSI_EE_n_GSI_CH_k_CNTXT_0_ELEMENT_SIZE_BMSK 0xff000000
#define GSI_EE_n_GSI_CH_k_CNTXT_0_ELEMENT_SIZE_SHFT 0x18
#define GSI_EE_n_GSI_CH_k_CNTXT_0_CHSTATE_BMSK 0xf00000
#define GSI_EE_n_GSI_CH_k_CNTXT_0_CHSTATE_SHFT 0x14
#define GSI_EE_n_GSI_CH_k_CNTXT_0_ERINDEX_BMSK 0x7c000
#define GSI_EE_n_GSI_CH_k_CNTXT_0_ERINDEX_SHFT 0xe
#define GSI_EE_n_GSI_CH_k_CNTXT_0_CHID_BMSK 0x1f00
#define GSI_EE_n_GSI_CH_k_CNTXT_0_CHID_SHFT 0x8
#define GSI_EE_n_GSI_CH_k_CNTXT_0_EE_BMSK 0xf0
#define GSI_EE_n_GSI_CH_k_CNTXT_0_EE_SHFT 0x4
#define GSI_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_DIR_BMSK 0x8
#define GSI_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_DIR_SHFT 0x3
#define GSI_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_PROTOCOL_BMSK 0x7
#define GSI_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_PROTOCOL_SHFT 0x0
#define GSI_V2_5_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_PROTOCOL_MSB_BMSK 0x2000
#define GSI_V2_5_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_PROTOCOL_MSB_SHFT 0xd
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_0_CHID_BMSK 0xff000
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_0_CHID_SHFT 0xc
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_0_EE_BMSK 0xf00
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_0_EE_SHFT 0x8
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_DIR_BMSK 0x80
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_DIR_SHFT 0x7
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_PROTOCOL_BMSK 0x7f
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_0_CHTYPE_PROTOCOL_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_0 */
#define GSI_EE_n_EV_CH_k_CNTXT_0_ELEMENT_SIZE_BMSK 0xff000000
#define GSI_EE_n_EV_CH_k_CNTXT_0_ELEMENT_SIZE_SHFT 0x18
#define GSI_EE_n_EV_CH_k_CNTXT_0_CHSTATE_BMSK 0xf00000
#define GSI_EE_n_EV_CH_k_CNTXT_0_CHSTATE_SHFT 0x14
#define GSI_EE_n_EV_CH_k_CNTXT_0_INTYPE_BMSK 0x10000
#define GSI_EE_n_EV_CH_k_CNTXT_0_INTYPE_SHFT 0x10
#define GSI_EE_n_EV_CH_k_CNTXT_0_EVCHID_BMSK 0xff00
#define GSI_EE_n_EV_CH_k_CNTXT_0_EVCHID_SHFT 0x8
#define GSI_EE_n_EV_CH_k_CNTXT_0_EE_BMSK 0xf0
#define GSI_EE_n_EV_CH_k_CNTXT_0_EE_SHFT 0x4
#define GSI_EE_n_EV_CH_k_CNTXT_0_CHTYPE_BMSK 0xf
#define GSI_EE_n_EV_CH_k_CNTXT_0_CHTYPE_SHFT 0x0
#define GSI_V3_0_EE_n_EV_CH_k_CNTXT_0_EE_BMSK 0xf0000
#define GSI_V3_0_EE_n_EV_CH_k_CNTXT_0_EE_SHFT 0x10
#define GSI_V3_0_EE_n_EV_CH_k_CNTXT_0_INTYPE_BMSK 0x80
#define GSI_V3_0_EE_n_EV_CH_k_CNTXT_0_INTYPE_SHFT 0x7
#define GSI_V3_0_EE_n_EV_CH_k_CNTXT_0_CHTYPE_BMSK 0x7f
#define GSI_V3_0_EE_n_EV_CH_k_CNTXT_0_CHTYPE_SHFT 0x0
/* GSI_EE_n_CNTXT_GLOB_IRQ_STTS */
#define GSI_EE_n_CNTXT_GLOB_IRQ_STTS_GP_INT3_BMSK 0x8
#define GSI_EE_n_CNTXT_GLOB_IRQ_STTS_GP_INT3_SHFT 0x3
#define GSI_EE_n_CNTXT_GLOB_IRQ_STTS_GP_INT2_BMSK 0x4
#define GSI_EE_n_CNTXT_GLOB_IRQ_STTS_GP_INT2_SHFT 0x2
#define GSI_EE_n_CNTXT_GLOB_IRQ_STTS_GP_INT1_BMSK 0x2
#define GSI_EE_n_CNTXT_GLOB_IRQ_STTS_GP_INT1_SHFT 0x1
#define GSI_EE_n_CNTXT_GLOB_IRQ_STTS_ERROR_INT_BMSK 0x1
#define GSI_EE_n_CNTXT_GLOB_IRQ_STTS_ERROR_INT_SHFT 0x0
/* GSI_EE_n_CNTXT_GLOB_IRQ_EN */
#define GSI_EE_n_CNTXT_GLOB_IRQ_EN_GP_INT3_BMSK 0x8
#define GSI_EE_n_CNTXT_GLOB_IRQ_EN_GP_INT3_SHFT 0x3
#define GSI_EE_n_CNTXT_GLOB_IRQ_EN_GP_INT2_BMSK 0x4
#define GSI_EE_n_CNTXT_GLOB_IRQ_EN_GP_INT2_SHFT 0x2
#define GSI_EE_n_CNTXT_GLOB_IRQ_EN_GP_INT1_BMSK 0x2
#define GSI_EE_n_CNTXT_GLOB_IRQ_EN_GP_INT1_SHFT 0x1
#define GSI_EE_n_CNTXT_GLOB_IRQ_EN_ERROR_INT_BMSK 0x1
#define GSI_EE_n_CNTXT_GLOB_IRQ_EN_ERROR_INT_SHFT 0x0
/* GSI_EE_n_CNTXT_GSI_IRQ_STTS */
#define GSI_EE_n_CNTXT_GSI_IRQ_STTS_GSI_MCS_STACK_OVRFLOW_BMSK 0x8
#define GSI_EE_n_CNTXT_GSI_IRQ_STTS_GSI_MCS_STACK_OVRFLOW_SHFT 0x3
#define GSI_EE_n_CNTXT_GSI_IRQ_STTS_GSI_CMD_FIFO_OVRFLOW_BMSK 0x4
#define GSI_EE_n_CNTXT_GSI_IRQ_STTS_GSI_CMD_FIFO_OVRFLOW_SHFT 0x2
#define GSI_EE_n_CNTXT_GSI_IRQ_STTS_GSI_BUS_ERROR_BMSK 0x2
#define GSI_EE_n_CNTXT_GSI_IRQ_STTS_GSI_BUS_ERROR_SHFT 0x1
#define GSI_EE_n_CNTXT_GSI_IRQ_STTS_GSI_BREAK_POINT_BMSK 0x1
#define GSI_EE_n_CNTXT_GSI_IRQ_STTS_GSI_BREAK_POINT_SHFT 0x0
/* GSI_EE_n_CNTXT_TYPE_IRQ */
#define GSI_EE_n_CNTXT_TYPE_IRQ_GENERAL_BMSK 0x40
#define GSI_EE_n_CNTXT_TYPE_IRQ_GENERAL_SHFT 0x6
#define GSI_EE_n_CNTXT_TYPE_IRQ_INTER_EE_EV_CTRL_BMSK 0x20
#define GSI_EE_n_CNTXT_TYPE_IRQ_INTER_EE_EV_CTRL_SHFT 0x5
#define GSI_EE_n_CNTXT_TYPE_IRQ_INTER_EE_CH_CTRL_BMSK 0x10
#define GSI_EE_n_CNTXT_TYPE_IRQ_INTER_EE_CH_CTRL_SHFT 0x4
#define GSI_EE_n_CNTXT_TYPE_IRQ_IEOB_BMSK 0x8
#define GSI_EE_n_CNTXT_TYPE_IRQ_IEOB_SHFT 0x3
#define GSI_EE_n_CNTXT_TYPE_IRQ_GLOB_EE_BMSK 0x4
#define GSI_EE_n_CNTXT_TYPE_IRQ_GLOB_EE_SHFT 0x2
#define GSI_EE_n_CNTXT_TYPE_IRQ_EV_CTRL_BMSK 0x2
#define GSI_EE_n_CNTXT_TYPE_IRQ_EV_CTRL_SHFT 0x1
#define GSI_EE_n_CNTXT_TYPE_IRQ_CH_CTRL_BMSK 0x1
#define GSI_EE_n_CNTXT_TYPE_IRQ_CH_CTRL_SHFT 0x0
/* GSI_EE_n_GSI_HW_PARAM */
#define GSI_V1_0_EE_n_GSI_HW_PARAM_PERIPH_SEC_GRP_BMSK 0x7c000000
#define GSI_V1_0_EE_n_GSI_HW_PARAM_PERIPH_SEC_GRP_SHFT 0x1a
#define GSI_V1_0_EE_n_GSI_HW_PARAM_USE_AXI_M_BMSK 0x2000000
#define GSI_V1_0_EE_n_GSI_HW_PARAM_USE_AXI_M_SHFT 0x19
#define GSI_V1_0_EE_n_GSI_HW_PARAM_PERIPH_CONF_ADDR_BUS_W_BMSK 0x1f00000
#define GSI_V1_0_EE_n_GSI_HW_PARAM_PERIPH_CONF_ADDR_BUS_W_SHFT 0x14
#define GSI_V1_0_EE_n_GSI_HW_PARAM_NUM_EES_BMSK 0xf0000
#define GSI_V1_0_EE_n_GSI_HW_PARAM_NUM_EES_SHFT 0x10
#define GSI_V1_0_EE_n_GSI_HW_PARAM_GSI_CH_NUM_BMSK 0xff00
#define GSI_V1_0_EE_n_GSI_HW_PARAM_GSI_CH_NUM_SHFT 0x8
#define GSI_V1_0_EE_n_GSI_HW_PARAM_GSI_EV_CH_NUM_BMSK 0xff
#define GSI_V1_0_EE_n_GSI_HW_PARAM_GSI_EV_CH_NUM_SHFT 0x0
/* GSI_EE_n_GSI_HW_PARAM_0 */
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_USE_AXI_M_BMSK 0x80000000
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_USE_AXI_M_SHFT 0x1f
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_PERIPH_SEC_GRP_BMSK 0x7c000000
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_PERIPH_SEC_GRP_SHFT 0x1a
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_PERIPH_CONF_ADDR_BUS_W_BMSK 0x3e00000
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_PERIPH_CONF_ADDR_BUS_W_SHFT 0x15
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_NUM_EES_BMSK 0x1f0000
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_NUM_EES_SHFT 0x10
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_GSI_CH_NUM_BMSK 0xff00
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_GSI_CH_NUM_SHFT 0x8
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_GSI_EV_CH_NUM_BMSK 0xff
#define GSI_V1_2_EE_n_GSI_HW_PARAM_0_GSI_EV_CH_NUM_SHFT 0x0
/* GSI_EE_n_GSI_HW_PARAM_2 */
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_CH_FULL_LOGIC_BMSK 0x4000
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_CH_FULL_LOGIC_SHFT 0xe
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_CH_PEND_TRANSLATE_BMSK 0x2000
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_CH_PEND_TRANSLATE_SHFT 0xd
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_NUM_EV_PER_EE_BMSK 0x1f00
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_NUM_EV_PER_EE_SHFT 0x8
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_NUM_CH_PER_EE_BMSK 0xf8
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_NUM_CH_PER_EE_SHFT 0x3
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_IRAM_SIZE_BMSK 0x7
#define GSI_V1_3_EE_n_GSI_HW_PARAM_2_GSI_IRAM_SIZE_SHFT 0x0
#define GSI_V2_0_EE_n_GSI_HW_PARAM_2_GSI_SDMA_N_IOVEC_BMSK 0x38000000
#define GSI_V2_0_EE_n_GSI_HW_PARAM_2_GSI_SDMA_N_IOVEC_SHFT 0x1b
#define GSI_V2_0_EE_n_GSI_HW_PARAM_2_GSI_SDMA_MAX_BURST_BMSK 0x7F80000
#define GSI_V2_0_EE_n_GSI_HW_PARAM_2_GSI_SDMA_MAX_BURST_SHFT 0x13
#define GSI_V2_0_EE_n_GSI_HW_PARAM_2_GSI_SDMA_N_INT_BMSK 0x70000
#define GSI_V2_0_EE_n_GSI_HW_PARAM_2_GSI_SDMA_N_INT_SHFT 0x10
#define GSI_V2_0_EE_n_GSI_HW_PARAM_2_GSI_USE_SDMA_BMSK 0x8000
#define GSI_V2_0_EE_n_GSI_HW_PARAM_2_GSI_USE_SDMA_SHFT 0xf
#define GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_USE_INTER_EE_BMSK 0x80000000
#define GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_USE_INTER_EE_SHFT 0x1f
#define GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_USE_RD_WR_ENG_BMSK 0x40000000
#define GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_USE_RD_WR_ENG_SHFT 0x1E
#define GSI_V3_0_EE_n_GSI_HW_PARAM_2_GSI_IRAM_SIZE_BMSK 0x1f00
#define GSI_V3_0_EE_n_GSI_HW_PARAM_2_GSI_IRAM_SIZE_SHFT 0x8
#define GSI_V3_0_EE_n_GSI_HW_PARAM_2_GSI_NUM_CH_PER_EE_BMSK 0xff
#define GSI_V3_0_EE_n_GSI_HW_PARAM_2_GSI_NUM_CH_PER_EE_SHFT 0x0
/* GSI_EE_n_GSI_HW_PARAM_4 */
#define GSI_V3_0_EE_n_GSI_HW_PARAM_4_GSI_IRAM_PROTCOL_CNT_BMSK 0xff00
#define GSI_V3_0_EE_n_GSI_HW_PARAM_4_GSI_IRAM_PROTCOL_CNT_SHFT 0x8
#define GSI_V3_0_EE_n_GSI_HW_PARAM_4_GSI_NUM_EV_PER_EE_BMSK 0xff
#define GSI_V3_0_EE_n_GSI_HW_PARAM_4_GSI_NUM_EV_PER_EE_SHFT 0x0
/* GSI_EE_n_GSI_STATUS */
#define GSI_EE_n_GSI_STATUS_ENABLED_BMSK 0x1
#define GSI_EE_n_GSI_STATUS_ENABLED_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_1 */
#define GSI_EE_n_EV_CH_k_CNTXT_1_R_LENGTH_BMSK 0xffff
#define GSI_EE_n_EV_CH_k_CNTXT_1_R_LENGTH_SHFT 0x0
#define GSI_V2_9_EE_n_EV_CH_k_CNTXT_1_R_LENGTH_BMSK 0xfffff
#define GSI_V2_9_EE_n_EV_CH_k_CNTXT_1_R_LENGTH_SHFT 0x0
#define GSI_V3_0_EE_n_EV_CH_k_CNTXT_1_R_LENGTH_BMSK 0xffffff
#define GSI_V3_0_EE_n_EV_CH_k_CNTXT_1_R_LENGTH_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_2 */
#define GSI_EE_n_EV_CH_k_CNTXT_2_R_BASE_ADDR_LSBS_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_2_R_BASE_ADDR_LSBS_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_3 */
#define GSI_EE_n_EV_CH_k_CNTXT_3_R_BASE_ADDR_MSBS_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_3_R_BASE_ADDR_MSBS_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_8 */
#define GSI_EE_n_EV_CH_k_CNTXT_8_INT_MOD_CNT_BMSK 0xff000000
#define GSI_EE_n_EV_CH_k_CNTXT_8_INT_MOD_CNT_SHFT 0x18
#define GSI_EE_n_EV_CH_k_CNTXT_8_INT_MODC_BMSK 0xff0000
#define GSI_EE_n_EV_CH_k_CNTXT_8_INT_MODC_SHFT 0x10
#define GSI_EE_n_EV_CH_k_CNTXT_8_INT_MODT_BMSK 0xffff
#define GSI_EE_n_EV_CH_k_CNTXT_8_INT_MODT_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_9 */
#define GSI_EE_n_EV_CH_k_CNTXT_9_INTVEC_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_9_INTVEC_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_10 */
#define GSI_EE_n_EV_CH_k_CNTXT_10_ADDR_LSB_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_10_ADDR_LSB_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_11 */
#define GSI_EE_n_EV_CH_k_CNTXT_11_ADDR_MSB_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_11_ADDR_MSB_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_12 */
#define GSI_EE_n_EV_CH_k_CNTXT_12_RP_UPDATE_ADDR_LSB_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_12_RP_UPDATE_ADDR_LSB_SHFT 0x0
/* GSI_EE_n_EV_CH_k_CNTXT_13 */
#define GSI_EE_n_EV_CH_k_CNTXT_13_RP_UPDATE_ADDR_MSB_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_CNTXT_13_RP_UPDATE_ADDR_MSB_SHFT 0x0
/* GSI_EE_n_EV_CH_k_DOORBELL_1 */
#define GSI_EE_n_EV_CH_k_DOORBELL_1_WRITE_PTR_MSB_BMSK 0xffffffff
#define GSI_EE_n_EV_CH_k_DOORBELL_1_WRITE_PTR_MSB_SHFT 0x0
/* GSI_EE_n_EV_CH_CMD */
#define GSI_EE_n_EV_CH_CMD_OPCODE_BMSK 0xff000000
#define GSI_EE_n_EV_CH_CMD_OPCODE_SHFT 0x18
#define GSI_EE_n_EV_CH_CMD_CHID_BMSK 0xff
#define GSI_EE_n_EV_CH_CMD_CHID_SHFT 0x0
/* GSI_EE_n_GSI_CH_k_QOS */
#define GSI_EE_n_GSI_CH_k_QOS_USE_DB_ENG_BMSK 0x200
#define GSI_EE_n_GSI_CH_k_QOS_USE_DB_ENG_SHFT 0x9
#define GSI_EE_n_GSI_CH_k_QOS_MAX_PREFETCH_BMSK 0x100
#define GSI_EE_n_GSI_CH_k_QOS_MAX_PREFETCH_SHFT 0x8
#define GSI_EE_n_GSI_CH_k_QOS_WRR_WEIGHT_BMSK 0xf
#define GSI_EE_n_GSI_CH_k_QOS_WRR_WEIGHT_SHFT 0x0
#define GSI_V2_0_EE_n_GSI_CH_k_QOS_USE_ESCAPE_BUF_ONLY_BMSK 0x400
#define GSI_V2_0_EE_n_GSI_CH_k_QOS_USE_ESCAPE_BUF_ONLY_SHFT 0xa
#define GSI_V2_5_EE_n_GSI_CH_k_QOS_EMPTY_LVL_THRSHOLD_SHFT 0x10
#define GSI_V2_9_EE_n_GSI_CH_k_QOS_EMPTY_LVL_THRSHOLD_BMSK 0xff0000
#define GSI_V2_5_EE_n_GSI_CH_k_QOS_PREFETCH_MODE_BMSK 0x3c00
#define GSI_V2_5_EE_n_GSI_CH_k_QOS_PREFETCH_MODE_SHFT 0xa
#define GSI_V2_9_EE_n_GSI_CH_k_QOS_DB_IN_BYTES_BMSK 0x1000000
#define GSI_V2_9_EE_n_GSI_CH_k_QOS_DB_IN_BYTES_SHFT 0x18
#define GSI_V3_0_EE_n_GSI_CH_k_QOS_LOW_LATENCY_EN_BMSK 0x2000000
#define GSI_V3_0_EE_n_GSI_CH_k_QOS_LOW_LATENCY_EN_SHFT 0x19
/* GSI_EE_n_GSI_CH_k_CNTXT_1 */
#define GSI_EE_n_GSI_CH_k_CNTXT_1_R_LENGTH_BMSK 0xffff
#define GSI_EE_n_GSI_CH_k_CNTXT_1_R_LENGTH_SHFT 0x0
#define GSI_V2_9_EE_n_GSI_CH_k_CNTXT_1_R_LENGTH_BMSK 0xfffff
#define GSI_V2_9_EE_n_GSI_CH_k_CNTXT_1_R_LENGTH_SHFT 0x0
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_1_ERINDEX_BMSK 0xff000000
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_1_ERINDEX_SHFT 0x18
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_1_R_LENGTH_BMSK 0xffffff
#define GSI_V3_0_EE_n_GSI_CH_k_CNTXT_1_R_LENGTH_SHFT 0x0
/* For GSI 3.0 each ring has maximum of 64 * 1024 elements */
#define GSI_V3_0_MAX_ELEMENTS_PER_RING (65536)
/* GSI_EE_n_GSI_CH_CMD */
#define GSI_EE_n_GSI_CH_CMD_OPCODE_BMSK 0xff000000
#define GSI_EE_n_GSI_CH_CMD_OPCODE_SHFT 0x18
#define GSI_EE_n_GSI_CH_CMD_CHID_BMSK 0xff
#define GSI_EE_n_GSI_CH_CMD_CHID_SHFT 0x0
/* GSI_GSI_CFG */
#define GSI_GSI_CFG_BP_MTRIX_DISABLE_BMSK 0x20
#define GSI_GSI_CFG_BP_MTRIX_DISABLE_SHFT 0x5
#define GSI_GSI_CFG_GSI_PWR_CLPS_BMSK 0x10
#define GSI_GSI_CFG_GSI_PWR_CLPS_SHFT 0x4
#define GSI_GSI_CFG_UC_IS_MCS_BMSK 0x8
#define GSI_GSI_CFG_UC_IS_MCS_SHFT 0x3
#define GSI_GSI_CFG_DOUBLE_MCS_CLK_FREQ_BMSK 0x4
#define GSI_GSI_CFG_DOUBLE_MCS_CLK_FREQ_SHFT 0x2
#define GSI_GSI_CFG_MCS_ENABLE_BMSK 0x2
#define GSI_GSI_CFG_MCS_ENABLE_SHFT 0x1
#define GSI_GSI_CFG_GSI_ENABLE_BMSK 0x1
#define GSI_GSI_CFG_GSI_ENABLE_SHFT 0x0
#define GSI_V2_5_GSI_CFG_SLEEP_CLK_DIV_BMSK 0xf00
#define GSI_V2_5_GSI_CFG_SLEEP_CLK_DIV_SHFT 0x8
/* GSI_EE_n_GSI_EE_GENERIC_CMD */
#define GSI_EE_n_GSI_EE_GENERIC_CMD_OPCODE_BMSK 0x1f
#define GSI_EE_n_GSI_EE_GENERIC_CMD_OPCODE_SHFT 0x0
#define GSI_EE_n_GSI_EE_GENERIC_CMD_VIRT_CHAN_IDX_BMSK 0x3e0
#define GSI_EE_n_GSI_EE_GENERIC_CMD_VIRT_CHAN_IDX_SHFT 0x5
#define GSI_EE_n_GSI_EE_GENERIC_CMD_EE_BMSK 0x3c00
#define GSI_EE_n_GSI_EE_GENERIC_CMD_EE_SHFT 0xa
#define GSI_V3_0_EE_n_GSI_EE_GENERIC_CMD_VIRT_CHAN_IDX_BMSK 0x1fe0
#define GSI_V3_0_EE_n_GSI_EE_GENERIC_CMD_VIRT_CHAN_IDX_SHFT 0x5
#define GSI_V3_0_EE_n_GSI_EE_GENERIC_CMD_EE_BMSK 0x1e000
#define GSI_V3_0_EE_n_GSI_EE_GENERIC_CMD_EE_SHFT 0xd
#define GSI_V3_0_EE_n_GSI_EE_GENERIC_CMD_PARAM_BMSK 0xff000000
#define GSI_V3_0_EE_n_GSI_EE_GENERIC_CMD_PARAM_SHFT 0x18
/* GSI_EE_n_CNTXT_GSI_IRQ_EN */
#define GSI_EE_n_CNTXT_GSI_IRQ_EN_GSI_MCS_STACK_OVRFLOW_BMSK 0x8
#define GSI_EE_n_CNTXT_GSI_IRQ_EN_GSI_MCS_STACK_OVRFLOW_SHFT 0x3
#define GSI_EE_n_CNTXT_GSI_IRQ_EN_GSI_CMD_FIFO_OVRFLOW_BMSK 0x4
#define GSI_EE_n_CNTXT_GSI_IRQ_EN_GSI_CMD_FIFO_OVRFLOW_SHFT 0x2
#define GSI_EE_n_CNTXT_GSI_IRQ_EN_GSI_BUS_ERROR_BMSK 0x2
#define GSI_EE_n_CNTXT_GSI_IRQ_EN_GSI_BUS_ERROR_SHFT 0x1
#define GSI_EE_n_CNTXT_GSI_IRQ_EN_GSI_BREAK_POINT_BMSK 0x1
#define GSI_EE_n_CNTXT_GSI_IRQ_EN_GSI_BREAK_POINT_SHFT 0x0
#endif /* _GSIHAL_REG_I_H_ */

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qcom/opensource/dataipa/drivers/platform/msm/include/linux/ipa.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _IPA_ETH_H_
#define _IPA_ETH_H_
#include "ipa.h"
#include <linux/msm_ipa.h>
#include <linux/msm_gsi.h>
/* New architecture prototypes */
typedef void (*ipa_eth_ready_cb)(void *user_data);
typedef u32 ipa_eth_hdl_t;
/**
* struct ipa_eth_ready_cb - eth readiness parameters
*
* @notify: ipa_eth client ready callback notifier
* @userdata: userdata for ipa_eth ready cb
* @is_eth_ready: true if ipa_eth client is already ready
*/
struct ipa_eth_ready {
ipa_eth_ready_cb notify;
void *userdata;
/* out params */
bool is_eth_ready;
};
/**
* enum ipa_eth_client_type - names for the various IPA
* eth "clients".
*/
enum ipa_eth_client_type {
IPA_ETH_CLIENT_AQC107,
IPA_ETH_CLIENT_AQC113,
IPA_ETH_CLIENT_RTK8111K,
IPA_ETH_CLIENT_RTK8125B,
IPA_ETH_CLIENT_NTN,
IPA_ETH_CLIENT_EMAC,
IPA_ETH_CLIENT_MAX,
};
/**
* enum ipa_eth_pipe_traffic_type - traffic type for the various IPA
* eth "pipes".
*/
enum ipa_eth_pipe_traffic_type {
IPA_ETH_PIPE_BEST_EFFORT,
IPA_ETH_PIPE_LOW_LATENCY,
IPA_ETH_PIPE_TRAFFIC_TYPE_MAX,
};
/**
* enum ipa_eth_pipe_direction - pipe direcitons for same
* ethernet client.
*/
enum ipa_eth_pipe_direction {
IPA_ETH_PIPE_DIR_TX,
IPA_ETH_PIPE_DIR_RX,
IPA_ETH_PIPE_DIR_MAX,
};
#define IPA_ETH_INST_ID_MAX (2)
/**
* struct ipa_eth_ntn_setup_info - parameters for ntn ethernet
* offloading
*
* @bar_addr: bar PA to access NTN register
* @tail_ptr_offs: tail ptr offset
* @ioc_mod_threshold: Descriptors # per interrupt request from
* NTN3 HW via descriptor bit as part of the protocol.
*/
struct ipa_eth_ntn_setup_info {
phys_addr_t bar_addr;
phys_addr_t tail_ptr_offs;
uint16_t ioc_mod_threshold;
};
/**
* struct ipa_eth_aqc_setup_info - parameters for aqc ethernet
* offloading
*
* @bar_addr: bar PA to access AQC register
* @head_ptr_offs: head ptr offset
* @aqc_ch: AQC ch number
* @dest_tail_ptr_offs: tail ptr offset
*/
struct ipa_eth_aqc_setup_info {
phys_addr_t bar_addr;
phys_addr_t head_ptr_offs;
u8 aqc_ch;
phys_addr_t dest_tail_ptr_offs;
};
/**
* struct ipa_eth_realtek_setup_info - parameters for realtek ethernet
* offloading
*
* @bar_addr: bar PA to access RTK register
* @bar_size: bar region size
* @queue_number: Which RTK queue to check the status on
* @dest_tail_ptr_offs: tail ptr offset
*/
struct ipa_eth_realtek_setup_info {
phys_addr_t bar_addr;
u32 bar_size;
u8 queue_number;
phys_addr_t dest_tail_ptr_offs;
};
/**
* struct ipa_eth_buff_smmu_map - IPA iova->pa SMMU mapping
* @iova: virtual address of the data buffer
* @pa: physical address of the data buffer
*/
struct ipa_eth_buff_smmu_map {
dma_addr_t iova;
phys_addr_t pa;
};
/**
* struct ipa_eth_pipe_setup_info - info needed for IPA setups
* @is_transfer_ring_valid: if transfer ring is needed
* @transfer_ring_base: the base of the transfer ring
* @transfer_ring_sgt: sgtable of transfer ring
* @transfer_ring_size: size of the transfer ring
* @is_buffer_pool_valid: if buffer pool is needed
* @buffer_pool_base_addr: base of buffer pool address
* @buffer_pool_base_sgt: sgtable of buffer pool
* @data_buff_list_size: number of buffers
* @data_buff_list: array of data buffer list
* @fix_buffer_size: buffer size
* @notify: callback for exception/embedded packets
* @priv: priv for exception callback
* @client_info: vendor specific pipe setup info
* @db_pa: doorbell physical address
* @db_val: doorbell value ethernet HW need to ring
*/
struct ipa_eth_pipe_setup_info {
/* transfer ring info */
bool is_transfer_ring_valid;
dma_addr_t transfer_ring_base;
struct sg_table *transfer_ring_sgt;
u32 transfer_ring_size;
/* buffer pool info */
bool is_buffer_pool_valid;
dma_addr_t buffer_pool_base_addr;
struct sg_table *buffer_pool_base_sgt;
/* buffer info */
u32 data_buff_list_size;
struct ipa_eth_buff_smmu_map *data_buff_list;
u32 fix_buffer_size;
/* client notify cb */
ipa_notify_cb notify;
void *priv;
/* vendor specific info */
union {
struct ipa_eth_aqc_setup_info aqc;
struct ipa_eth_realtek_setup_info rtk;
struct ipa_eth_ntn_setup_info ntn;
} client_info;
/* output params */
phys_addr_t db_pa;
u32 db_val;
};
/**
* struct ipa_eth_client_pipe_info - ETH pipe/gsi related configuration
* @link: link of ep for different client function on same ethernet HW
* @dir: TX or RX direction
* @info: tx/rx pipe setup info
* @client_info: client the pipe belongs to
* @pipe_hdl: output params, pipe handle
*/
struct ipa_eth_client_pipe_info {
struct list_head link;
enum ipa_eth_pipe_direction dir;
struct ipa_eth_pipe_setup_info info;
struct ipa_eth_client *client_info;
/* output params */
ipa_eth_hdl_t pipe_hdl;
};
/**
* struct ipa_eth_client - client info per traffic type
* provided by offload client
* @client_type: ethernet client type
* @inst_id: instance id for dual NIC support
* @traffic_type: traffic type
* @pipe_list: list of pipes with same traffic type
* @priv: private data for client
* @test: is test client
*/
struct ipa_eth_client {
/* vendor driver */
enum ipa_eth_client_type client_type;
u8 inst_id;
/* traffic type */
enum ipa_eth_pipe_traffic_type traffic_type;
struct list_head pipe_list;
/* client specific priv data*/
void *priv;
bool test;
};
/**
* struct ipa_eth_perf_profile - To set BandWidth profile
*
* @max_supported_bw_mbps: maximum bandwidth needed (in Mbps)
*/
struct ipa_eth_perf_profile {
u32 max_supported_bw_mbps;
};
/**
* struct ipa_eth_hdr_info - Header to install on IPA HW
*
* @hdr: header to install on IPA HW
* @hdr_len: length of header
* @dst_mac_addr_offset: destination mac address offset
* @hdr_type: layer two header type
*/
struct ipa_eth_hdr_info {
u8 *hdr;
u8 hdr_len;
u8 dst_mac_addr_offset;
enum ipa_hdr_l2_type hdr_type;
};
/**
* struct ipa_eth_intf_info - parameters for ipa offload
* interface registration
*
* @netdev_name: network interface name
* @hdr: hdr for ipv4/ipv6
* @pipe_hdl_list_size: number of pipes prop needed for this interface
* @pipe_hdl_list: array of pipes used for this interface
*/
struct ipa_eth_intf_info {
const char *netdev_name;
struct ipa_eth_hdr_info hdr[IPA_IP_MAX];
/* tx/rx pipes for same netdev */
int pipe_hdl_list_size;
ipa_eth_hdl_t *pipe_hdl_list;
};
int ipa_eth_register_ready_cb(struct ipa_eth_ready *ready_info);
int ipa_eth_unregister_ready_cb(struct ipa_eth_ready *ready_info);
int ipa_eth_client_conn_pipes(struct ipa_eth_client *client);
int ipa_eth_client_disconn_pipes(struct ipa_eth_client *client);
int ipa_eth_client_reg_intf(struct ipa_eth_intf_info *intf);
int ipa_eth_client_unreg_intf(struct ipa_eth_intf_info *intf);
int ipa_eth_client_set_perf_profile(struct ipa_eth_client *client,
struct ipa_eth_perf_profile *profile);
int ipa_eth_client_conn_evt(struct ipa_ecm_msg *msg);
int ipa_eth_client_disconn_evt(struct ipa_ecm_msg *msg);
enum ipa_client_type ipa_eth_get_ipa_client_type_from_eth_type(
enum ipa_eth_client_type eth_client_type, enum ipa_eth_pipe_direction dir);
bool ipa_eth_client_exist(
enum ipa_eth_client_type eth_client_type, int inst_id);
#endif // _IPA_ETH_H_

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
*/
#ifndef IPA_MHI_H_
#define IPA_MHI_H_
#include <linux/ipa.h>
#include <linux/types.h>
/**
* enum ipa_mhi_event_type - event type for mhi callback
*
* @IPA_MHI_EVENT_READY: IPA MHI is ready and IPA uC is loaded. After getting
* this event MHI client is expected to call to ipa_mhi_start() API
* @IPA_MHI_EVENT_DATA_AVAILABLE: downlink data available on MHI channel
*/
enum ipa_mhi_event_type {
IPA_MHI_EVENT_READY,
IPA_MHI_EVENT_DATA_AVAILABLE,
IPA_MHI_EVENT_MAX,
};
enum ipa_mhi_mstate {
IPA_MHI_STATE_M0,
IPA_MHI_STATE_M1,
IPA_MHI_STATE_M2,
IPA_MHI_STATE_M3,
IPA_MHI_STATE_M_MAX
};
typedef void (*mhi_client_cb)(void *priv, enum ipa_mhi_event_type event,
unsigned long data);
/**
* struct ipa_mhi_msi_info - parameters for MSI (Message Signaled Interrupts)
* @addr_low: MSI lower base physical address
* @addr_hi: MSI higher base physical address
* @data: Data Pattern to use when generating the MSI
* @mask: Mask indicating number of messages assigned by the host to device
*
* msi value is written according to this formula:
* ((data & ~mask) | (mmio.msiVec & mask))
*/
struct ipa_mhi_msi_info {
u32 addr_low;
u32 addr_hi;
u32 data;
u32 mask;
};
/**
* struct ipa_mhi_init_params - parameters for IPA MHI initialization API
*
* @msi: MSI (Message Signaled Interrupts) parameters
* @mmio_addr: MHI MMIO physical address
* @first_ch_idx: First channel ID for hardware accelerated channels.
* @first_er_idx: First event ring ID for hardware accelerated channels.
* @assert_bit40: should assert bit 40 in order to access host space.
* if PCIe iATU is configured then not need to assert bit40
* @notify: client callback
* @priv: client private data to be provided in client callback
* @test_mode: flag to indicate if IPA MHI is in unit test mode
*/
struct ipa_mhi_init_params {
struct ipa_mhi_msi_info msi;
u32 mmio_addr;
u32 first_ch_idx;
u32 first_er_idx;
bool assert_bit40;
mhi_client_cb notify;
void *priv;
bool test_mode;
};
/**
* struct ipa_mhi_start_params - parameters for IPA MHI start API
*
* @host_ctrl_addr: Base address of MHI control data structures
* @host_data_addr: Base address of MHI data buffers
* @channel_context_addr: channel context array address in host address space
* @event_context_addr: event context array address in host address space
*/
struct ipa_mhi_start_params {
u32 host_ctrl_addr;
u32 host_data_addr;
u64 channel_context_array_addr;
u64 event_context_array_addr;
};
/**
* struct ipa_mhi_connect_params - parameters for IPA MHI channel connect API
*
* @sys: IPA EP configuration info
* @channel_id: MHI channel id
*/
struct ipa_mhi_connect_params {
struct ipa_sys_connect_params sys;
u8 channel_id;
};
/* bit #40 in address should be asserted for MHI transfers over pcie */
#define IPA_MHI_HOST_ADDR(addr) ((addr) | BIT_ULL(40))
#if IS_ENABLED(CONFIG_IPA3)
int ipa_mhi_init(struct ipa_mhi_init_params *params);
int ipa_mhi_start(struct ipa_mhi_start_params *params);
int ipa_mhi_connect_pipe(struct ipa_mhi_connect_params *in, u32 *clnt_hdl);
int ipa_mhi_disconnect_pipe(u32 clnt_hdl);
int ipa_mhi_suspend(bool force);
int ipa_mhi_resume(void);
void ipa_mhi_destroy(void);
int ipa_mhi_update_mstate(enum ipa_mhi_mstate mstate_info);
#else /* IS_ENABLED(CONFIG_IPA3) */
static inline int ipa_mhi_init(struct ipa_mhi_init_params *params)
{
return -EPERM;
}
static inline int ipa_mhi_start(struct ipa_mhi_start_params *params)
{
return -EPERM;
}
static inline int ipa_mhi_connect_pipe(struct ipa_mhi_connect_params *in,
u32 *clnt_hdl)
{
return -EPERM;
}
static inline int ipa_mhi_disconnect_pipe(u32 clnt_hdl)
{
return -EPERM;
}
static inline int ipa_mhi_suspend(bool force)
{
return -EPERM;
}
static inline int ipa_mhi_resume(void)
{
return -EPERM;
}
static inline void ipa_mhi_destroy(void)
{
}
static inline int ipa_mhi_update_mstate
(enum ipa_mhi_mstate mstate_info)
{
return -EPERM;
}
#endif /* IS_ENABLED(CONFIG_IPA3) */
#endif /* IPA_MHI_H_ */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _IPA_ODO_BRIDGE_H_
#define _IPA_ODO_BRIDGE_H_
#include "ipa.h"
/**
* struct odu_bridge_params - parameters for odu bridge initialization API
*
* @netdev_name: network interface name
* @priv: private data that will be supplied to client's callback
* @tx_dp_notify: callback for handling SKB. the following event are supported:
* IPA_WRITE_DONE: will be called after client called to odu_bridge_tx_dp()
* Client is expected to free the skb.
* IPA_RECEIVE: will be called for delivering skb to APPS.
* Client is expected to deliver the skb to network stack.
* @send_dl_skb: callback for sending skb on downlink direction to adapter.
* Client is expected to free the skb.
* @device_ethaddr: device Ethernet address in network order.
* @ipa_desc_size: IPA Sys Pipe Desc Size
*/
struct odu_bridge_params {
const char *netdev_name;
void *priv;
ipa_notify_cb tx_dp_notify;
int (*send_dl_skb)(void *priv, struct sk_buff *skb);
u8 device_ethaddr[ETH_ALEN];
u32 ipa_desc_size;
};
/**
* struct ipa_bridge_init_params - parameters for IPA bridge initialization API
*
* @info: structure contains initialization information
* @wakeup_request: callback to client to indicate there is downlink data
* available. Client is expected to call ipa_bridge_resume() to start
* receiving data
*/
struct ipa_bridge_init_params {
struct odu_bridge_params info;
void (*wakeup_request)(void *cl_priv);
};
#if IS_ENABLED(CONFIG_IPA3)
int ipa_bridge_init(struct ipa_bridge_init_params *params, u32 *hdl);
int ipa_bridge_connect(u32 hdl);
int ipa_bridge_set_perf_profile(u32 hdl, u32 bandwidth);
int ipa_bridge_disconnect(u32 hdl);
int ipa_bridge_suspend(u32 hdl);
int ipa_bridge_resume(u32 hdl);
int ipa_bridge_tx_dp(u32 hdl, struct sk_buff *skb,
struct ipa_tx_meta *metadata);
int ipa_bridge_cleanup(u32 hdl);
#else /* IS_ENABLED(CONFIG_IPA3) */
static inline int ipa_bridge_init(struct odu_bridge_params *params, u32 *hdl)
{
return -EPERM;
}
static inline int ipa_bridge_connect(u32 hdl)
{
return -EPERM;
}
static inline int ipa_bridge_set_perf_profile(u32 hdl, u32 bandwidth)
{
return -EPERM;
}
static inline int ipa_bridge_disconnect(u32 hdl)
{
return -EPERM;
}
static inline int ipa_bridge_suspend(u32 hdl)
{
return -EPERM;
}
static inline int ipa_bridge_resume(u32 hdl)
{
return -EPERM;
}
static inline int ipa_bridge_tx_dp(u32 hdl, struct sk_buff *skb,
struct ipa_tx_meta *metadata)
{
return -EPERM;
}
static inline int ipa_bridge_cleanup(u32 hdl)
{
return -EPERM;
}
#endif /* IS_ENABLED(CONFIG_IPA3) */
/* Below API is deprecated. Please use the API above */
static inline int odu_bridge_init(struct odu_bridge_params *params)
{
return -EPERM;
}
static inline int odu_bridge_disconnect(void)
{
return -EPERM;
}
static inline int odu_bridge_connect(void)
{
return -EPERM;
}
static inline int odu_bridge_tx_dp(struct sk_buff *skb,
struct ipa_tx_meta *metadata)
{
return -EPERM;
}
static inline int odu_bridge_cleanup(void)
{
return -EPERM;
}
#endif /* _IPA_ODO_BRIDGE_H */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _IPA_QDSS_H_
#define _IPA_QDSS_H_
#include "ipa.h"
/**
* enum ipa_qdss_notify - these are the only return items
* @IPA_QDSS_SUCCESS: will be returned as it is for both conn
* and disconn
* @IPA_QDSS_PIPE_CONN_FAILURE: will be returned as negative value
* @IPA_QDSS_PIPE_DISCONN_FAILURE: will be returned as negative value
*/
enum ipa_qdss_notify {
IPA_QDSS_SUCCESS,
IPA_QDSS_PIPE_CONN_FAILURE,
IPA_QDSS_PIPE_DISCONN_FAILURE,
};
/**
* struct ipa_qdss_conn_in_params - QDSS -> IPA TX configuration
* @data_fifo_base_addr: Base address of the data FIFO used by BAM
* @data_fifo_size: Size of the data FIFO
* @desc_fifo_base_addr: Base address of the descriptor FIFO by BAM
* @desc_fifo_size: Should be configured to 1 by QDSS
* @bam_p_evt_dest_addr: equivalent to event_ring_doorbell_pa
* physical address of the doorbell that IPA uC
* will update the headpointer of the event ring.
* QDSS should send BAM_P_EVNT_REG address in this var
* Configured with the GSI Doorbell Address.
* GSI sends Update RP by doing a write to this address
* @bam_p_evt_threshold: Threshold level of how many bytes consumed
* @override_eot: if override EOT==1, it doesn't check the EOT bit in
* the descriptor
*/
struct ipa_qdss_conn_in_params {
phys_addr_t data_fifo_base_addr;
u32 data_fifo_size;
phys_addr_t desc_fifo_base_addr;
u32 desc_fifo_size;
phys_addr_t bam_p_evt_dest_addr;
u32 bam_p_evt_threshold;
u32 override_eot;
};
/**
* struct ipa_qdss_conn_out_params - information provided
* to QDSS driver
* @rx_db_pa: physical address of IPA doorbell for RX (QDSS->IPA transactions)
* QDSS to take this address and assign it to BAM_P_EVENT_DEST_ADDR
*/
struct ipa_qdss_conn_out_params {
phys_addr_t ipa_rx_db_pa;
};
#if IS_ENABLED(CONFIG_IPA3)
/**
* ipa_qdss_conn_pipes - Client should call this
* function to connect QDSS -> IPA pipe
*
* @in: [in] input parameters from client
* @out: [out] output params to client
*
* Note: Should not be called from atomic context
*
* @Return 0 on success, negative on failure
*/
int ipa_qdss_conn_pipes(struct ipa_qdss_conn_in_params *in,
struct ipa_qdss_conn_out_params *out);
/**
* ipa_qdss_disconn_pipes() - Client should call this
* function to disconnect pipes
*
* Note: Should not be called from atomic context
*
* Returns: 0 on success, negative on failure
*/
int ipa_qdss_disconn_pipes(void);
#else /* CONFIG_IPA3 */
static inline int ipa_qdss_conn_pipes(struct ipa_qdss_conn_in_params *in,
struct ipa_qdss_conn_out_params *out)
{
return -IPA_QDSS_PIPE_CONN_FAILURE;
}
static inline int ipa_qdss_disconn_pipes(void)
{
return -IPA_QDSS_PIPE_DISCONN_FAILURE;
}
#endif /* CONFIG_IPA3 */
#endif /* _IPA_QDSS_H_ */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _IPA_UC_OFFLOAD_H_
#define _IPA_UC_OFFLOAD_H_
#include "ipa.h"
/**
* enum ipa_uc_offload_proto
* Protocol type: either WDI or Neutrino
*
* @IPA_UC_WDI: wdi Protocol
* @IPA_UC_NTN: Neutrino Protocol
*/
enum ipa_uc_offload_proto {
IPA_UC_INVALID = 0,
IPA_UC_WDI = 1,
IPA_UC_NTN = 2,
IPA_UC_NTN_V2X = 3,
IPA_UC_MAX_PROT_SIZE
};
/**
* struct ipa_hdr_info - Header to install on IPA HW
*
* @hdr: header to install on IPA HW
* @hdr_len: length of header
* @dst_mac_addr_offset: destination mac address offset
* @hdr_type: layer two header type
*/
struct ipa_hdr_info {
u8 *hdr;
u8 hdr_len;
u8 dst_mac_addr_offset;
enum ipa_hdr_l2_type hdr_type;
};
/**
* struct ipa_uc_offload_intf_params - parameters for uC offload
* interface registration
*
* @netdev_name: network interface name
* @notify: callback for exception/embedded packets
* @priv: callback cookie
* @hdr_info: header information
* @meta_data: metadata if any
* @meta_data_mask: metadata mask
* @proto: uC offload protocol type
* @alt_dst_pipe: alternate routing output pipe
*/
struct ipa_uc_offload_intf_params {
const char *netdev_name;
ipa_notify_cb notify;
void *priv;
struct ipa_hdr_info hdr_info[IPA_IP_MAX];
u8 is_meta_data_valid;
u32 meta_data;
u32 meta_data_mask;
enum ipa_uc_offload_proto proto;
enum ipa_client_type alt_dst_pipe;
};
/**
* struct ntn_buff_smmu_map - IPA iova->pa SMMU mapping
* @iova: virtual address of the data buffer
* @pa: physical address of the data buffer
*/
struct ntn_buff_smmu_map {
dma_addr_t iova;
phys_addr_t pa;
};
/**
* struct ipa_ntn_setup_info - NTN TX/Rx configuration
* @client: type of "client" (IPA_CLIENT_ODU#_PROD/CONS)
* @smmu_enabled: SMMU is enabled for uC or not
* @ring_base_pa: physical address of the base of the Tx/Rx ring
* @ring_base_iova: virtual address of the base of the Tx/Rx ring
* @ring_base_sgt:Scatter table for ntn_rings,contains valid non NULL
* value when ENAC S1-SMMU enabed, else NULL.
* @ntn_ring_size: size of the Tx/Rx ring (in terms of elements)
* @buff_pool_base_pa: physical address of the base of the Tx/Rx buffer pool
* @buff_pool_base_iova: virtual address of the base of the Tx/Rx buffer pool
* @buff_pool_base_sgt: Scatter table for buffer pools,contains valid
* non NULL value. When NULL, do continuosly
* pa to iova mapping (SMMU disable, pa == iova).
* @num_buffers: Rx/Tx buffer pool size (in terms of elements)
* @data_buff_size: size of the each data buffer allocated in DDR
* @ntn_reg_base_ptr_pa: physical address of the Tx/Rx NTN Ring's
* @u8 db_mode: 0 means irq mode, 1 means db mode
* tail pointer
*/
struct ipa_ntn_setup_info {
enum ipa_client_type client;
bool smmu_enabled;
phys_addr_t ring_base_pa;
dma_addr_t ring_base_iova;
struct sg_table *ring_base_sgt;
u32 ntn_ring_size;
phys_addr_t buff_pool_base_pa;
dma_addr_t buff_pool_base_iova;
struct sg_table *buff_pool_base_sgt;
struct ntn_buff_smmu_map *data_buff_list;
u32 num_buffers;
u32 data_buff_size;
phys_addr_t ntn_reg_base_ptr_pa;
u8 db_mode;
};
/**
* struct ipa_uc_offload_out_params - out parameters for uC offload
*
* @clnt_hndl: Handle that client need to pass during
* further operations
*/
struct ipa_uc_offload_out_params {
u32 clnt_hndl;
};
/**
* struct ipa_ntn_conn_in_params - NTN TX/Rx connect parameters
* @ul: parameters to connect UL pipe(from Neutrino to IPA)
* @dl: parameters to connect DL pipe(from IPA to Neutrino)
*/
struct ipa_ntn_conn_in_params {
struct ipa_ntn_setup_info ul;
struct ipa_ntn_setup_info dl;
};
/**
* struct ipa_ntn_conn_out_params - information provided
* to uC offload client
* @ul_uc_db_pa: physical address of IPA uc doorbell for UL
* @dl_uc_db_pa: physical address of IPA uc doorbell for DL
* @clnt_hdl: opaque handle assigned to offload client
* @ul_uc_db_iomem: iomem address of IPA uc doorbell for UL
* @dl_uc_db_iomem: iomem address of IPA uc doorbell for DL
*/
struct ipa_ntn_conn_out_params {
phys_addr_t ul_uc_db_pa;
phys_addr_t dl_uc_db_pa;
void __iomem *ul_uc_db_iomem;
void __iomem *dl_uc_db_iomem;
};
/**
* struct ipa_uc_offload_conn_in_params - information provided by
* uC offload client
* @clnt_hndl: Handle that return as part of reg interface
* @proto: Protocol to use for offload data path
* @ntn: uC RX/Tx configuration info
*/
struct ipa_uc_offload_conn_in_params {
u32 clnt_hndl;
union {
struct ipa_ntn_conn_in_params ntn;
} u;
};
/**
* struct ipa_uc_offload_conn_out_params - information provided
* to uC offload client
* @ul_uc_db_pa: physical address of IPA uc doorbell for UL
* @dl_uc_db_pa: physical address of IPA uc doorbell for DL
* @clnt_hdl: opaque handle assigned to offload client
*/
struct ipa_uc_offload_conn_out_params {
union {
struct ipa_ntn_conn_out_params ntn;
} u;
};
/**
* struct ipa_perf_profile - To set BandWidth profile
*
* @client: type of "client" (IPA_CLIENT_ODU#_PROD/CONS)
* @proto: uC offload protocol type
* @max_supported_bw_mbps: maximum bandwidth needed (in Mbps)
*/
struct ipa_perf_profile {
enum ipa_client_type client;
enum ipa_uc_offload_proto proto;
u32 max_supported_bw_mbps;
};
/**
* struct ipa_uc_ready_params - uC ready CB parameters
* @is_uC_ready: uC loaded or not
* @priv : callback cookie
* @notify: callback
* @proto: uC offload protocol type
*/
struct ipa_uc_ready_params {
bool is_uC_ready;
void *priv;
ipa_uc_ready_cb notify;
enum ipa_uc_offload_proto proto;
};
#if IS_ENABLED(CONFIG_IPA3)
/**
* ipa_uc_offload_reg_intf - Client should call this function to
* init uC offload data path
*
* @init: [in] initialization parameters
*
* Note: Should not be called from atomic context and only
* after checking IPA readiness using ipa_register_ipa_ready_cb()
*
* @Return 0 on success, negative on failure
*/
int ipa_uc_offload_reg_intf(
struct ipa_uc_offload_intf_params *in,
struct ipa_uc_offload_out_params *out);
/**
* ipa_uc_offload_cleanup - Client Driver should call this
* function before unload and after disconnect
*
* @Return 0 on success, negative on failure
*/
int ipa_uc_offload_cleanup(u32 clnt_hdl);
/**
* ipa_uc_offload_conn_pipes - Client should call this
* function to connect uC pipe for offload data path
*
* @in: [in] input parameters from client
* @out: [out] output params to client
*
* Note: Should not be called from atomic context and only
* after checking IPA readiness using ipa_register_ipa_ready_cb()
*
* @Return 0 on success, negative on failure
*/
int ipa_uc_offload_conn_pipes(struct ipa_uc_offload_conn_in_params *in,
struct ipa_uc_offload_conn_out_params *out);
/**
* ipa_uc_offload_disconn_pipes() - Client should call this
* function to disconnect uC pipe to disable offload data path
* @clnt_hdl: [in] opaque client handle assigned by IPA to client
*
* Note: Should not be called from atomic context
*
* Returns: 0 on success, negative on failure
*/
int ipa_uc_offload_disconn_pipes(u32 clnt_hdl);
/**
* ipa_set_perf_profile() - Client should call this function to
* set IPA clock Band Width based on data rates
* @profile: [in] BandWidth profile to use
*
* Returns: 0 on success, negative on failure
*/
int ipa_set_perf_profile(struct ipa_perf_profile *profile);
/*
* To register uC ready callback if uC not ready
* and also check uC readiness
* if uC not ready only, register callback
*/
int ipa_uc_offload_reg_rdyCB(struct ipa_uc_ready_params *param);
/*
* To de-register uC ready callback
*/
void ipa_uc_offload_dereg_rdyCB(enum ipa_uc_offload_proto proto);
#else /* IS_ENABLED(CONFIG_IPA3) */
static inline int ipa_uc_offload_reg_intf(
struct ipa_uc_offload_intf_params *in,
struct ipa_uc_offload_out_params *out)
{
return -EPERM;
}
static inline int ipa_uC_offload_cleanup(u32 clnt_hdl)
{
return -EPERM;
}
static inline int ipa_uc_offload_conn_pipes(
struct ipa_uc_offload_conn_in_params *in,
struct ipa_uc_offload_conn_out_params *out)
{
return -EPERM;
}
static inline int ipa_uc_offload_disconn_pipes(u32 clnt_hdl)
{
return -EPERM;
}
static inline int ipa_set_perf_profile(struct ipa_perf_profile *profile)
{
return -EPERM;
}
static inline int ipa_uc_offload_reg_rdyCB(struct ipa_uc_ready_params *param)
{
return -EPERM;
}
static inline void ipa_uc_offload_dereg_rdyCB(enum ipa_uc_offload_proto proto)
{
}
#endif /* CONFIG_IPA3 */
#endif /* _IPA_UC_OFFLOAD_H_ */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _IPA_WIGIG_H_
#define _IPA_WIGIG_H_
#include <linux/msm_ipa.h>
#include "ipa.h"
typedef void (*ipa_wigig_misc_int_cb)(void *priv);
/*
* struct ipa_wigig_init_in_params - wigig init input parameters
*
* @periph_baddr_pa: physical address of wigig HW base
* @pseudo_cause_pa: physical address of wigig HW pseudo_cause register
* @int_gen_tx_pa: physical address of wigig HW int_gen_tx register
* @int_gen_rx_pa: physical address of wigig HW int_gen_rx register
* @dma_ep_misc_pa: physical address of wigig HW dma_ep_misc register
* @notify: uc ready callback
* @int_notify: wigig misc interrupt callback
* @priv: uc ready callback cookie
*/
struct ipa_wigig_init_in_params {
phys_addr_t periph_baddr_pa;
phys_addr_t pseudo_cause_pa;
phys_addr_t int_gen_tx_pa;
phys_addr_t int_gen_rx_pa;
phys_addr_t dma_ep_misc_pa;
ipa_uc_ready_cb notify;
ipa_wigig_misc_int_cb int_notify;
void *priv;
};
/*
* struct ipa_wigig_init_out_params - wigig init output parameters
*
* @is_uC_ready: is uC ready. No API should be called until uC is ready.
* @uc_db_pa: physical address of IPA uC doorbell
* @lan_rx_napi_enable: if we use NAPI in the LAN rx
*/
struct ipa_wigig_init_out_params {
bool is_uc_ready;
phys_addr_t uc_db_pa;
bool lan_rx_napi_enable;
};
/*
* struct ipa_wigig_hdr_info - Header to install on IPA HW
*
* @hdr: header to install on IPA HW
* @hdr_len: length of header
* @dst_mac_addr_offset: destination mac address offset
* @hdr_type: layer two header type
*/
struct ipa_wigig_hdr_info {
u8 *hdr;
u8 hdr_len;
u8 dst_mac_addr_offset;
enum ipa_hdr_l2_type hdr_type;
};
/*
* struct ipa_wigig_reg_intf_in_params - parameters for offload interface
* registration
*
* @netdev_name: network interface name
* @netdev_mac: netdev mac address
* @hdr_info: header information
*/
struct ipa_wigig_reg_intf_in_params {
const char *netdev_name;
u8 netdev_mac[IPA_MAC_ADDR_SIZE];
struct ipa_wigig_hdr_info hdr_info[IPA_IP_MAX];
};
/*
* struct ipa_wigig_pipe_setup_info - WIGIG TX/Rx configuration
* @desc_ring_base_pa: physical address of the base of the descriptor ring
* @desc_ring_size: size of the descriptor ring in bytes
* @desc_ring_HWHEAD_pa: physical address of the wigig descriptor ring HWHEAD
* @desc_ring_HWTAIL_pa: physical address of the wigig descriptor ring HWTAIL
* @status_ring_base_pa: physical address of the base of the status ring
* @status_ring_size: status ring size in bytes
* @desc_ring_HWHEAD_pa: physical address of the wigig descriptor ring HWHEAD
* @desc_ring_HWTAIL_pa: physical address of the wigig descriptor ring HWTAIL
*/
struct ipa_wigig_pipe_setup_info {
phys_addr_t desc_ring_base_pa;
u16 desc_ring_size;
phys_addr_t desc_ring_HWHEAD_pa;
phys_addr_t desc_ring_HWTAIL_pa;
phys_addr_t status_ring_base_pa;
u16 status_ring_size;
phys_addr_t status_ring_HWHEAD_pa;
phys_addr_t status_ring_HWTAIL_pa;
};
/*
* struct ipa_wigig_pipe_setup_info_smmu - WIGIG TX/Rx configuration smmu mode
* @desc_ring_base: sg_table of the base of the descriptor ring
* @desc_ring_base_iova: IO virtual address mapped to physical base address
* @desc_ring_size: size of the descriptor ring in bytes
* @desc_ring_HWHEAD_pa: physical address of the wigig descriptor ring HWHEAD
* @desc_ring_HWTAIL_pa: physical address of the wigig descriptor ring HWTAIL
* @status_ring_base: sg_table of the base of the status ring
* @status_ring_base_iova: IO virtual address mapped to physical base address
* @status_ring_size: status ring size in bytes
* @desc_ring_HWHEAD_pa: physical address of the wigig descriptor ring HWHEAD
* @desc_ring_HWTAIL_pa: physical address of the wigig descriptor ring HWTAIL
*/
struct ipa_wigig_pipe_setup_info_smmu {
struct sg_table desc_ring_base;
u64 desc_ring_base_iova;
u16 desc_ring_size;
phys_addr_t desc_ring_HWHEAD_pa;
phys_addr_t desc_ring_HWTAIL_pa;
struct sg_table status_ring_base;
u64 status_ring_base_iova;
u16 status_ring_size;
phys_addr_t status_ring_HWHEAD_pa;
phys_addr_t status_ring_HWTAIL_pa;
};
/*
* struct ipa_wigig_rx_pipe_data_buffer_info - WIGIG Rx data buffer
* configuration
* @data_buffer_base_pa: physical address of the physically contiguous
* Rx data buffer
* @data_buffer_size: size of the data buffer
*/
struct ipa_wigig_rx_pipe_data_buffer_info {
phys_addr_t data_buffer_base_pa;
u32 data_buffer_size;
};
/*
* struct ipa_wigig_rx_pipe_data_buffer_info_smmu - WIGIG Rx data buffer
* configuration smmu mode
* @data_buffer_base: sg_table of the physically contiguous
* Rx data buffer
* @data_buffer_base_iova: IO virtual address mapped to physical base address
* @data_buffer_size: size of the data buffer
*/
struct ipa_wigig_rx_pipe_data_buffer_info_smmu {
struct sg_table data_buffer_base;
u64 data_buffer_base_iova;
u32 data_buffer_size;
};
/*
* struct ipa_wigig_conn_rx_in_params - information provided by
* WIGIG offload client for Rx pipe
* @notify: client callback function
* @priv: client cookie
* @pipe: parameters to connect Rx pipe (WIGIG to IPA)
* @dbuff: Rx data buffer info
*/
struct ipa_wigig_conn_rx_in_params {
ipa_notify_cb notify;
void *priv;
struct ipa_wigig_pipe_setup_info pipe;
struct ipa_wigig_rx_pipe_data_buffer_info dbuff;
};
/*
* struct ipa_wigig_conn_rx_in_params_smmu - information provided by
* WIGIG offload client for Rx pipe
* @notify: client callback function
* @priv: client cookie
* @pipe_smmu: parameters to connect Rx pipe (WIGIG to IPA) smmu mode
* @dbuff_smmu: Rx data buffer info smmu mode
*/
struct ipa_wigig_conn_rx_in_params_smmu {
ipa_notify_cb notify;
void *priv;
struct ipa_wigig_pipe_setup_info_smmu pipe_smmu;
struct ipa_wigig_rx_pipe_data_buffer_info_smmu dbuff_smmu;
};
/*
* struct ipa_wigig_conn_out_params - information provided
* to WIGIG driver
* @client: client type allocated by IPA driver
*/
struct ipa_wigig_conn_out_params {
enum ipa_client_type client;
};
/*
* struct ipa_wigig_tx_pipe_data_buffer_info - WIGIG Tx data buffer
* configuration
* @data_buffer_size: size of a single data buffer
*/
struct ipa_wigig_tx_pipe_data_buffer_info {
u32 data_buffer_size;
};
/*
* struct ipa_wigig_tx_pipe_data_buffer_info_smmu - WIGIG Tx data buffer
* configuration smmu mode
* @data_buffer_base_pa: sg_tables of the Tx data buffers
* @data_buffer_base_iova: IO virtual address mapped to physical base address
* @num_buffers: number of buffers
* @data_buffer_size: size of a single data buffer
*/
struct ipa_wigig_tx_pipe_data_buffer_info_smmu {
struct sg_table *data_buffer_base;
u64 *data_buffer_base_iova;
u32 num_buffers;
u32 data_buffer_size;
};
/*
* struct ipa_wigig_conn_tx_in_params - information provided by
* wigig offload client for Tx pipe
* @pipe: parameters to connect Tx pipe (IPA to WIGIG)
* @dbuff: Tx data buffer info
* @int_gen_tx_bit_num: bit in int_gen_tx register associated with this client
* @client_mac: MAC address of client to be connected
*/
struct ipa_wigig_conn_tx_in_params {
struct ipa_wigig_pipe_setup_info pipe;
struct ipa_wigig_tx_pipe_data_buffer_info dbuff;
u8 int_gen_tx_bit_num;
u8 client_mac[IPA_MAC_ADDR_SIZE];
};
/*
* struct ipa_wigig_conn_tx_in_params_smmu - information provided by
* wigig offload client for Tx pipe
* @pipe_smmu: parameters to connect Tx pipe (IPA to WIGIG) smmu mode
* @dbuff_smmu: Tx data buffer info smmu mode
* @int_gen_tx_bit_num: bit in int_gen_tx register associated with this client
* @client_mac: MAC address of client to be connected
*/
struct ipa_wigig_conn_tx_in_params_smmu {
struct ipa_wigig_pipe_setup_info_smmu pipe_smmu;
struct ipa_wigig_tx_pipe_data_buffer_info_smmu dbuff_smmu;
u8 int_gen_tx_bit_num;
u8 client_mac[IPA_MAC_ADDR_SIZE];
};
#if IS_ENABLED(CONFIG_IPA3)
/*
* ipa_wigig_init - Client should call this function to
* init WIGIG IPA offload data path
*
* Note: Should not be called from atomic context
*
* @Return 0 on success, negative on failure
*/
int ipa_wigig_init(struct ipa_wigig_init_in_params *in,
struct ipa_wigig_init_out_params *out);
/*
* ipa_wigig_cleanup - Client should call this function to
* clean up WIGIG IPA offload data path
*
* @Return 0 on success, negative on failure
*/
int ipa_wigig_cleanup(void);
/*
* ipa_wigig_is_smmu_enabled - get smmu state
*
* @Return true if smmu is enabled, false if disabled
*/
bool ipa_wigig_is_smmu_enabled(void);
/*
* ipa_wigig_reg_intf - Client should call this function to
* register interface
*
* Note: Should not be called from atomic context
*
* @Return 0 on success, negative on failure
*/
int ipa_wigig_reg_intf(struct ipa_wigig_reg_intf_in_params *in);
/*
* ipa_wigig_dereg_intf - Client Driver should call this
* function to deregister before unload and after disconnect
*
* @Return 0 on success, negative on failure
*/
int ipa_wigig_dereg_intf(const char *netdev_name);
/*
* ipa_wigig_conn_rx_pipe - Client should call this
* function to connect the rx (UL) pipe
*
* @in: [in] input parameters from client
* @out: [out] output params to client
*
* Note: Non SMMU mode only, Should not be called from atomic context
*
* @Return 0 on success, negative on failure
*/
int ipa_wigig_conn_rx_pipe(struct ipa_wigig_conn_rx_in_params *in,
struct ipa_wigig_conn_out_params *out);
/*
* ipa_wigig_conn_rx_pipe_smmu - Client should call this
* function to connect the rx (UL) pipe
*
* @in: [in] input parameters from client
* @out: [out] output params to client
*
* Note: SMMU mode only, Should not be called from atomic context
*
* @Return 0 on success, negative on failure
*/
int ipa_wigig_conn_rx_pipe_smmu(struct ipa_wigig_conn_rx_in_params_smmu *in,
struct ipa_wigig_conn_out_params *out);
/*
* ipa_wigig_conn_client - Client should call this
* function to connect one of the tx (DL) pipes when a WIGIG client connects
*
* @in: [in] input parameters from client
* @out: [out] output params to client
*
* Note: Non SMMU mode only, Should not be called from atomic context
*
* @Return 0 on success, negative on failure
*/
int ipa_wigig_conn_client(struct ipa_wigig_conn_tx_in_params *in,
struct ipa_wigig_conn_out_params *out);
/*
* ipa_wigig_conn_client_smmu - Client should call this
* function to connect one of the tx (DL) pipes when a WIGIG client connects
*
* @in: [in] input parameters from client
* @out: [out] output params to client
*
* Note: SMMU mode only, Should not be called from atomic context
*
* @Return 0 on success, negative on failure
*/
int ipa_wigig_conn_client_smmu(struct ipa_wigig_conn_tx_in_params_smmu *in,
struct ipa_wigig_conn_out_params *out);
/*
* ipa_wigig_disconn_pipe() - Client should call this
* function to disconnect a pipe
*
* @client: [in] pipe to be disconnected
*
* Note: Should not be called from atomic context
*
* Returns: 0 on success, negative on failure
*/
int ipa_wigig_disconn_pipe(enum ipa_client_type client);
/*
* ipa_wigig_enable_pipe() - Client should call this
* function to enable IPA offload data path
*
* @client: [in] pipe to be enabled
* Note: Should not be called from atomic context
*
* Returns: 0 on success, negative on failure
*/
int ipa_wigig_enable_pipe(enum ipa_client_type client);
/*
* ipa_wigig_disable_pipe() - Client should call this
* function to disable IPA offload data path
*
* @client: [in] pipe to be disabled
* Note: Should not be called from atomic context
*
* Returns: 0 on success, negative on failure
*/
int ipa_wigig_disable_pipe(enum ipa_client_type client);
/*
* ipa_wigig_tx_dp() - transmit tx packet through IPA to 11ad HW
*
* @dst: [in] destination ipa client pipe to be used
* @skb: [in] skb to be transmitted
*
* Returns: 0 on success, negative on failure
*/
int ipa_wigig_tx_dp(enum ipa_client_type dst, struct sk_buff *skb);
/**
* ipa_wigig_set_perf_profile() - Client should call this function to
* set IPA clock bandwidth based on data rates
*
* @max_supported_bw_mbps: [in] maximum bandwidth needed (in Mbps)
*
* Returns: 0 on success, negative on failure
*/
int ipa_wigig_set_perf_profile(u32 max_supported_bw_mbps);
#else /* IS_ENABLED(CONFIG_IPA3) */
static inline int ipa_wigig_init(struct ipa_wigig_init_in_params *in,
struct ipa_wigig_init_out_params *out)
{
return -EPERM;
}
static inline int ipa_wigig_cleanup(void)
{
return -EPERM;
}
static inline bool ipa_wigig_is_smmu_enabled(void)
{
return -EPERM;
}
static inline int ipa_wigig_reg_intf(struct ipa_wigig_reg_intf_in_params *in)
{
return -EPERM;
}
static inline int ipa_wigig_dereg_intf(const char *netdev_name)
{
return -EPERM;
}
static inline int ipa_wigig_conn_rx_pipe(
struct ipa_wigig_conn_rx_in_params *in,
struct ipa_wigig_conn_out_params *out)
{
return -EPERM;
}
static inline int ipa_wigig_conn_rx_pipe_smmu(
struct ipa_wigig_conn_rx_in_params_smmu *in,
struct ipa_wigig_conn_out_params *out)
{
return -EPERM;
}
static inline int ipa_wigig_conn_client(
struct ipa_wigig_conn_tx_in_params *in,
struct ipa_wigig_conn_out_params *out)
{
return -EPERM;
}
static inline int ipa_wigig_conn_client_smmu(
struct ipa_wigig_conn_tx_in_params_smmu *in,
struct ipa_wigig_conn_out_params *out)
{
return -EPERM;
}
static inline int ipa_wigig_disconn_pipe(enum ipa_client_type client)
{
return -EPERM;
}
static inline int ipa_wigig_enable_pipe(enum ipa_client_type client)
{
return -EPERM;
}
static inline int ipa_wigig_disable_pipe(enum ipa_client_type client)
{
return -EPERM;
}
static inline int ipa_wigig_tx_dp(enum ipa_client_type dst,
struct sk_buff *skb)
{
return -EPERM;
}
static inline int ipa_wigig_set_perf_profile(u32 max_supported_bw_mbps)
{
return -EPERM;
}
#endif /* IS_ENABLED(CONFIG_IPA3) */
#endif /* _IPA_WIGIG_H_ */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
*/
#ifndef MSM_GSI_H
#define MSM_GSI_H
#include <linux/types.h>
#include <linux/interrupt.h>
enum gsi_chan_dir {
GSI_CHAN_DIR_FROM_GSI = 0x0,
GSI_CHAN_DIR_TO_GSI = 0x1
};
/**
* @GSI_USE_PREFETCH_BUFS: Channel will use normal prefetch buffers if possible
* @GSI_ESCAPE_BUF_ONLY: Channel will always use escape buffers only
* @GSI_SMART_PRE_FETCH: Channel will work in smart prefetch mode.
* relevant starting GSI 2.5
* @GSI_FREE_PRE_FETCH: Channel will work in free prefetch mode.
* relevant starting GSI 2.5
*/
enum gsi_prefetch_mode {
GSI_USE_PREFETCH_BUFS = 0x0,
GSI_ESCAPE_BUF_ONLY = 0x1,
GSI_SMART_PRE_FETCH = 0x2,
GSI_FREE_PRE_FETCH = 0x3,
};
#endif

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2013-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _RMNET_IPA_FD_IOCTL_H
#define _RMNET_IPA_FD_IOCTL_H
#include <linux/ioctl.h>
#include <linux/ipa_qmi_service_v01.h>
#include <linux/msm_ipa.h>
/**
* unique magic number of the IPA_WAN device
*/
#define WAN_IOC_MAGIC 0x69
#define WAN_IOCTL_ADD_FLT_RULE 0
#define WAN_IOCTL_ADD_FLT_INDEX 1
#define WAN_IOCTL_VOTE_FOR_BW_MBPS 2
#define WAN_IOCTL_POLL_TETHERING_STATS 3
#define WAN_IOCTL_SET_DATA_QUOTA 4
#define WAN_IOCTL_SET_TETHER_CLIENT_PIPE 5
#define WAN_IOCTL_QUERY_TETHER_STATS 6
#define WAN_IOCTL_RESET_TETHER_STATS 7
#define WAN_IOCTL_QUERY_DL_FILTER_STATS 8
#define WAN_IOCTL_ADD_FLT_RULE_EX 9
#define WAN_IOCTL_QUERY_TETHER_STATS_ALL 10
#define WAN_IOCTL_NOTIFY_WAN_STATE 11
#define WAN_IOCTL_ADD_UL_FLT_RULE 12
#define WAN_IOCTL_ENABLE_PER_CLIENT_STATS 13
#define WAN_IOCTL_QUERY_PER_CLIENT_STATS 14
#define WAN_IOCTL_SET_LAN_CLIENT_INFO 15
#define WAN_IOCTL_CLEAR_LAN_CLIENT_INFO 16
#define WAN_IOCTL_SEND_LAN_CLIENT_MSG 17
#define WAN_IOCTL_ADD_OFFLOAD_CONNECTION 18
#define WAN_IOCTL_RMV_OFFLOAD_CONNECTION 19
#define WAN_IOCTL_GET_WAN_MTU 20
#define WAN_IOCTL_SET_DATA_QUOTA_WARNING 21
#define WAN_IOCTL_NOTIFY_NAT_MOVE_RES 22
/* User space may not have this defined. */
#ifndef IFNAMSIZ
#define IFNAMSIZ 16
#endif
/**
* struct wan_ioctl_poll_tethering_stats - structure used for
* WAN_IOCTL_POLL_TETHERING_STATS IOCTL.
*
* @polling_interval_secs: Polling interval in seconds.
* @reset_stats: Indicate whether to reset the stats (use 1) or not.
*
* The structure to be used by the user space in order to request for the
* tethering stats to be polled. Setting the interval to 0 indicates to stop
* the polling process.
*/
struct wan_ioctl_poll_tethering_stats {
uint64_t polling_interval_secs;
uint8_t reset_stats;
};
/**
* struct wan_ioctl_set_data_quota - structure used for
* WAN_IOCTL_SET_DATA_QUOTA IOCTL.
*
* @interface_name: Name of the interface on which to set the quota.
* @quota_mbytes: Quota (in Mbytes) for the above interface.
* @set_quota: Indicate whether to set the quota (use 1) or
* unset the quota.
*
* The structure to be used by the user space in order to request
* a quota to be set on a specific interface (by specifying its name).
*/
struct wan_ioctl_set_data_quota {
char interface_name[IFNAMSIZ];
uint64_t quota_mbytes;
uint8_t set_quota;
};
/**
* struct wan_ioctl_set_data_quota_warning - structure used for
* WAN_IOCTL_SET_DATA_QUOTA_WARNING IOCTL.
*
* @interface_name: Name of the interface on which to set the quota or
* warning.
* @quota_mbytes: Quota (in Mbytes) for the above interface.
* @set_quota: Indicate whether to set the quota/warning (use 1) or
* unset the quota/warning.
* @set_warning: Indicate whether to set the quota/warning (use 1) or
* unset the quota/warning.
* @warning_mbytes: Warning (in Mbytes) for the above interface.
* @set_warning: Indicate whether to set the warning (use 1) or
* unset the warning.
*
* The structure to be used by the user space in order to request
* a quota to be set on a specific interface (by specifying its name).
*/
struct wan_ioctl_set_data_quota_warning {
char interface_name[IFNAMSIZ];
uint64_t quota_mbytes;
uint8_t set_quota;
uint8_t set_warning;
uint16_t padding2;
uint64_t warning_mbytes;
};
struct wan_ioctl_set_tether_client_pipe {
/* enum of tether interface */
enum ipacm_client_enum ipa_client;
uint8_t reset_client;
uint32_t ul_src_pipe_len;
uint32_t ul_src_pipe_list[QMI_IPA_MAX_PIPES_V01];
uint32_t dl_dst_pipe_len;
uint32_t dl_dst_pipe_list[QMI_IPA_MAX_PIPES_V01];
};
struct wan_ioctl_query_tether_stats {
/* Name of the upstream interface */
char upstreamIface[IFNAMSIZ];
/* Name of the tethered interface */
char tetherIface[IFNAMSIZ];
/* enum of tether interface */
enum ipacm_client_enum ipa_client;
uint64_t ipv4_tx_packets;
uint64_t ipv4_tx_bytes;
uint64_t ipv4_rx_packets;
uint64_t ipv4_rx_bytes;
uint64_t ipv6_tx_packets;
uint64_t ipv6_tx_bytes;
uint64_t ipv6_rx_packets;
uint64_t ipv6_rx_bytes;
};
struct wan_ioctl_query_tether_stats_all {
/* Name of the upstream interface */
char upstreamIface[IFNAMSIZ];
/* enum of tether interface */
enum ipacm_client_enum ipa_client;
uint8_t reset_stats;
uint64_t tx_bytes;
uint64_t rx_bytes;
};
struct wan_ioctl_reset_tether_stats {
/* Name of the upstream interface, not support now */
char upstreamIface[IFNAMSIZ];
/* Indicate whether to reset the stats (use 1) or not */
uint8_t reset_stats;
};
struct wan_ioctl_query_dl_filter_stats {
/* Indicate whether to reset the filter stats (use 1) or not*/
uint8_t reset_stats;
/* Modem response QMI */
struct ipa_get_data_stats_resp_msg_v01 stats_resp;
/* provide right index to 1st firewall rule */
uint32_t index;
};
struct wan_ioctl_notify_wan_state {
uint8_t up;
/* Name of the upstream interface */
char upstreamIface[IFNAMSIZ];
#define WAN_IOCTL_NOTIFY_WAN_INTF_NAME WAN_IOCTL_NOTIFY_WAN_INTF_NAME
};
struct wan_ioctl_send_lan_client_msg {
/* Lan client info. */
struct ipa_lan_client_msg lan_client;
/* Event to indicate whether client is
* connected or disconnected.
*/
enum ipa_per_client_stats_event client_event;
};
struct wan_ioctl_lan_client_info {
/* Device type of the client. */
enum ipacm_per_client_device_type device_type;
/* MAC Address of the client. */
uint8_t mac[IPA_MAC_ADDR_SIZE];
/* Init client. */
uint8_t client_init;
/* Client Index */
int8_t client_idx;
/* Header length of the client. */
uint8_t hdr_len;
/* Source pipe of the lan client. */
enum ipa_client_type ul_src_pipe;
/* Counter indices for h/w fnr stats */
#define IPA_HW_FNR_STATS
uint8_t ul_cnt_idx;
uint8_t dl_cnt_idx;
};
struct wan_ioctl_per_client_info {
/* MAC Address of the client. */
uint8_t mac[IPA_MAC_ADDR_SIZE];
/* Ipv4 UL traffic bytes. */
uint64_t ipv4_tx_bytes;
/* Ipv4 DL traffic bytes. */
uint64_t ipv4_rx_bytes;
/* Ipv6 UL traffic bytes. */
uint64_t ipv6_tx_bytes;
/* Ipv6 DL traffic bytes. */
uint64_t ipv6_rx_bytes;
};
struct wan_ioctl_query_per_client_stats {
/* Device type of the client. */
enum ipacm_per_client_device_type device_type;
/* Indicate whether to reset the stats (use 1) or not */
uint8_t reset_stats;
/* Indicates whether client is disconnected. */
uint8_t disconnect_clnt;
/* Number of clients. */
uint8_t num_clients;
/* Client information. */
struct wan_ioctl_per_client_info
client_info[IPA_MAX_NUM_HW_PATH_CLIENTS];
};
#define WAN_IOC_ADD_FLT_RULE _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_ADD_FLT_RULE, \
struct ipa_install_fltr_rule_req_msg_v01 *)
#define WAN_IOC_ADD_FLT_RULE_INDEX _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_ADD_FLT_INDEX, \
struct ipa_fltr_installed_notif_req_msg_v01 *)
#define WAN_IOC_VOTE_FOR_BW_MBPS _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_VOTE_FOR_BW_MBPS, \
uint32_t *)
#define WAN_IOC_POLL_TETHERING_STATS _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_POLL_TETHERING_STATS, \
struct wan_ioctl_poll_tethering_stats *)
#define WAN_IOC_SET_DATA_QUOTA _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_SET_DATA_QUOTA, \
struct wan_ioctl_set_data_quota *)
#define WAN_IOC_SET_TETHER_CLIENT_PIPE _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_SET_TETHER_CLIENT_PIPE, \
struct wan_ioctl_set_tether_client_pipe *)
#define WAN_IOC_QUERY_TETHER_STATS _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_QUERY_TETHER_STATS, \
struct wan_ioctl_query_tether_stats *)
#define WAN_IOC_RESET_TETHER_STATS _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_RESET_TETHER_STATS, \
struct wan_ioctl_reset_tether_stats *)
#define WAN_IOC_QUERY_DL_FILTER_STATS _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_QUERY_DL_FILTER_STATS, \
struct wan_ioctl_query_dl_filter_stats *)
#define WAN_IOC_ADD_FLT_RULE_EX _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_ADD_FLT_RULE_EX, \
struct ipa_install_fltr_rule_req_ex_msg_v01 *)
#define WAN_IOC_QUERY_TETHER_STATS_ALL _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_QUERY_TETHER_STATS_ALL, \
struct wan_ioctl_query_tether_stats_all *)
#define WAN_IOC_NOTIFY_WAN_STATE _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_NOTIFY_WAN_STATE, \
struct wan_ioctl_notify_wan_state *)
#define WAN_IOC_ADD_UL_FLT_RULE _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_ADD_UL_FLT_RULE, \
struct ipa_configure_ul_firewall_rules_req_msg_v01 *)
#define WAN_IOC_ENABLE_PER_CLIENT_STATS _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_ENABLE_PER_CLIENT_STATS, \
bool *)
#define WAN_IOC_QUERY_PER_CLIENT_STATS _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_QUERY_PER_CLIENT_STATS, \
struct wan_ioctl_query_per_client_stats *)
#define WAN_IOC_SET_LAN_CLIENT_INFO _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_SET_LAN_CLIENT_INFO, \
struct wan_ioctl_lan_client_info *)
#define WAN_IOC_SEND_LAN_CLIENT_MSG _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_SEND_LAN_CLIENT_MSG, \
struct wan_ioctl_send_lan_client_msg *)
#define WAN_IOC_CLEAR_LAN_CLIENT_INFO _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_CLEAR_LAN_CLIENT_INFO, \
struct wan_ioctl_lan_client_info *)
#define WAN_IOC_ADD_OFFLOAD_CONNECTION _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_ADD_OFFLOAD_CONNECTION, \
struct ipa_add_offload_connection_req_msg_v01 *)
#define WAN_IOC_RMV_OFFLOAD_CONNECTION _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_RMV_OFFLOAD_CONNECTION, \
struct ipa_remove_offload_connection_req_msg_v01 *)
#define WAN_IOC_GET_WAN_MTU _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_GET_WAN_MTU, \
struct ipa_mtu_info *)
#define WAN_IOC_SET_DATA_QUOTA_WARNING _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_SET_DATA_QUOTA_WARNING, \
struct wan_ioctl_set_data_quota_warning)
#define WAN_IOC_NOTIFY_NAT_MOVE_RES _IOWR(WAN_IOC_MAGIC, \
WAN_IOCTL_NOTIFY_NAT_MOVE_RES, \
bool)
#endif /* _RMNET_IPA_FD_IOCTL_H */

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# SPDX-License-Identifier: GPL-2.0-only
ipam-y += \
ipa_rm.o ipa_rm_dependency_graph.o ipa_rm_peers_list.o ipa_rm_resource.o ipa_rm_inactivity_timer.o \
ipa_v3/ipa.o \
ipa_v3/ipa_debugfs.o \
ipa_v3/ipa_hdr.o \
ipa_v3/ipa_flt.o \
ipa_v3/ipa_rt.o \
ipa_v3/ipa_dp.o \
ipa_v3/ipa_client.o \
ipa_v3/ipa_utils.o \
ipa_v3/ipa_nat.o \
ipa_v3/ipa_intf.o \
ipa_v3/teth_bridge.o \
ipa_v3/ipa_interrupts.o \
ipa_v3/ipa_uc.o \
ipa_v3/ipa_uc_wdi.o \
ipa_v3/ipa_dma.o \
ipa_v3/ipa_uc_mhi.o \
ipa_v3/ipa_mhi.o \
ipa_v3/ipa_uc_ntn.o \
ipa_v3/ipa_hw_stats.o \
ipa_v3/ipa_pm.o \
ipa_v3/ipa_wdi3_i.o \
ipa_v3/ipa_odl.o \
ipa_v3/ipa_wigig_i.o \
ipa_v3/ipa_qdss.o \
ipa_v3/ipa_uc_holb_monitor.o \
ipa_v3/ipahal/ipahal.o \
ipa_v3/ipahal/ipahal_reg.o \
ipa_v3/ipahal/ipahal_fltrt.o \
ipa_v3/ipahal/ipahal_hw_stats.o \
ipa_v3/ipahal/ipahal_nat.o \
ipa_v3/ipa_eth_i.o \
ipa_v3/ipa_stats.o
ipam-$(CONFIG_IPA_TSP) += ipa_v3/ipa_tsp.o \
ipa_v3/ipahal/ipahal_tsp.o
ipam-$(CONFIG_RMNET_IPA3) += ipa_v3/rmnet_ipa.o ipa_v3/ipa_qmi_service_v01.o \
ipa_v3/ipa_qmi_service.o ipa_v3/rmnet_ctl_ipa.o \
ipa_v3/rmnet_ipa_fd_ioctl.o ipa_v3/rmnet_ll_ipa.o
ipam-$(CONFIG_IPA_CLIENTS_MANAGER) += ipa_clients/ipa_usb.o \
ipa_clients/ipa_wdi3.o \
ipa_clients/ipa_gsb.o \
ipa_clients/ipa_uc_offload.o \
ipa_clients/ipa_wigig.o \
ipa_clients/ipa_mhi_client.o \
ipa_clients/ipa_eth.o
ipam-$(CONFIG_RNDIS_IPA) += ipa_clients/rndis_ipa.o
ipam-$(CONFIG_IPA3_MHI_PRIME_MANAGER) += ipa_v3/ipa_mpm.o
ipam-$(CONFIG_IPA3_MHI_PROXY) += ipa_v3/ipa_mhi_proxy.o
ipam-$(CONFIG_IPA_EMULATION) += ipa_v3/ipa_dt_replacement.o
ifneq (,$(filter $(CONFIG_IPA3_REGDUMP_IPA_4_5),y m))
ipam-$(CONFIG_IPA3_REGDUMP) += ipa_v3/dump/ipa4.5/ipa_reg_dump.o
endif
ifneq (,$(filter $(CONFIG_IPA3_REGDUMP_IPA_5_0),y m))
ipam-$(CONFIG_IPA3_REGDUMP) += ipa_v3/dump/ipa5.0/ipa_reg_dump.o
endif
ifneq (,$(filter $(CONFIG_IPA3_REGDUMP_IPA_5_5),y m))
ipam-$(CONFIG_IPA3_REGDUMP) += ipa_v3/dump/ipa5.5/ipa_reg_dump.o
endif
ipam-$(CONFIG_IPA_UT) += test/ipa_ut_framework.o test/ipa_test_example.o \
test/ipa_test_mhi.o test/ipa_test_dma.o \
test/ipa_test_hw_stats.o test/ipa_pm_ut.o \
test/ipa_test_wdi3.o test/ipa_test_ntn.o
ipatestm-$(CONFIG_IPA_KERNEL_TESTS_MODULE) += \
ipa_test_module/ipa_test_module_impl.o \
ipa_test_module/ipa_rm_ut.o
ipanetm-y += ipa_v3/ipa_net.o
obj-$(CONFIG_IPA3) += ipam.o
obj-$(CONFIG_IPA3) += ipanetm.o
obj-$(CONFIG_IPA_KERNEL_TESTS_MODULE) += ipatestm.o
obj-y += ipa_v3/ ipa_clients/

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# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_ECM_IPA) += ecmipam.o
ecmipam-objs := ecm_ipa.o

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2013-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _ECM_IPA_H_
#define _ECM_IPA_H_
#include "ipa.h"
/*
* @priv: private data given upon ipa_connect
* @evt: event enum, should be IPA_WRITE_DONE
* @data: for tx path the data field is the sent socket buffer.
*/
typedef void (*ecm_ipa_callback)(void *priv,
enum ipa_dp_evt_type evt,
unsigned long data);
/*
* struct ecm_ipa_params - parameters for ecm_ipa initialization API
*
* @device_ready_notify: callback supplied by USB core driver.
* This callback shall be called by the Netdev once the device
* is ready to receive data from tethered PC.
* @ecm_ipa_rx_dp_notify: ecm_ipa will set this callback (out parameter).
* this callback shall be supplied for ipa_connect upon pipe
* connection (USB->IPA), once IPA driver receive data packets
* from USB pipe destined for Apps this callback will be called.
* @ecm_ipa_tx_dp_notify: ecm_ipa will set this callback (out parameter).
* this callback shall be supplied for ipa_connect upon pipe
* connection (IPA->USB), once IPA driver send packets destined
* for USB, IPA BAM will notify for Tx-complete.
* @priv: ecm_ipa will set this pointer (out parameter).
* This pointer will hold the network device for later interaction
* with ecm_ipa APIs
* @host_ethaddr: host Ethernet address in network order
* @device_ethaddr: device Ethernet address in network order
* @skip_ep_cfg: boolean field that determines if Apps-processor
* should or should not configure this end-point.
*/
struct ecm_ipa_params {
void (*device_ready_notify)(void);
ecm_ipa_callback ecm_ipa_rx_dp_notify;
ecm_ipa_callback ecm_ipa_tx_dp_notify;
u8 host_ethaddr[ETH_ALEN];
u8 device_ethaddr[ETH_ALEN];
void *private;
bool skip_ep_cfg;
};
#if IS_ENABLED(CONFIG_ECM_IPA)
int ecm_ipa_init(struct ecm_ipa_params *params);
int ecm_ipa_connect(u32 usb_to_ipa_hdl, u32 ipa_to_usb_hdl,
void *priv);
int ecm_ipa_disconnect(void *priv);
void ecm_ipa_cleanup(void *priv);
#else /* IS_ENABLED(CONFIG_ECM_IPA) */
static inline int ecm_ipa_init(struct ecm_ipa_params *params)
{
return 0;
}
static inline int ecm_ipa_connect(u32 usb_to_ipa_hdl, u32 ipa_to_usb_hdl,
void *priv)
{
return 0;
}
static inline int ecm_ipa_disconnect(void *priv)
{
return 0;
}
static inline void ecm_ipa_cleanup(void *priv)
{
}
#endif /* IS_ENABLED(CONFIG_ECM_IPA) */
#endif /* _ECM_IPA_H_ */

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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
*/
#include "ipa_uc_offload.h"
#include <linux/msm_ipa.h>
#include <linux/if_vlan.h>
#include "ipa_common_i.h"
#include "ipa_pm.h"
#define IPA_NTN_DMA_POOL_ALIGNMENT 8
#define OFFLOAD_DRV_NAME "ipa_uc_offload"
#define IPA_UC_OFFLOAD_DBG(fmt, args...) \
do { \
pr_debug(OFFLOAD_DRV_NAME " %s:%d " fmt, \
__func__, __LINE__, ## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf(), \
OFFLOAD_DRV_NAME " %s:%d " fmt, ## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf_low(), \
OFFLOAD_DRV_NAME " %s:%d " fmt, ## args); \
} while (0)
#define IPA_UC_OFFLOAD_LOW(fmt, args...) \
do { \
pr_debug(OFFLOAD_DRV_NAME " %s:%d " fmt, \
__func__, __LINE__, ## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf_low(), \
OFFLOAD_DRV_NAME " %s:%d " fmt, ## args); \
} while (0)
#define IPA_UC_OFFLOAD_ERR(fmt, args...) \
do { \
pr_err(OFFLOAD_DRV_NAME " %s:%d " fmt, \
__func__, __LINE__, ## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf(), \
OFFLOAD_DRV_NAME " %s:%d " fmt, ## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf_low(), \
OFFLOAD_DRV_NAME " %s:%d " fmt, ## args); \
} while (0)
#define IPA_UC_OFFLOAD_INFO(fmt, args...) \
do { \
pr_info(OFFLOAD_DRV_NAME " %s:%d " fmt, \
__func__, __LINE__, ## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf(), \
OFFLOAD_DRV_NAME " %s:%d " fmt, ## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf_low(), \
OFFLOAD_DRV_NAME " %s:%d " fmt, ## args); \
} while (0)
enum ipa_uc_offload_state {
IPA_UC_OFFLOAD_STATE_INVALID,
IPA_UC_OFFLOAD_STATE_INITIALIZED,
IPA_UC_OFFLOAD_STATE_UP,
};
struct ipa_uc_offload_ctx {
enum ipa_uc_offload_proto proto;
enum ipa_uc_offload_state state;
void *priv;
u8 hdr_len;
u32 partial_hdr_hdl[IPA_IP_MAX];
char netdev_name[IPA_RESOURCE_NAME_MAX];
ipa_notify_cb notify;
struct completion ntn_completion;
u32 pm_hdl;
struct ipa_ntn_conn_in_params conn;
};
static struct ipa_uc_offload_ctx *ipa_uc_offload_ctx[IPA_UC_MAX_PROT_SIZE];
static int ipa_commit_partial_hdr(
struct ipa_ioc_add_hdr *hdr,
const char *netdev_name,
struct ipa_hdr_info *hdr_info)
{
int i;
if (hdr == NULL || hdr_info == NULL) {
IPA_UC_OFFLOAD_ERR("Invalid input\n");
return -EINVAL;
}
hdr->commit = 0;
hdr->num_hdrs = 2;
snprintf(hdr->hdr[0].name, sizeof(hdr->hdr[0].name),
"%s_ipv4", netdev_name);
snprintf(hdr->hdr[1].name, sizeof(hdr->hdr[1].name),
"%s_ipv6", netdev_name);
for (i = IPA_IP_v4; i < IPA_IP_MAX; i++) {
hdr->hdr[i].hdr_len = hdr_info[i].hdr_len;
memcpy(hdr->hdr[i].hdr, hdr_info[i].hdr, hdr->hdr[i].hdr_len);
hdr->hdr[i].type = hdr_info[i].hdr_type;
hdr->hdr[i].is_partial = 1;
hdr->hdr[i].is_eth2_ofst_valid = 1;
hdr->hdr[i].eth2_ofst = hdr_info[i].dst_mac_addr_offset;
}
if (ipa_add_hdr(hdr)) {
IPA_UC_OFFLOAD_ERR("fail to add partial headers\n");
return -EFAULT;
}
return 0;
}
static void ipa_uc_offload_ntn_pm_cb(void *p, enum ipa_pm_cb_event event)
{
/* suspend/resume is not supported */
IPA_UC_OFFLOAD_DBG("event = %d\n", event);
}
static int ipa_uc_offload_ntn_register_pm_client(
struct ipa_uc_offload_ctx *ntn_ctx)
{
int res;
struct ipa_pm_register_params params;
memset(&params, 0, sizeof(params));
if (ntn_ctx->proto == IPA_UC_NTN_V2X)
params.name = "ETH_v2x";
else
params.name = "ETH";
params.callback = ipa_uc_offload_ntn_pm_cb;
params.user_data = ntn_ctx;
params.group = IPA_PM_GROUP_DEFAULT;
res = ipa_pm_register(&params, &ntn_ctx->pm_hdl);
if (res) {
IPA_UC_OFFLOAD_ERR("fail to register with PM %d\n", res);
return res;
}
if (ntn_ctx->proto == IPA_UC_NTN_V2X)
res = ipa_pm_associate_ipa_cons_to_client(ntn_ctx->pm_hdl,
IPA_CLIENT_ETHERNET2_CONS);
else
res = ipa_pm_associate_ipa_cons_to_client(ntn_ctx->pm_hdl,
IPA_CLIENT_ETHERNET_CONS);
if (res) {
IPA_UC_OFFLOAD_ERR("fail to associate. PM (%d) Prot: %d\n",
res, ntn_ctx->proto);
ipa_pm_deregister(ntn_ctx->pm_hdl);
ntn_ctx->pm_hdl = ~0;
return res;
}
return 0;
}
static void ipa_uc_offload_ntn_deregister_pm_client(
struct ipa_uc_offload_ctx *ntn_ctx)
{
ipa_pm_deactivate_sync(ntn_ctx->pm_hdl);
ipa_pm_deregister(ntn_ctx->pm_hdl);
}
static int ipa_uc_offload_ntn_reg_intf(
struct ipa_uc_offload_intf_params *inp,
struct ipa_uc_offload_out_params *outp,
struct ipa_uc_offload_ctx *ntn_ctx)
{
struct ipa_ioc_add_hdr *hdr = NULL;
struct ipa_tx_intf tx;
struct ipa_rx_intf rx;
struct ipa_ioc_tx_intf_prop tx_prop[2];
struct ipa_ioc_rx_intf_prop rx_prop[2];
int ret = 0;
u32 len;
bool is_vlan_mode;
IPA_UC_OFFLOAD_DBG("register interface for netdev %s\n",
inp->netdev_name);
ret = ipa_uc_offload_ntn_register_pm_client(ntn_ctx);
if (ret) {
IPA_UC_OFFLOAD_ERR("fail to register PM client\n");
return -EFAULT;
}
memcpy(ntn_ctx->netdev_name, inp->netdev_name, IPA_RESOURCE_NAME_MAX);
ntn_ctx->hdr_len = inp->hdr_info[0].hdr_len;
ntn_ctx->notify = inp->notify;
ntn_ctx->priv = inp->priv;
/* add partial header */
len = sizeof(struct ipa_ioc_add_hdr) + 2 * sizeof(struct ipa_hdr_add);
hdr = kzalloc(len, GFP_KERNEL);
if (hdr == NULL) {
ret = -ENOMEM;
goto fail_alloc;
}
ret = ipa_is_vlan_mode(IPA_VLAN_IF_ETH, &is_vlan_mode);
if (ret) {
IPA_UC_OFFLOAD_ERR("get vlan mode failed\n");
goto fail;
}
if (is_vlan_mode) {
if ((inp->hdr_info[0].hdr_type != IPA_HDR_L2_802_1Q) ||
(inp->hdr_info[1].hdr_type != IPA_HDR_L2_802_1Q)) {
IPA_UC_OFFLOAD_ERR(
"hdr_type mismatch in vlan mode\n");
WARN_ON_RATELIMIT_IPA(1);
ret = -EFAULT;
goto fail;
}
IPA_UC_OFFLOAD_DBG("vlan HEADER type compatible\n");
if ((inp->hdr_info[0].hdr_len <
(ETH_HLEN + VLAN_HLEN)) ||
(inp->hdr_info[1].hdr_len <
(ETH_HLEN + VLAN_HLEN))) {
IPA_UC_OFFLOAD_ERR(
"hdr_len shorter than vlan len (%u) (%u)\n"
, inp->hdr_info[0].hdr_len
, inp->hdr_info[1].hdr_len);
WARN_ON_RATELIMIT_IPA(1);
ret = -EFAULT;
goto fail;
}
IPA_UC_OFFLOAD_DBG("vlan HEADER len compatible (%u) (%u)\n",
inp->hdr_info[0].hdr_len,
inp->hdr_info[1].hdr_len);
}
if (ipa_commit_partial_hdr(hdr, ntn_ctx->netdev_name, inp->hdr_info)) {
IPA_UC_OFFLOAD_ERR("fail to commit partial headers\n");
ret = -EFAULT;
goto fail;
}
/* populate tx prop */
tx.num_props = 2;
tx.prop = tx_prop;
memset(tx_prop, 0, sizeof(tx_prop));
tx_prop[0].ip = IPA_IP_v4;
tx_prop[0].dst_pipe = IPA_CLIENT_ETHERNET_CONS;
tx_prop[0].hdr_l2_type = inp->hdr_info[0].hdr_type;
memcpy(tx_prop[0].hdr_name, hdr->hdr[IPA_IP_v4].name,
sizeof(tx_prop[0].hdr_name));
tx_prop[1].ip = IPA_IP_v6;
tx_prop[1].dst_pipe = IPA_CLIENT_ETHERNET_CONS;
tx_prop[1].hdr_l2_type = inp->hdr_info[1].hdr_type;
memcpy(tx_prop[1].hdr_name, hdr->hdr[IPA_IP_v6].name,
sizeof(tx_prop[1].hdr_name));
/* populate rx prop */
rx.num_props = 2;
rx.prop = rx_prop;
memset(rx_prop, 0, sizeof(rx_prop));
rx_prop[0].ip = IPA_IP_v4;
rx_prop[0].src_pipe = IPA_CLIENT_ETHERNET_PROD;
rx_prop[0].hdr_l2_type = inp->hdr_info[0].hdr_type;
if (inp->is_meta_data_valid) {
rx_prop[0].attrib.attrib_mask |= IPA_FLT_META_DATA;
rx_prop[0].attrib.meta_data = inp->meta_data;
rx_prop[0].attrib.meta_data_mask = inp->meta_data_mask;
}
rx_prop[1].ip = IPA_IP_v6;
rx_prop[1].src_pipe = IPA_CLIENT_ETHERNET_PROD;
rx_prop[1].hdr_l2_type = inp->hdr_info[1].hdr_type;
if (inp->is_meta_data_valid) {
rx_prop[1].attrib.attrib_mask |= IPA_FLT_META_DATA;
rx_prop[1].attrib.meta_data = inp->meta_data;
rx_prop[1].attrib.meta_data_mask = inp->meta_data_mask;
}
if (ipa_register_intf(inp->netdev_name, &tx, &rx)) {
IPA_UC_OFFLOAD_ERR("fail to add interface prop\n");
memset(ntn_ctx, 0, sizeof(*ntn_ctx));
ret = -EFAULT;
goto fail;
}
ntn_ctx->partial_hdr_hdl[IPA_IP_v4] = hdr->hdr[IPA_IP_v4].hdr_hdl;
ntn_ctx->partial_hdr_hdl[IPA_IP_v6] = hdr->hdr[IPA_IP_v6].hdr_hdl;
init_completion(&ntn_ctx->ntn_completion);
ntn_ctx->state = IPA_UC_OFFLOAD_STATE_INITIALIZED;
kfree(hdr);
return ret;
fail:
kfree(hdr);
fail_alloc:
ipa_uc_offload_ntn_deregister_pm_client(ntn_ctx);
return ret;
}
int ipa_uc_offload_reg_intf(
struct ipa_uc_offload_intf_params *inp,
struct ipa_uc_offload_out_params *outp)
{
struct ipa_uc_offload_ctx *ctx;
int ret = 0;
if (inp == NULL || outp == NULL) {
IPA_UC_OFFLOAD_ERR("invalid params in=%pK out=%pK\n",
inp, outp);
return -EINVAL;
}
if (inp->proto <= IPA_UC_INVALID ||
inp->proto >= IPA_UC_MAX_PROT_SIZE) {
IPA_UC_OFFLOAD_ERR("invalid proto %d\n", inp->proto);
return -EINVAL;
}
if (!ipa_uc_offload_ctx[inp->proto]) {
ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
if (ctx == NULL) {
IPA_UC_OFFLOAD_ERR("fail to alloc uc offload ctx\n");
return -EFAULT;
}
ipa_uc_offload_ctx[inp->proto] = ctx;
ctx->proto = inp->proto;
} else
ctx = ipa_uc_offload_ctx[inp->proto];
if (ctx->state != IPA_UC_OFFLOAD_STATE_INVALID) {
IPA_UC_OFFLOAD_ERR("Already Initialized\n");
return -EINVAL;
}
/* only register IPA properties for uc_ntn */
if (ctx->proto == IPA_UC_NTN) {
ret = ipa_uc_offload_ntn_reg_intf(inp, outp, ctx);
if (!ret)
outp->clnt_hndl = IPA_UC_NTN;
}
/* only register IPA-pm for uc_ntn_v2x */
if (ctx->proto == IPA_UC_NTN_V2X) {
/* always in vlan mode */
IPA_UC_OFFLOAD_INFO("v2x hdr_len %d\n",
inp->hdr_info[0].hdr_len);
ctx->hdr_len = inp->hdr_info[0].hdr_len;
ret = ipa_uc_offload_ntn_register_pm_client(ctx);
if (!ret)
outp->clnt_hndl = IPA_UC_NTN_V2X;
else
IPA_UC_OFFLOAD_ERR("fail to create pm resource\n");
/* set to initialized state */
ctx->state = IPA_UC_OFFLOAD_STATE_INITIALIZED;
}
return ret;
}
EXPORT_SYMBOL(ipa_uc_offload_reg_intf);
static int ipa_uc_ntn_alloc_conn_smmu_info(struct ipa_ntn_setup_info *dest,
struct ipa_ntn_setup_info *source)
{
int result;
IPA_UC_OFFLOAD_DBG("Allocating smmu info\n");
memcpy(dest, source, sizeof(struct ipa_ntn_setup_info));
dest->data_buff_list =
kcalloc(dest->num_buffers, sizeof(struct ntn_buff_smmu_map),
GFP_KERNEL);
if (dest->data_buff_list == NULL) {
IPA_UC_OFFLOAD_ERR("failed to alloc smmu info\n");
return -ENOMEM;
}
memcpy(dest->data_buff_list, source->data_buff_list,
sizeof(struct ntn_buff_smmu_map) * dest->num_buffers);
result = ipa_smmu_store_sgt(&dest->buff_pool_base_sgt,
source->buff_pool_base_sgt);
if (result) {
kfree(dest->data_buff_list);
dest->data_buff_list = NULL;
return result;
}
result = ipa_smmu_store_sgt(&dest->ring_base_sgt,
source->ring_base_sgt);
if (result) {
kfree(dest->data_buff_list);
dest->data_buff_list = NULL;
ipa_smmu_free_sgt(&dest->buff_pool_base_sgt);
return result;
}
return 0;
}
static void ipa_uc_ntn_free_conn_smmu_info(struct ipa_ntn_setup_info *params)
{
kfree(params->data_buff_list);
params->data_buff_list = NULL;
ipa_smmu_free_sgt(&params->buff_pool_base_sgt);
ipa_smmu_free_sgt(&params->ring_base_sgt);
}
int ipa_uc_ntn_conn_pipes(struct ipa_ntn_conn_in_params *inp,
struct ipa_ntn_conn_out_params *outp,
struct ipa_uc_offload_ctx *ntn_ctx)
{
int result = 0;
enum ipa_uc_offload_state prev_state;
if (ntn_ctx->conn.dl.smmu_enabled != ntn_ctx->conn.ul.smmu_enabled) {
IPA_UC_OFFLOAD_ERR("ul and dl smmu enablement do not match\n");
return -EINVAL;
}
prev_state = ntn_ctx->state;
if (inp->dl.ring_base_pa % IPA_NTN_DMA_POOL_ALIGNMENT ||
inp->dl.buff_pool_base_pa % IPA_NTN_DMA_POOL_ALIGNMENT) {
IPA_UC_OFFLOAD_ERR("alignment failure on TX\n");
return -EINVAL;
}
if (inp->ul.ring_base_pa % IPA_NTN_DMA_POOL_ALIGNMENT ||
inp->ul.buff_pool_base_pa % IPA_NTN_DMA_POOL_ALIGNMENT) {
IPA_UC_OFFLOAD_ERR("alignment failure on RX\n");
return -EINVAL;
}
result = ipa_pm_activate_sync(ntn_ctx->pm_hdl);
if (result) {
IPA_UC_OFFLOAD_ERR("fail to activate: %d\n", result);
return result;
}
ntn_ctx->state = IPA_UC_OFFLOAD_STATE_UP;
result = ipa3_setup_uc_ntn_pipes(inp, ntn_ctx->notify,
ntn_ctx->priv, ntn_ctx->hdr_len, outp);
if (result) {
IPA_UC_OFFLOAD_ERR("fail to setup uc offload pipes: %d\n",
result);
ntn_ctx->state = prev_state;
result = -EFAULT;
goto fail;
}
if (ntn_ctx->conn.dl.smmu_enabled) {
result = ipa_uc_ntn_alloc_conn_smmu_info(&ntn_ctx->conn.dl,
&inp->dl);
if (result) {
IPA_UC_OFFLOAD_ERR("alloc failure on TX\n");
goto fail;
}
result = ipa_uc_ntn_alloc_conn_smmu_info(&ntn_ctx->conn.ul,
&inp->ul);
if (result) {
ipa_uc_ntn_free_conn_smmu_info(&ntn_ctx->conn.dl);
IPA_UC_OFFLOAD_ERR("alloc failure on RX\n");
goto fail;
}
}
fail:
return result;
}
int ipa_uc_offload_conn_pipes(struct ipa_uc_offload_conn_in_params *inp,
struct ipa_uc_offload_conn_out_params *outp)
{
int ret = 0;
struct ipa_uc_offload_ctx *offload_ctx;
if (!(inp && outp)) {
IPA_UC_OFFLOAD_ERR("bad parm. in=%pK out=%pK\n", inp, outp);
return -EINVAL;
}
if (inp->clnt_hndl <= IPA_UC_INVALID ||
inp->clnt_hndl >= IPA_UC_MAX_PROT_SIZE) {
IPA_UC_OFFLOAD_ERR("invalid client handle %d\n",
inp->clnt_hndl);
return -EINVAL;
}
offload_ctx = ipa_uc_offload_ctx[inp->clnt_hndl];
if (!offload_ctx) {
IPA_UC_OFFLOAD_ERR("Invalid ctx %d\n", inp->clnt_hndl);
return -EINVAL;
}
if (offload_ctx->state != IPA_UC_OFFLOAD_STATE_INITIALIZED) {
IPA_UC_OFFLOAD_ERR("Invalid state %d\n", offload_ctx->state);
return -EPERM;
}
switch (offload_ctx->proto) {
case IPA_UC_NTN_V2X:
case IPA_UC_NTN:
ret = ipa_uc_ntn_conn_pipes(&inp->u.ntn, &outp->u.ntn,
offload_ctx);
break;
default:
IPA_UC_OFFLOAD_ERR("Invalid Proto :%d\n", offload_ctx->proto);
ret = -EINVAL;
break;
}
return ret;
}
EXPORT_SYMBOL(ipa_uc_offload_conn_pipes);
static int ipa_uc_ntn_disconn_pipes(struct ipa_uc_offload_ctx *ntn_ctx)
{
int ipa_ep_idx_ul, ipa_ep_idx_dl;
int ret = 0;
if (ntn_ctx->conn.dl.smmu_enabled != ntn_ctx->conn.ul.smmu_enabled) {
IPA_UC_OFFLOAD_ERR("ul and dl smmu enablement do not match\n");
return -EINVAL;
}
ntn_ctx->state = IPA_UC_OFFLOAD_STATE_INITIALIZED;
ret = ipa_pm_deactivate_sync(ntn_ctx->pm_hdl);
if (ret) {
IPA_UC_OFFLOAD_ERR("fail to deactivate res: %d\n",
ret);
return -EFAULT;
}
if (ntn_ctx->proto == IPA_UC_NTN_V2X) {
ipa_ep_idx_ul = ipa_get_ep_mapping(IPA_CLIENT_ETHERNET2_PROD);
ipa_ep_idx_dl = ipa_get_ep_mapping(IPA_CLIENT_ETHERNET2_CONS);
} else {
ipa_ep_idx_ul = ipa_get_ep_mapping(IPA_CLIENT_ETHERNET_PROD);
ipa_ep_idx_dl = ipa_get_ep_mapping(IPA_CLIENT_ETHERNET_CONS);
}
ret = ipa3_tear_down_uc_offload_pipes(ipa_ep_idx_ul, ipa_ep_idx_dl,
&ntn_ctx->conn);
if (ret) {
IPA_UC_OFFLOAD_ERR("fail to tear down ntn offload pipes, %d\n",
ret);
return -EFAULT;
}
if (ntn_ctx->conn.dl.smmu_enabled) {
ipa_uc_ntn_free_conn_smmu_info(&ntn_ctx->conn.dl);
ipa_uc_ntn_free_conn_smmu_info(&ntn_ctx->conn.ul);
}
return ret;
}
int ipa_uc_offload_disconn_pipes(u32 clnt_hdl)
{
struct ipa_uc_offload_ctx *offload_ctx;
int ret = 0;
if (clnt_hdl <= IPA_UC_INVALID ||
clnt_hdl >= IPA_UC_MAX_PROT_SIZE) {
IPA_UC_OFFLOAD_ERR("Invalid client handle %d\n", clnt_hdl);
return -EINVAL;
}
offload_ctx = ipa_uc_offload_ctx[clnt_hdl];
if (!offload_ctx) {
IPA_UC_OFFLOAD_ERR("Invalid client Handle\n");
return -EINVAL;
}
if (offload_ctx->state != IPA_UC_OFFLOAD_STATE_UP) {
IPA_UC_OFFLOAD_ERR("Invalid state\n");
return -EINVAL;
}
switch (offload_ctx->proto) {
case IPA_UC_NTN_V2X:
case IPA_UC_NTN:
ret = ipa_uc_ntn_disconn_pipes(offload_ctx);
break;
default:
IPA_UC_OFFLOAD_ERR("Invalid Proto :%d\n", clnt_hdl);
ret = -EINVAL;
break;
}
return ret;
}
EXPORT_SYMBOL(ipa_uc_offload_disconn_pipes);
static int ipa_uc_ntn_cleanup(struct ipa_uc_offload_ctx *ntn_ctx)
{
int len, result = 0;
struct ipa_ioc_del_hdr *hdr;
ipa_uc_offload_ntn_deregister_pm_client(ntn_ctx);
len = sizeof(struct ipa_ioc_del_hdr) + 2 * sizeof(struct ipa_hdr_del);
hdr = kzalloc(len, GFP_KERNEL);
if (hdr == NULL)
return -ENOMEM;
hdr->commit = 1;
hdr->num_hdls = 2;
hdr->hdl[0].hdl = ntn_ctx->partial_hdr_hdl[0];
hdr->hdl[1].hdl = ntn_ctx->partial_hdr_hdl[1];
if (ipa_del_hdr(hdr)) {
IPA_UC_OFFLOAD_ERR("fail to delete partial header\n");
result = -EFAULT;
goto fail;
}
if (ipa_deregister_intf(ntn_ctx->netdev_name)) {
IPA_UC_OFFLOAD_ERR("fail to delete interface prop\n");
result = -EFAULT;
goto fail;
}
fail:
kfree(hdr);
return result;
}
int ipa_uc_offload_cleanup(u32 clnt_hdl)
{
struct ipa_uc_offload_ctx *offload_ctx;
int ret = 0;
if (clnt_hdl <= IPA_UC_INVALID ||
clnt_hdl >= IPA_UC_MAX_PROT_SIZE) {
IPA_UC_OFFLOAD_ERR("Invalid client handle %d\n", clnt_hdl);
return -EINVAL;
}
offload_ctx = ipa_uc_offload_ctx[clnt_hdl];
if (!offload_ctx) {
IPA_UC_OFFLOAD_ERR("Invalid client handle %d\n", clnt_hdl);
return -EINVAL;
}
if (offload_ctx->state != IPA_UC_OFFLOAD_STATE_INITIALIZED) {
IPA_UC_OFFLOAD_ERR("Invalid State %d\n", offload_ctx->state);
return -EINVAL;
}
switch (offload_ctx->proto) {
case IPA_UC_NTN:
ret = ipa_uc_ntn_cleanup(offload_ctx);
break;
case IPA_UC_NTN_V2X:
/* only clean-up pm_handle */
ipa_uc_offload_ntn_deregister_pm_client(offload_ctx);
break;
default:
IPA_UC_OFFLOAD_ERR("Invalid Proto :%d\n", clnt_hdl);
ret = -EINVAL;
break;
}
if (!ret) {
kfree(offload_ctx);
offload_ctx = NULL;
ipa_uc_offload_ctx[clnt_hdl] = NULL;
}
return ret;
}
EXPORT_SYMBOL(ipa_uc_offload_cleanup);
/**
* ipa_uc_offload_uc_rdyCB() - To register uC ready CB if uC not
* ready
* @inout: [in/out] input/output parameters
* from/to client
*
* Returns: 0 on success, negative on failure
*
*/
int ipa_uc_offload_reg_rdyCB(struct ipa_uc_ready_params *inp)
{
int ret = 0;
if (!inp) {
IPA_UC_OFFLOAD_ERR("Invalid input\n");
return -EINVAL;
}
if (inp->proto == IPA_UC_NTN || inp->proto == IPA_UC_NTN_V2X)
ret = ipa3_ntn_uc_reg_rdyCB(inp->notify, inp->priv);
if (ret == -EEXIST) {
inp->is_uC_ready = true;
ret = 0;
} else
inp->is_uC_ready = false;
return ret;
}
EXPORT_SYMBOL(ipa_uc_offload_reg_rdyCB);
void ipa_uc_offload_dereg_rdyCB(enum ipa_uc_offload_proto proto)
{
if (proto == IPA_UC_NTN || proto == IPA_UC_NTN_V2X)
ipa3_ntn_uc_dereg_rdyCB();
}
EXPORT_SYMBOL(ipa_uc_offload_dereg_rdyCB);
int ipa_set_perf_profile(struct ipa_perf_profile *profile)
{
if (!profile) {
IPA_UC_OFFLOAD_ERR("Invalid input\n");
return -EINVAL;
}
if (profile->client != IPA_CLIENT_ETHERNET_PROD &&
profile->client != IPA_CLIENT_ETHERNET_CONS) {
IPA_UC_OFFLOAD_ERR("not supported\n");
return -EINVAL;
}
IPA_UC_OFFLOAD_DBG("setting throughput to %d\n",
profile->max_supported_bw_mbps);
return ipa_pm_set_throughput(
ipa_uc_offload_ctx[IPA_UC_NTN]->pm_hdl,
profile->max_supported_bw_mbps);
}
EXPORT_SYMBOL(ipa_set_perf_profile);

2782
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_clients/ipa_usb.c Normal file
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File diff suppressed because it is too large Load Diff

1991
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_clients/ipa_wdi3.c Normal file
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File diff suppressed because it is too large Load Diff

2065
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_clients/ipa_wigig.c Normal file
View File

File diff suppressed because it is too large Load Diff

2596
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_clients/rndis_ipa.c Normal file
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File diff suppressed because it is too large Load Diff

98
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_clients/rndis_ipa.h Normal file
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@ -0,0 +1,98 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2013-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _RNDIS_IPA_H_
#define _RNDIS_IPA_H_
#include "ipa.h"
/*
* @priv: private data given upon ipa_connect
* @evt: event enum, should be IPA_WRITE_DONE
* @data: for tx path the data field is the sent socket buffer.
*/
typedef void (*ipa_callback)(void *priv,
enum ipa_dp_evt_type evt,
unsigned long data);
/*
* struct ipa_usb_init_params - parameters for driver initialization API
*
* @device_ready_notify: callback supplied by USB core driver
* This callback shall be called by the Netdev once the device
* is ready to receive data from tethered PC.
* @ipa_rx_notify: The network driver will set this callback (out parameter).
* this callback shall be supplied for ipa_connect upon pipe
* connection (USB->IPA), once IPA driver receive data packets
* from USB pipe destined for Apps this callback will be called.
* @ipa_tx_notify: The network driver will set this callback (out parameter).
* this callback shall be supplied for ipa_connect upon pipe
* connection (IPA->USB), once IPA driver send packets destined
* for USB, IPA BAM will notify for Tx-complete.
* @host_ethaddr: host Ethernet address in network order
* @device_ethaddr: device Ethernet address in network order
* @private: The network driver will set this pointer (out parameter).
* This pointer will hold the network device for later interaction
* with between USB driver and the network driver.
* @skip_ep_cfg: boolean field that determines if Apps-processor
* should or should not configure this end-point.
*/
struct ipa_usb_init_params {
void (*device_ready_notify)(void);
ipa_callback ipa_rx_notify;
ipa_callback ipa_tx_notify;
u8 host_ethaddr[ETH_ALEN];
u8 device_ethaddr[ETH_ALEN];
void *private;
bool skip_ep_cfg;
};
#if IS_ENABLED(CONFIG_RNDIS_IPA)
int rndis_ipa_init(struct ipa_usb_init_params *params);
int rndis_ipa_pipe_connect_notify(u32 usb_to_ipa_hdl,
u32 ipa_to_usb_hdl,
u32 max_xfer_size_bytes_to_dev,
u32 max_packet_number_to_dev,
u32 max_xfer_size_bytes_to_host,
void *private);
int rndis_ipa_pipe_disconnect_notify(void *private);
void rndis_ipa_cleanup(void *private);
int rndis_ipa_init_module(void);
void rndis_ipa_cleanup_module(void);
#else /* IS_ENABLED(CONFIG_RNDIS_IPA) */
static inline int rndis_ipa_init(struct ipa_usb_init_params *params)
{
return -ENOMEM;
}
static inline int rndis_ipa_pipe_connect_notify(u32 usb_to_ipa_hdl,
u32 ipa_to_usb_hdl,
u32 max_xfer_size_bytes_to_dev,
u32 max_packet_number_to_dev,
u32 max_xfer_size_bytes_to_host,
void *private)
{
return -ENOMEM;
}
static inline int rndis_ipa_pipe_disconnect_notify(void *private)
{
return -ENOMEM;
}
static inline void rndis_ipa_cleanup(void *private)
{
}
#endif /* IS_ENABLED(CONFIG_RNDIS_IPA) */
#endif /* _RNDIS_IPA_H_ */

82
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_clients/rndis_ipa_trace.h Normal file
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@ -0,0 +1,82 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#undef TRACE_SYSTEM
#define TRACE_SYSTEM rndis_ipa
#define TRACE_INCLUDE_FILE rndis_ipa_trace
#if !defined(_RNDIS_IPA_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
#define _RNDIS_IPA_TRACE_H
#include <linux/tracepoint.h>
TRACE_EVENT(
rndis_netif_ni,
TP_PROTO(unsigned long proto),
TP_ARGS(proto),
TP_STRUCT__entry(
__field(unsigned long, proto)
),
TP_fast_assign(
__entry->proto = proto;
),
TP_printk("proto =%lu\n", __entry->proto)
);
TRACE_EVENT(
rndis_tx_dp,
TP_PROTO(unsigned long proto),
TP_ARGS(proto),
TP_STRUCT__entry(
__field(unsigned long, proto)
),
TP_fast_assign(
__entry->proto = proto;
),
TP_printk("proto =%lu\n", __entry->proto)
);
TRACE_EVENT(
rndis_status_rcvd,
TP_PROTO(unsigned long proto),
TP_ARGS(proto),
TP_STRUCT__entry(
__field(unsigned long, proto)
),
TP_fast_assign(
__entry->proto = proto;
),
TP_printk("proto =%lu\n", __entry->proto)
);
#endif /* _RNDIS_IPA_TRACE_H */
/* This part must be outside protection */
#ifndef RNDIS_TRACE_INCLUDE_PATH
#ifdef CONFIG_IPA_VENDOR_DLKM
#define RNDIS_TRACE_INCLUDE_PATH ../../../../vendor/qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_clients
#else
#define RNDIS_TRACE_INCLUDE_PATH ../../techpack/dataipa/drivers/platform/msm/ipa/ipa_clients
#endif
#endif
#define TRACE_INCLUDE_PATH RNDIS_TRACE_INCLUDE_PATH
#include <trace/define_trace.h>

951
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_common_i.h Normal file
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@ -0,0 +1,951 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2012-2021, The Linux Foundation. All rights reserved.
*
* Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _IPA_COMMON_I_H_
#define _IPA_COMMON_I_H_
#include <linux/ipa_qmi_service_v01.h>
#include <linux/errno.h>
#include <linux/ipc_logging.h>
#include "ipa.h"
#include "ipa_uc_offload.h"
#include "ipa_wdi3.h"
#include "ipa_wigig.h"
#include "ipa_eth.h"
#include <linux/ipa_usb.h>
#include <linux/ipa_mhi.h>
#include <linux/ratelimit.h>
#include "ipa_stats.h"
#include "gsi.h"
#ifndef IPA_ETH_API_VER
#define IPA_ETH_API_VER 1
#endif
#define WARNON_RATELIMIT_BURST 1
#define IPA_RATELIMIT_BURST 1
#define IPA_EP_ARR_SIZE 2
#define IPA_EP_PER_REG 32
#define __FILENAME__ \
(strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : __FILE__)
#define IPA_ACTIVE_CLIENTS_PREP_EP(log_info, client) \
log_info.file = __FILENAME__; \
log_info.line = __LINE__; \
log_info.type = EP; \
log_info.id_string = (client < 0 || client >= IPA_CLIENT_MAX) \
? "Invalid Client" : ipa_clients_strings[client]
#define IPA_ACTIVE_CLIENTS_PREP_SIMPLE(log_info) \
log_info.file = __FILENAME__; \
log_info.line = __LINE__; \
log_info.type = SIMPLE; \
log_info.id_string = __func__
#define IPA_ACTIVE_CLIENTS_PREP_RESOURCE(log_info, resource_name) \
log_info.file = __FILENAME__; \
log_info.line = __LINE__; \
log_info.type = RESOURCE; \
log_info.id_string = resource_name
#define IPA_ACTIVE_CLIENTS_PREP_SPECIAL(log_info, id_str) \
log_info.file = __FILENAME__; \
log_info.line = __LINE__; \
log_info.type = SPECIAL; \
log_info.id_string = id_str
#define IPA_ACTIVE_CLIENTS_INC_EP(client) \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_EP(log_info, client); \
ipa3_inc_client_enable_clks(&log_info); \
} while (0)
#define IPA_ACTIVE_CLIENTS_DEC_EP(client) \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_EP(log_info, client); \
ipa3_dec_client_disable_clks(&log_info); \
} while (0)
#define IPA_ACTIVE_CLIENTS_INC_SIMPLE() \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_SIMPLE(log_info); \
ipa3_inc_client_enable_clks(&log_info); \
} while (0)
#define IPA_ACTIVE_CLIENTS_DEC_SIMPLE() \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_SIMPLE(log_info); \
ipa3_dec_client_disable_clks(&log_info); \
} while (0)
#define IPA_ACTIVE_CLIENTS_INC_RESOURCE(resource_name) \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_RESOURCE(log_info, resource_name); \
ipa3_inc_client_enable_clks(&log_info); \
} while (0)
#define IPA_ACTIVE_CLIENTS_DEC_RESOURCE(resource_name) \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_RESOURCE(log_info, resource_name); \
ipa3_dec_client_disable_clks(&log_info); \
} while (0)
#define IPA_ACTIVE_CLIENTS_INC_SPECIAL(id_str) \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_SPECIAL(log_info, id_str); \
ipa3_inc_client_enable_clks(&log_info); \
} while (0)
#define IPA_ACTIVE_CLIENTS_DEC_SPECIAL(id_str) \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_SPECIAL(log_info, id_str); \
ipa3_dec_client_disable_clks(&log_info); \
} while (0)
#define IPA_ACTIVE_CLIENTS_INC_EP_NO_BLOCK(client) ({\
int __ret = 0; \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_EP(log_info, client); \
__ret = ipa3_inc_client_enable_clks_no_block(&log_info); \
} while (0); \
(__ret); \
})
#define IPA_ACTIVE_CLIENTS_DEC_EP_NO_BLOCK(client) \
do { \
struct ipa_active_client_logging_info log_info; \
IPA_ACTIVE_CLIENTS_PREP_EP(log_info, client); \
ipa3_dec_client_disable_clks_no_block(&log_info); \
} while (0)
#ifdef IPA_DEBUG
/*
* Printing one warning message in 5 seconds if multiple warning messages
* are coming back to back.
*/
#define WARN_ON_RATELIMIT_IPA(condition) \
({ \
static DEFINE_RATELIMIT_STATE(_rs, \
DEFAULT_RATELIMIT_INTERVAL, \
WARNON_RATELIMIT_BURST); \
int rtn = !!(condition); \
\
if (unlikely(rtn && __ratelimit(&_rs))) \
WARN_ON(rtn); \
})
#else
#define WARN_ON_RATELIMIT_IPA(condition) ((void)0)
#endif
/*
* Printing one error message in 5 seconds if multiple error messages
* are coming back to back.
*/
#define pr_err_ratelimited_ipa(fmt, args...) \
({ \
static DEFINE_RATELIMIT_STATE(_rs, \
DEFAULT_RATELIMIT_INTERVAL, \
IPA_RATELIMIT_BURST); \
\
if (__ratelimit(&_rs)) \
pr_err(fmt, ## args); \
})
#define ipa_assert_on(condition)\
do {\
if (unlikely(condition))\
ipa_assert();\
} while (0)
#define IPA_CLIENT_IS_PROD(x) \
(x < IPA_CLIENT_MAX && (x & 0x1) == 0)
#define IPA_CLIENT_IS_CONS(x) \
(x < IPA_CLIENT_MAX && (x & 0x1) == 1)
/*
* The following macro does two things:
* 1) It checks to see if client x is allocated, and
* 2) It assigns a value to index idx
*/
#define IPA_CLIENT_IS_MAPPED(x, idx) \
((idx = ipa_get_ep_mapping(x)) != IPA_EP_NOT_ALLOCATED)
/*
* Same behavior as the macro above; but in addition, determines if
* the client is valid as well.
*/
#define IPA_CLIENT_IS_MAPPED_VALID(x, idx) \
(IPA_CLIENT_IS_MAPPED(x, idx) && ipa3_ctx->ep[idx].valid == 1)
#define IPA_CLIENT_IS_ETH_PROD(x) \
((x == ipa_get_ep_mapping(IPA_CLIENT_ETHERNET_PROD)) || \
(x == ipa_get_ep_mapping(IPA_CLIENT_ETHERNET2_PROD)) || \
(x == ipa_get_ep_mapping(IPA_CLIENT_AQC_ETHERNET_PROD)) || \
(x == ipa_get_ep_mapping(IPA_CLIENT_RTK_ETHERNET_PROD)))
#define IPA_GSI_CHANNEL_STOP_SLEEP_MIN_USEC (1000)
#define IPA_GSI_CHANNEL_STOP_SLEEP_MAX_USEC (2000)
#define STR_ETH_IFACE "eth"
#define STR_ETH0_IFACE "eth0"
#define STR_ETH1_IFACE "eth1"
#define STR_RNDIS_IFACE "rndis"
#define STR_ECM_IFACE "ecm"
#define MINIDUMP_MASK 0x10000
/**
* qmap_hdr -
* @next_hdr: 1 - there is a qmap extension header, 0 - opposite
* @cd: 0 - data, 1 - command
* @packet_len: length excluding qmap header
* @ext_next_hdr: always zero
* @hdr_type: type of extension header
* @additional_hdr_size: distance between end of qmap header to start of ip
* header
* @zero_checksum: 0 - compute checksum, 1 - zero checksum
* @ip_id_cfg: 0 - running ip id per segment, 1 - constant ip id
* @segment_size: maximum segment size for the segmentation operation
*/
struct qmap_hdr {
u16 pad: 6;
u16 next_hdr: 1;
u16 cd: 1;
u16 mux_id: 8;
u16 packet_len_with_pad: 16;
u16 ext_next_hdr: 1;
u16 hdr_type: 7;
u16 additional_hdr_size: 5;
u16 reserved: 1;
u16 zero_checksum: 1;
u16 ip_id_cfg: 1;
u16 segment_size: 16;
} __packed;
/**
* struct ipa_pkt_init_ex_hdr_ofst_set - header entry lookup parameters, if
* lookup was successful than the ep's pkt_init_ex offset will be set.
* @name: name of the header resource
* @ep: [out] - the endpoint number to set the IC header offset
*/
struct ipa_pkt_init_ex_hdr_ofst_set {
char name[IPA_RESOURCE_NAME_MAX];
enum ipa_client_type ep;
};
enum ipa_active_client_log_type {
EP,
SIMPLE,
RESOURCE,
SPECIAL,
INVALID
};
struct ipa_active_client_logging_info {
const char *id_string;
char *file;
int line;
enum ipa_active_client_log_type type;
};
/**
* struct ipa_mem_buffer - IPA memory buffer
* @base: base
* @phys_base: physical base address
* @size: size of memory buffer
*/
struct ipa_mem_buffer {
void *base;
dma_addr_t phys_base;
u32 size;
};
/**
* enum ipa3_mhi_burst_mode - MHI channel burst mode state
*
* Values are according to MHI specification
* @IPA_MHI_BURST_MODE_DEFAULT: burst mode enabled for HW channels,
* disabled for SW channels
* @IPA_MHI_BURST_MODE_RESERVED:
* @IPA_MHI_BURST_MODE_DISABLE: Burst mode is disabled for this channel
* @IPA_MHI_BURST_MODE_ENABLE: Burst mode is enabled for this channel
*
*/
enum ipa3_mhi_burst_mode {
IPA_MHI_BURST_MODE_DEFAULT,
IPA_MHI_BURST_MODE_RESERVED,
IPA_MHI_BURST_MODE_DISABLE,
IPA_MHI_BURST_MODE_ENABLE,
};
/**
* enum ipa_hw_mhi_channel_states - MHI channel state machine
*
* Values are according to MHI specification
* @IPA_HW_MHI_CHANNEL_STATE_DISABLE: Channel is disabled and not processed by
* the host or device.
* @IPA_HW_MHI_CHANNEL_STATE_ENABLE: A channel is enabled after being
* initialized and configured by host, including its channel context and
* associated transfer ring. While this state, the channel is not active
* and the device does not process transfer.
* @IPA_HW_MHI_CHANNEL_STATE_RUN: The device processes transfers and doorbell
* for channels.
* @IPA_HW_MHI_CHANNEL_STATE_SUSPEND: Used to halt operations on the channel.
* The device does not process transfers for the channel in this state.
* This state is typically used to synchronize the transition to low power
* modes.
* @IPA_HW_MHI_CHANNEL_STATE_STOP: Used to halt operations on the channel.
* The device does not process transfers for the channel in this state.
* @IPA_HW_MHI_CHANNEL_STATE_ERROR: The device detected an error in an element
* from the transfer ring associated with the channel.
* @IPA_HW_MHI_CHANNEL_STATE_INVALID: Invalid state. Shall not be in use in
* operational scenario.
*/
enum ipa_hw_mhi_channel_states {
IPA_HW_MHI_CHANNEL_STATE_DISABLE = 0,
IPA_HW_MHI_CHANNEL_STATE_ENABLE = 1,
IPA_HW_MHI_CHANNEL_STATE_RUN = 2,
IPA_HW_MHI_CHANNEL_STATE_SUSPEND = 3,
IPA_HW_MHI_CHANNEL_STATE_STOP = 4,
IPA_HW_MHI_CHANNEL_STATE_ERROR = 5,
IPA_HW_MHI_CHANNEL_STATE_INVALID = 0xFF
};
enum ipa_mhi_state {
IPA_MHI_STATE_INITIALIZED,
IPA_MHI_STATE_READY,
IPA_MHI_STATE_STARTED,
IPA_MHI_STATE_SUSPEND_IN_PROGRESS,
IPA_MHI_STATE_SUSPENDED,
IPA_MHI_STATE_RESUME_IN_PROGRESS,
IPA_MHI_STATE_MAX
};
/**
* Structure holding the parameters for IPA_CPU_2_HW_CMD_MHI_DL_UL_SYNC_INFO
* command. Parameters are sent as 32b immediate parameters.
* @isDlUlSyncEnabled: Flag to indicate if DL UL Syncronization is enabled
* @UlAccmVal: UL Timer Accumulation value (Period after which device will poll
* for UL data)
* @ulMsiEventThreshold: Threshold at which HW fires MSI to host for UL events
* @dlMsiEventThreshold: Threshold at which HW fires MSI to host for DL events
*/
union IpaHwMhiDlUlSyncCmdData_t {
struct IpaHwMhiDlUlSyncCmdParams_t {
u32 isDlUlSyncEnabled:8;
u32 UlAccmVal:8;
u32 ulMsiEventThreshold:8;
u32 dlMsiEventThreshold:8;
} params;
u32 raw32b;
};
struct ipa_mhi_ch_ctx {
u8 chstate;/*0-7*/
u8 brstmode:2;/*8-9*/
u8 pollcfg:6;/*10-15*/
u16 rsvd;/*16-31*/
u32 chtype;
u32 erindex;
u64 rbase;
u64 rlen;
u64 rp;
u64 wp;
} __packed;
struct ipa_mhi_ev_ctx {
u32 intmodc:16;
u32 intmodt:16;
u32 ertype;
u32 msivec;
u64 rbase;
u64 rlen;
u64 rp;
u64 wp;
} __packed;
struct ipa_mhi_init_uc_engine {
struct ipa_mhi_msi_info *msi;
u32 mmio_addr;
u32 host_ctrl_addr;
u32 host_data_addr;
u32 first_ch_idx;
u32 first_er_idx;
union IpaHwMhiDlUlSyncCmdData_t *ipa_cached_dl_ul_sync_info;
};
struct ipa_mhi_init_gsi_engine {
u32 first_ch_idx;
};
struct ipa_mhi_init_engine {
struct ipa_mhi_init_uc_engine uC;
struct ipa_mhi_init_gsi_engine gsi;
};
struct start_gsi_channel {
enum ipa_hw_mhi_channel_states state;
struct ipa_mhi_msi_info *msi;
struct ipa_mhi_ev_ctx *ev_ctx_host;
u64 event_context_addr;
struct ipa_mhi_ch_ctx *ch_ctx_host;
u64 channel_context_addr;
void (*ch_err_cb)(struct gsi_chan_err_notify *notify);
void (*ev_err_cb)(struct gsi_evt_err_notify *notify);
void *channel;
bool assert_bit40;
struct gsi_mhi_channel_scratch *mhi;
unsigned long *cached_gsi_evt_ring_hdl;
uint8_t evchid;
};
struct start_uc_channel {
enum ipa_hw_mhi_channel_states state;
u8 index;
u8 id;
};
struct start_mhi_channel {
struct start_uc_channel uC;
struct start_gsi_channel gsi;
};
struct ipa_mhi_connect_params_internal {
struct ipa_sys_connect_params *sys;
u8 channel_id;
struct start_mhi_channel start;
};
/**
* struct ipa_hdr_offset_entry - IPA header offset entry
* @link: entry's link in global header offset entries list
* @offset: the offset
* @bin: bin
* @ipacm_installed: indicate if installed by ipacm
*/
struct ipa_hdr_offset_entry {
struct list_head link;
u32 offset;
u32 bin;
bool ipacm_installed;
};
/**
* enum teth_tethering_mode - Tethering mode (Rmnet / MBIM)
*/
enum teth_tethering_mode {
TETH_TETHERING_MODE_RMNET,
TETH_TETHERING_MODE_MBIM,
TETH_TETHERING_MODE_RMNET_2,
TETH_TETHERING_MODE_MAX,
};
/**
* teth_bridge_init_params - Parameters used for in/out USB API
* @usb_notify_cb: Callback function which should be used by the caller.
* Output parameter.
* @private_data: Data for the callback function. Should be used by the
* caller. Output parameter.
* @skip_ep_cfg: boolean field that determines if Apps-processor
* should or should not confiugre this end-point.
*/
struct teth_bridge_init_params {
ipa_notify_cb usb_notify_cb;
void *private_data;
enum ipa_client_type client;
bool skip_ep_cfg;
};
/**
* struct teth_bridge_connect_params - Parameters used in teth_bridge_connect()
* @ipa_usb_pipe_hdl: IPA to USB pipe handle, returned from ipa_connect()
* @usb_ipa_pipe_hdl: USB to IPA pipe handle, returned from ipa_connect()
* @tethering_mode: Rmnet or MBIM
* @ipa_client_type: IPA "client" name (IPA_CLIENT_USB#_PROD)
*/
struct teth_bridge_connect_params {
u32 ipa_usb_pipe_hdl;
u32 usb_ipa_pipe_hdl;
enum teth_tethering_mode tethering_mode;
enum ipa_client_type client_type;
};
/**
* struct IpaOffloadStatschannel_info - channel info for uC
* stats
* @dir: Direction of the channel ID DIR_CONSUMER =0,
* DIR_PRODUCER = 1
* @ch_id: GSI ch_id of the IPA endpoint for which stats need
* to be calculated, 0xFF means invalid channel or disable stats
* on already stats enabled channel
*/
struct IpaOffloadStatschannel_info {
u8 dir;
u8 ch_id;
} __packed;
/**
* struct IpaHwOffloadStatsAllocCmdData_t - protocol info for uC
* stats start
* @protocol: Enum that indicates the protocol type
* @ch_id_info: GSI ch_id and dir of the IPA endpoint for which stats
* need to be calculated
*/
struct IpaHwOffloadStatsAllocCmdData_t {
u32 protocol;
struct IpaOffloadStatschannel_info
ch_id_info[IPA_MAX_CH_STATS_SUPPORTED];
} __packed;
/**
* struct ipa_uc_dbg_ring_stats - uC dbg stats info for each
* offloading protocol
* @ring: ring stats for each channel
* @ch_num: number of ch supported for given protocol
*/
struct ipa_uc_dbg_ring_stats {
union {
struct IpaHwRingStats_t ring[IPA_MAX_CH_STATS_SUPPORTED];
struct ipa_uc_dbg_rtk_ring_stats
rtk[IPA_MAX_CH_STATS_SUPPORTED];
} u;
u8 num_ch;
};
/**
* struct ipa_tz_unlock_reg_info - Used in order unlock regions of memory by TZ
* @reg_addr - Physical address of the start of the region
* @size - Size of the region in bytes
*/
struct ipa_tz_unlock_reg_info {
u64 reg_addr;
u64 size;
};
/**
* struct ipa_tx_suspend_irq_data - interrupt data for IPA_TX_SUSPEND_IRQ
* @endpoints: bitmask of endpoints which case IPA_TX_SUSPEND_IRQ interrupt
* @dma_addr: DMA address of this Rx packet
*/
struct ipa_tx_suspend_irq_data {
u32 endpoints[IPA_EP_ARR_SIZE];
};
/**
* struct ipa_rtp_header_add_procparams
* @input_ip_version: Specifies if Input header is IPV4(0) or IPV6(1)
* @reserved: for future use
*/
struct ipa_rtp_header_add_procparams {
uint32_t input_ip_version:1;
uint32_t reserved:31;
};
struct ipa_rtp_hdr_proc_ctx_params {
struct ipa_rtp_header_add_procparams hdr_add_param;
};
extern const char *ipa_clients_strings[];
#define IPA_IPC_LOGGING(buf, fmt, args...) \
do { \
if (buf) \
ipc_log_string((buf), fmt, __func__, __LINE__, \
## args); \
} while (0)
void ipa3_inc_client_enable_clks(struct ipa_active_client_logging_info *id);
void ipa3_dec_client_disable_clks(struct ipa_active_client_logging_info *id);
int ipa3_inc_client_enable_clks_no_block(
struct ipa_active_client_logging_info *id);
int ipa3_suspend_resource_no_block(enum ipa_rm_resource_name resource);
int ipa3_resume_resource(enum ipa_rm_resource_name name);
int ipa3_suspend_resource_sync(enum ipa_rm_resource_name resource);
int ipa3_set_required_perf_profile(enum ipa_voltage_level floor_voltage,
u32 bandwidth_mbps);
void *ipa3_get_ipc_logbuf(void);
void *ipa3_get_ipc_logbuf_low(void);
void ipa_assert(void);
/* MHI */
int ipa3_mhi_init_engine(struct ipa_mhi_init_engine *params);
int ipa3_connect_mhi_pipe(struct ipa_mhi_connect_params_internal *in,
u32 *clnt_hdl);
int ipa3_disconnect_mhi_pipe(u32 clnt_hdl);
bool ipa3_mhi_stop_gsi_channel(enum ipa_client_type client);
int ipa3_qmi_enable_force_clear_datapath_send(
struct ipa_enable_force_clear_datapath_req_msg_v01 *req);
int ipa3_qmi_disable_force_clear_datapath_send(
struct ipa_disable_force_clear_datapath_req_msg_v01 *req);
int ipa3_generate_tag_process(void);
int ipa3_disable_sps_pipe(enum ipa_client_type client);
int ipa3_mhi_reset_channel_internal(enum ipa_client_type client);
int ipa3_mhi_start_channel_internal(enum ipa_client_type client);
bool ipa3_mhi_sps_channel_empty(enum ipa_client_type client);
int ipa3_mhi_resume_channels_internal(enum ipa_client_type client,
bool LPTransitionRejected, bool brstmode_enabled,
union __packed gsi_channel_scratch ch_scratch, u8 index,
bool is_switch_to_dbmode);
int ipa3_mhi_query_ch_info(enum ipa_client_type client,
struct gsi_chan_info *ch_info);
int ipa3_mhi_destroy_channel(enum ipa_client_type client);
int ipa_mhi_is_using_dma(bool *flag);
/* MHI uC */
int ipa3_uc_mhi_send_dl_ul_sync_info(union IpaHwMhiDlUlSyncCmdData_t *cmd);
int ipa3_uc_mhi_init
(void (*ready_cb)(void), void (*wakeup_request_cb)(void));
void ipa3_uc_mhi_cleanup(void);
int ipa3_uc_mhi_reset_channel(int channelHandle);
int ipa3_uc_mhi_suspend_channel(int channelHandle);
int ipa3_uc_mhi_stop_event_update_channel(int channelHandle);
int ipa3_uc_mhi_print_stats(char *dbg_buff, int size);
/* uC */
int ipa3_uc_state_check(void);
/* general */
void ipa3_get_holb(int ep_idx, struct ipa_ep_cfg_holb *holb);
void ipa3_set_tag_process_before_gating(bool val);
bool ipa3_has_open_aggr_frame(enum ipa_client_type client);
int ipa3_setup_uc_ntn_pipes(struct ipa_ntn_conn_in_params *in,
ipa_notify_cb notify, void *priv, u8 hdr_len,
struct ipa_ntn_conn_out_params *outp);
int ipa3_tear_down_uc_offload_pipes(int ipa_ep_idx_ul, int ipa_ep_idx_dl,
struct ipa_ntn_conn_in_params *params);
u8 *ipa_write_64(u64 w, u8 *dest);
u8 *ipa_write_32(u32 w, u8 *dest);
u8 *ipa_write_16(u16 hw, u8 *dest);
u8 *ipa_write_8(u8 b, u8 *dest);
u8 *ipa_pad_to_64(u8 *dest);
u8 *ipa_pad_to_32(u8 *dest);
int ipa3_ntn_uc_reg_rdyCB(void (*ipauc_ready_cb)(void *user_data),
void *user_data);
void ipa3_ntn_uc_dereg_rdyCB(void);
int ipa3_conn_wdi3_pipes(struct ipa_wdi_conn_in_params *in,
struct ipa_wdi_conn_out_params *out,
ipa_wdi_meter_notifier_cb wdi_notify);
int ipa3_disconn_wdi3_pipes(int ipa_ep_idx_tx, int ipa_ep_idx_rx,
int ipa_ep_idx_tx1);
int ipa3_enable_wdi3_pipes(int ipa_ep_idx_tx, int ipa_ep_idx_rx,
int ipa_ep_idx_tx1);
int ipa3_disable_wdi3_pipes(int ipa_ep_idx_tx, int ipa_ep_idx_rx,
int ipa_ep_idx_tx1);
int ipa3_enable_wdi3_opt_dpath(int ipa_ep_idx_rx, int ipa_ep_idx_tx,
u32 rt_tbl_idx);
int ipa3_disable_wdi3_opt_dpath(int ipa_ep_idx_rx, int ipa_ep_idx_tx);
const char *ipa_get_version_string(enum ipa_hw_type ver);
int ipa3_start_gsi_channel(u32 clnt_hdl);
int ipa_smmu_store_sgt(struct sg_table **out_ch_ptr,
struct sg_table *in_sgt_ptr);
int ipa_smmu_free_sgt(struct sg_table **out_sgt_ptr);
#ifdef CONFIG_IPA_UT
int ipa_ut_module_init(void);
void ipa_ut_module_exit(void);
#else
static inline int ipa_ut_module_init(void)
{
return -EPERM;
}
static inline void ipa_ut_module_exit(void)
{
}
#endif
int ipa3_wigig_internal_init(
struct ipa_wdi_uc_ready_params *inout,
ipa_wigig_misc_int_cb int_notify,
phys_addr_t *uc_db_pa);
int ipa3_conn_wigig_rx_pipe_i(void *in, struct ipa_wigig_conn_out_params *out,
struct dentry **parent);
int ipa3_conn_wigig_client_i(void *in, struct ipa_wigig_conn_out_params *out,
ipa_notify_cb tx_notify,
void *priv);
int ipa3_wigig_uc_msi_init(
bool init,
phys_addr_t periph_baddr_pa,
phys_addr_t pseudo_cause_pa,
phys_addr_t int_gen_tx_pa,
phys_addr_t int_gen_rx_pa,
phys_addr_t dma_ep_misc_pa);
int ipa3_disconn_wigig_pipe_i(enum ipa_client_type client,
struct ipa_wigig_pipe_setup_info_smmu *pipe_smmu,
void *dbuff);
int ipa3_enable_wigig_pipe_i(enum ipa_client_type client);
int ipa3_disable_wigig_pipe_i(enum ipa_client_type client);
int ipa_wigig_send_msg(int msg_type,
const char *netdev_name, u8 *mac,
enum ipa_client_type client, bool to_wigig);
int ipa_wigig_send_wlan_msg(enum ipa_wlan_event msg_type,
const char *netdev_name, u8 *mac);
void ipa3_register_client_callback(int (*client_cb)(bool is_lock),
bool (*teth_port_state)(void), u32 ipa_ep_idx);
void ipa3_deregister_client_callback(u32 ipa_ep_idx);
/*
* Configuration
*/
int ipa3_cfg_ep(u32 clnt_hdl, const struct ipa_ep_cfg *ipa_ep_cfg);
int ipa3_cfg_ep_nat(u32 clnt_hdl, const struct ipa_ep_cfg_nat *ipa_ep_cfg);
int ipa3_cfg_ep_conn_track(u32 clnt_hdl,
const struct ipa_ep_cfg_conn_track *ep_conn_track);
int ipa_cfg_ep_hdr(u32 clnt_hdl, const struct ipa_ep_cfg_hdr *ipa_ep_cfg);
int ipa_cfg_ep_hdr_ext(u32 clnt_hdl,
const struct ipa_ep_cfg_hdr_ext *ipa_ep_cfg);
int ipa_cfg_ep_mode(u32 clnt_hdl, const struct ipa_ep_cfg_mode *ipa_ep_cfg);
int ipa_cfg_ep_aggr(u32 clnt_hdl, const struct ipa_ep_cfg_aggr *ipa_ep_cfg);
int ipa_cfg_ep_deaggr(u32 clnt_hdl,
const struct ipa_ep_cfg_deaggr *ipa_ep_cfg);
int ipa_cfg_ep_route(u32 clnt_hdl, const struct ipa_ep_cfg_route *ipa_ep_cfg);
int ipa_cfg_ep_holb(u32 clnt_hdl, const struct ipa_ep_cfg_holb *ipa_ep_cfg);
int ipa_cfg_ep_cfg(u32 clnt_hdl, const struct ipa_ep_cfg_cfg *ipa_ep_cfg);
int ipa_cfg_ep_metadata_mask(u32 clnt_hdl, const struct ipa_ep_cfg_metadata_mask
*ipa_ep_cfg);
int ipa_cfg_ep_holb_by_client(enum ipa_client_type client,
const struct ipa_ep_cfg_holb *ipa_ep_cfg);
/*
* Header removal / addition
*/
int ipa3_add_hdr_hpc(struct ipa_ioc_add_hdr *hdrs);
int ipa3_add_hdr_hpc_usr(struct ipa_ioc_add_hdr *hdrs, bool user_only);
int ipa3_del_hdr_hpc(struct ipa_ioc_del_hdr *hdrs);
int ipa3_add_hdr_usr(struct ipa_ioc_add_hdr *hdrs, bool user_only);
int ipa3_reset_hdr(bool user_only);
/*
* Header Processing Context
*/
int ipa3_add_hdr_proc_ctx(struct ipa_ioc_add_hdr_proc_ctx *proc_ctxs,
bool user_only);
int ipa3_add_rtp_hdr_proc_ctx(struct ipa_ioc_add_hdr_proc_ctx *proc_ctxs,
struct ipa_rtp_hdr_proc_ctx_params rtp_params, bool user_only);
int ipa3_del_hdr_proc_ctx(struct ipa_ioc_del_hdr_proc_ctx *hdls);
/*
* Routing
*/
int ipa3_add_rt_rule_v2(struct ipa_ioc_add_rt_rule_v2 *rules);
int ipa3_add_rt_rule_usr(struct ipa_ioc_add_rt_rule *rules, bool user_only);
int ipa3_add_rt_rule_usr_v2(struct ipa_ioc_add_rt_rule_v2 *rules,
bool user_only);
int ipa3_del_rt_rule(struct ipa_ioc_del_rt_rule *hdls);
int ipa3_commit_rt(enum ipa_ip_type ip);
int ipa3_reset_rt(enum ipa_ip_type ip, bool user_only);
/*
* Filtering
*/
int ipa3_del_flt_rule(struct ipa_ioc_del_flt_rule *hdls);
int ipa3_mdfy_flt_rule(struct ipa_ioc_mdfy_flt_rule *rules);
int ipa3_mdfy_flt_rule_v2(struct ipa_ioc_mdfy_flt_rule_v2 *rules);
int ipa3_reset_flt(enum ipa_ip_type ip, bool user_only);
/*
* NAT\IPv6CT
*/
int ipa3_allocate_nat_device(struct ipa_ioc_nat_alloc_mem *mem);
int ipa3_allocate_nat_table(struct ipa_ioc_nat_ipv6ct_table_alloc *table_alloc);
int ipa3_allocate_ipv6ct_table(
struct ipa_ioc_nat_ipv6ct_table_alloc *table_alloc);
int ipa3_nat_init_cmd(struct ipa_ioc_v4_nat_init *init);
int ipa3_ipv6ct_init_cmd(struct ipa_ioc_ipv6ct_init *init);
int ipa3_nat_dma_cmd(struct ipa_ioc_nat_dma_cmd *dma);
int ipa3_table_dma_cmd(struct ipa_ioc_nat_dma_cmd *dma);
int ipa3_nat_del_cmd(struct ipa_ioc_v4_nat_del *del);
int ipa3_del_nat_table(struct ipa_ioc_nat_ipv6ct_table_del *del);
int ipa3_del_ipv6ct_table(struct ipa_ioc_nat_ipv6ct_table_del *del);
int ipa3_nat_mdfy_pdn(struct ipa_ioc_nat_pdn_entry *mdfy_pdn);
/*
* Data path
*/
int ipa3_rx_poll(u32 clnt_hdl, int budget);
void ipa3_recycle_wan_skb(struct sk_buff *skb);
/*
* Low lat data path
*/
int ipa3_low_lat_rx_poll(u32 clnt_hdl, int budget);
/*
* System pipes
*/
int ipa3_set_wlan_tx_info(struct ipa_wdi_tx_info *info);
/*
* Tethering bridge (Rmnet / MBIM)
*/
int ipa3_teth_bridge_init(struct teth_bridge_init_params *params);
int ipa3_teth_bridge_disconnect(enum ipa_client_type client);
int ipa3_teth_bridge_connect(struct teth_bridge_connect_params *connect_params);
/*
* Tethering client info
*/
void ipa3_set_client(int index, enum ipacm_client_enum client, bool uplink);
enum ipacm_client_enum ipa3_get_client(int pipe_idx);
bool ipa3_get_client_uplink(int pipe_idx);
/*
* mux id
*/
int ipa3_write_qmap_id(struct ipa_ioc_write_qmapid *param_in);
/*
* interrupts
*/
int ipa3_remove_interrupt_handler(enum ipa_irq_type interrupt);
/*
* Interface
*/
int ipa3_register_intf_ext(const char *name, const struct ipa_tx_intf *tx,
const struct ipa_rx_intf *rx,
const struct ipa_ext_intf *ext);
/*
* Miscellaneous
*/
int ipa3_uc_debug_stats_alloc(
struct IpaHwOffloadStatsAllocCmdData_t cmdinfo);
int ipa3_uc_debug_stats_dealloc(uint32_t protocol);
void ipa3_get_gsi_stats(int prot_id,
struct ipa_uc_dbg_ring_stats *stats);
int ipa3_get_prot_id(enum ipa_client_type client);
/**
* ipa_tz_unlock_reg - Unlocks memory regions so that they become accessible
* from AP.
* @reg_info - Pointer to array of memory regions to unlock
* @num_regs - Number of elements in the array
*
* Converts the input array of regions to a struct that TZ understands and
* issues an SCM call.
* Also flushes the memory cache to DDR in order to make sure that TZ sees the
* correct data structure.
*
* Returns: 0 on success, negative on failure
*/
int ipa3_tz_unlock_reg(struct ipa_tz_unlock_reg_info *reg_info, u16 num_regs);
int ipa_eth_rtk_connect(
struct ipa_eth_client_pipe_info *pipe,
enum ipa_client_type client_type);
int ipa_eth_aqc_connect(
struct ipa_eth_client_pipe_info *pipe,
enum ipa_client_type client_type);
int ipa_eth_emac_connect(
struct ipa_eth_client_pipe_info *pipe,
enum ipa_client_type client_type);
int ipa_eth_rtk_disconnect(
struct ipa_eth_client_pipe_info *pipe,
enum ipa_client_type client_type);
int ipa_eth_aqc_disconnect(
struct ipa_eth_client_pipe_info *pipe,
enum ipa_client_type client_type);
int ipa_eth_emac_disconnect(
struct ipa_eth_client_pipe_info *pipe,
enum ipa_client_type client_type);
#if IPA_ETH_API_VER < 2
int ipa_eth_client_conn_evt(struct ipa_ecm_msg *msg);
int ipa_eth_client_disconn_evt(struct ipa_ecm_msg *msg);
#endif
/* ULSO mode Query */
bool ipa3_is_ulso_supported(void);
/* IPA_PACKET_INIT_EX IC to pipe API */
int ipa_set_pkt_init_ex_hdr_ofst(
struct ipa_pkt_init_ex_hdr_ofst_set *lookup, bool proc_ctx);
/* IPA stats pm functions */
int ipa_pm_get_scaling_bw_levels(struct ipa_lnx_clock_stats *clock_stats);
int ipa_pm_get_aggregated_throughput(void);
int ipa_pm_get_current_clk_vote(void);
bool ipa_get_pm_client_stats_filled(struct pm_client_stats *pm_stats_ptr,
int pm_client_index);
int ipa_pm_get_pm_clnt_throughput(enum ipa_client_type client_type);
struct sk_buff* qmap_encapsulate_skb(struct sk_buff *skb, const struct qmap_hdr *qh);
int ipa_hdrs_hpc_destroy(u32 hdr_hdl);
#endif /* _IPA_COMMON_I_H_ */

757
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_rm.c Normal file
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@ -0,0 +1,757 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
*/
#include <linux/slab.h>
#include <linux/workqueue.h>
#include "ipa.h"
#include "ipa_rm_dependency_graph.h"
#include "ipa_rm_i.h"
#include "ipa_common_i.h"
static const char *resource_name_to_str[IPA_RM_RESOURCE_MAX] = {
__stringify(IPA_RM_RESOURCE_Q6_PROD),
__stringify(IPA_RM_RESOURCE_Q6_CONS),
__stringify(IPA_RM_RESOURCE_USB_PROD),
__stringify(IPA_RM_RESOURCE_USB_CONS),
__stringify(IPA_RM_RESOURCE_USB_DPL_DUMMY_PROD),
__stringify(IPA_RM_RESOURCE_USB_DPL_CONS),
__stringify(IPA_RM_RESOURCE_HSIC_PROD),
__stringify(IPA_RM_RESOURCE_HSIC_CONS),
__stringify(IPA_RM_RESOURCE_STD_ECM_PROD),
__stringify(IPA_RM_RESOURCE_APPS_CONS),
__stringify(IPA_RM_RESOURCE_RNDIS_PROD),
__stringify(RESERVED_CONS_11),
__stringify(IPA_RM_RESOURCE_WWAN_0_PROD),
__stringify(RESERVED_CONS_13),
__stringify(IPA_RM_RESOURCE_WLAN_PROD),
__stringify(IPA_RM_RESOURCE_WLAN_CONS),
__stringify(IPA_RM_RESOURCE_ODU_ADAPT_PROD),
__stringify(IPA_RM_RESOURCE_ODU_ADAPT_CONS),
__stringify(IPA_RM_RESOURCE_MHI_PROD),
__stringify(IPA_RM_RESOURCE_MHI_CONS),
__stringify(IPA_RM_RESOURCE_ETHERNET_PROD),
__stringify(IPA_RM_RESOURCE_ETHERNET_CONS),
};
struct ipa_rm_profile_vote_type {
enum ipa_voltage_level volt[IPA_RM_RESOURCE_MAX];
enum ipa_voltage_level curr_volt;
u32 bw_resources[IPA_RM_RESOURCE_MAX];
u32 curr_bw;
};
struct ipa_rm_context_type {
struct ipa_rm_dep_graph *dep_graph;
struct workqueue_struct *ipa_rm_wq;
spinlock_t ipa_rm_lock;
struct ipa_rm_profile_vote_type prof_vote;
};
static struct ipa_rm_context_type *ipa_rm_ctx;
struct ipa_rm_notify_ipa_work_type {
struct work_struct work;
enum ipa_voltage_level volt;
u32 bandwidth_mbps;
};
static int _ipa_rm_add_dependency(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name,
bool userspace_dep)
{
unsigned long flags;
int result;
if (unlikely(!ipa_rm_ctx)) {
IPA_RM_ERR("IPA RM was not initialized\n");
return -EINVAL;
}
IPA_RM_DBG("%s -> %s\n", ipa_rm_resource_str(resource_name),
ipa_rm_resource_str(depends_on_name));
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
result = ipa_rm_dep_graph_add_dependency(
ipa_rm_ctx->dep_graph,
resource_name,
depends_on_name,
userspace_dep);
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
IPA_RM_DBG("EXIT with %d\n", result);
return result;
}
/**
* ipa_rm_add_dependency_from_ioctl() - create dependency between 2 resources
* @resource_name: name of dependent resource
* @depends_on_name: name of its dependency
*
* This function is expected to be called from IOCTL and the dependency will be
* marked as is was added by the userspace.
*
* Returns: 0 on success, negative on failure
*
* Side effects: IPA_RM_RESORCE_GRANTED could be generated
* in case client registered with IPA RM
*/
int ipa_rm_add_dependency_from_ioctl(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name)
{
return _ipa_rm_add_dependency(resource_name, depends_on_name, true);
}
static int _ipa_rm_add_dependency_sync(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name,
bool userspsace_dep)
{
int result;
struct ipa_rm_resource *consumer;
unsigned long time;
unsigned long flags;
if (unlikely(!ipa_rm_ctx)) {
IPA_RM_ERR("IPA RM was not initialized\n");
return -EINVAL;
}
IPA_RM_DBG("%s -> %s\n", ipa_rm_resource_str(resource_name),
ipa_rm_resource_str(depends_on_name));
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
result = ipa_rm_dep_graph_add_dependency(
ipa_rm_ctx->dep_graph,
resource_name,
depends_on_name,
userspsace_dep);
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
if (result == -EINPROGRESS) {
ipa_rm_dep_graph_get_resource(ipa_rm_ctx->dep_graph,
depends_on_name,
&consumer);
IPA_RM_DBG("%s waits for GRANT of %s.\n",
ipa_rm_resource_str(resource_name),
ipa_rm_resource_str(depends_on_name));
time = wait_for_completion_timeout(
&((struct ipa_rm_resource_cons *)consumer)->
request_consumer_in_progress,
HZ * 5);
result = 0;
if (!time) {
IPA_RM_ERR("TIMEOUT waiting for %s GRANT event.",
ipa_rm_resource_str(depends_on_name));
result = -ETIME;
} else {
IPA_RM_DBG("%s waited for %s GRANT %lu time.\n",
ipa_rm_resource_str(resource_name),
ipa_rm_resource_str(depends_on_name),
time);
}
}
IPA_RM_DBG("EXIT with %d\n", result);
return result;
}
/**
* ipa_rm_add_dependency_sync_from_ioctl() - Create a dependency between 2
* resources in a synchronized fashion. In case a producer resource is in
* GRANTED state and the newly added consumer resource is in RELEASED state,
* the consumer entity will be requested and the function will block until
* the consumer is granted.
* @resource_name: name of dependent resource
* @depends_on_name: name of its dependency
*
* Returns: 0 on success, negative on failure
*
* Side effects: May block. See documentation above.
*/
int ipa_rm_add_dependency_sync_from_ioctl(
enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name)
{
return _ipa_rm_add_dependency_sync(resource_name, depends_on_name,
true);
}
static int _ipa_rm_delete_dependency(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name,
bool userspace_dep)
{
unsigned long flags;
int result;
if (unlikely(!ipa_rm_ctx)) {
IPA_RM_ERR("IPA RM was not initialized\n");
return -EINVAL;
}
IPA_RM_DBG("%s -> %s\n", ipa_rm_resource_str(resource_name),
ipa_rm_resource_str(depends_on_name));
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
result = ipa_rm_dep_graph_delete_dependency(
ipa_rm_ctx->dep_graph,
resource_name,
depends_on_name,
userspace_dep);
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
IPA_RM_DBG("EXIT with %d\n", result);
return result;
}
/**
* ipa_rm_delete_dependency_fron_ioctl() - delete dependency between 2 resources
* @resource_name: name of dependent resource
* @depends_on_name: name of its dependency
*
* This function is expected to be called from IOCTL and the dependency will be
* marked as is was added by the userspace.
*
* Returns: 0 on success, negative on failure
*
* Side effects: IPA_RM_RESORCE_GRANTED could be generated
* in case client registered with IPA RM
*/
int ipa_rm_delete_dependency_from_ioctl(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name)
{
return _ipa_rm_delete_dependency(resource_name, depends_on_name, true);
}
void delayed_release_work_func(struct work_struct *work)
{
unsigned long flags;
struct ipa_rm_resource *resource;
struct ipa_rm_delayed_release_work_type *rwork = container_of(
to_delayed_work(work),
struct ipa_rm_delayed_release_work_type,
work);
if (!IPA_RM_RESORCE_IS_CONS(rwork->resource_name)) {
IPA_RM_ERR("can be called on CONS only\n");
kfree(rwork);
return;
}
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
if (ipa_rm_dep_graph_get_resource(ipa_rm_ctx->dep_graph,
rwork->resource_name,
&resource) != 0) {
IPA_RM_ERR("resource does not exists\n");
goto bail;
}
ipa_rm_resource_consumer_release(
(struct ipa_rm_resource_cons *)resource, rwork->needed_bw,
rwork->dec_usage_count);
bail:
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
kfree(rwork);
}
/**
* ipa_rm_request_resource_with_timer() - requests the specified consumer
* resource and releases it after 1 second
* @resource_name: name of the requested resource
*
* Returns: 0 on success, negative on failure
*/
int ipa_rm_request_resource_with_timer(enum ipa_rm_resource_name resource_name)
{
unsigned long flags;
struct ipa_rm_resource *resource;
struct ipa_rm_delayed_release_work_type *release_work;
int result;
if (!IPA_RM_RESORCE_IS_CONS(resource_name)) {
IPA_RM_ERR("can be called on CONS only\n");
return -EINVAL;
}
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
if (ipa_rm_dep_graph_get_resource(ipa_rm_ctx->dep_graph,
resource_name,
&resource) != 0) {
IPA_RM_ERR("resource does not exists\n");
result = -EPERM;
goto bail;
}
result = ipa_rm_resource_consumer_request(
(struct ipa_rm_resource_cons *)resource, 0, false, true);
if (result != 0 && result != -EINPROGRESS) {
IPA_RM_ERR("consumer request returned error %d\n", result);
result = -EPERM;
goto bail;
}
release_work = kzalloc(sizeof(*release_work), GFP_ATOMIC);
if (!release_work) {
result = -ENOMEM;
goto bail;
}
release_work->resource_name = resource->name;
release_work->needed_bw = 0;
release_work->dec_usage_count = false;
INIT_DELAYED_WORK(&release_work->work, delayed_release_work_func);
schedule_delayed_work(&release_work->work,
msecs_to_jiffies(IPA_RM_RELEASE_DELAY_IN_MSEC));
result = 0;
bail:
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
return result;
}
static void ipa_rm_wq_handler(struct work_struct *work)
{
unsigned long flags;
struct ipa_rm_resource *resource;
struct ipa_rm_wq_work_type *ipa_rm_work =
container_of(work,
struct ipa_rm_wq_work_type,
work);
IPA_RM_DBG_LOW("%s cmd=%d event=%d notify_registered_only=%d\n",
ipa_rm_resource_str(ipa_rm_work->resource_name),
ipa_rm_work->wq_cmd,
ipa_rm_work->event,
ipa_rm_work->notify_registered_only);
switch (ipa_rm_work->wq_cmd) {
case IPA_RM_WQ_NOTIFY_PROD:
if (!IPA_RM_RESORCE_IS_PROD(ipa_rm_work->resource_name)) {
IPA_RM_ERR("resource is not PROD\n");
goto free_work;
}
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
if (ipa_rm_dep_graph_get_resource(ipa_rm_ctx->dep_graph,
ipa_rm_work->resource_name,
&resource) != 0){
IPA_RM_ERR("resource does not exists\n");
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
goto free_work;
}
ipa_rm_resource_producer_notify_clients(
(struct ipa_rm_resource_prod *)resource,
ipa_rm_work->event,
ipa_rm_work->notify_registered_only);
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
break;
case IPA_RM_WQ_NOTIFY_CONS:
break;
case IPA_RM_WQ_RESOURCE_CB:
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
if (ipa_rm_dep_graph_get_resource(ipa_rm_ctx->dep_graph,
ipa_rm_work->resource_name,
&resource) != 0){
IPA_RM_ERR("resource does not exists\n");
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
goto free_work;
}
ipa_rm_resource_consumer_handle_cb(
(struct ipa_rm_resource_cons *)resource,
ipa_rm_work->event);
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
break;
default:
break;
}
free_work:
kfree((void *) work);
}
static void ipa_rm_wq_resume_handler(struct work_struct *work)
{
unsigned long flags;
struct ipa_rm_resource *resource;
struct ipa_rm_wq_suspend_resume_work_type *ipa_rm_work =
container_of(work,
struct ipa_rm_wq_suspend_resume_work_type,
work);
IPA_RM_DBG_LOW("resume work handler: %s",
ipa_rm_resource_str(ipa_rm_work->resource_name));
if (!IPA_RM_RESORCE_IS_CONS(ipa_rm_work->resource_name)) {
IPA_RM_ERR("resource is not CONS\n");
return;
}
IPA_ACTIVE_CLIENTS_INC_RESOURCE(ipa_rm_resource_str(
ipa_rm_work->resource_name));
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
if (ipa_rm_dep_graph_get_resource(ipa_rm_ctx->dep_graph,
ipa_rm_work->resource_name,
&resource) != 0){
IPA_RM_ERR("resource does not exists\n");
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
IPA_ACTIVE_CLIENTS_DEC_RESOURCE(ipa_rm_resource_str(
ipa_rm_work->resource_name));
goto bail;
}
ipa_rm_resource_consumer_request_work(
(struct ipa_rm_resource_cons *)resource,
ipa_rm_work->prev_state, ipa_rm_work->needed_bw, true,
ipa_rm_work->inc_usage_count);
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
bail:
kfree(ipa_rm_work);
}
static void ipa_rm_wq_suspend_handler(struct work_struct *work)
{
unsigned long flags;
struct ipa_rm_resource *resource;
struct ipa_rm_wq_suspend_resume_work_type *ipa_rm_work =
container_of(work,
struct ipa_rm_wq_suspend_resume_work_type,
work);
IPA_RM_DBG_LOW("suspend work handler: %s",
ipa_rm_resource_str(ipa_rm_work->resource_name));
if (!IPA_RM_RESORCE_IS_CONS(ipa_rm_work->resource_name)) {
IPA_RM_ERR("resource is not CONS\n");
return;
}
ipa3_suspend_resource_sync(ipa_rm_work->resource_name);
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
if (ipa_rm_dep_graph_get_resource(ipa_rm_ctx->dep_graph,
ipa_rm_work->resource_name,
&resource) != 0){
IPA_RM_ERR("resource does not exists\n");
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
return;
}
ipa_rm_resource_consumer_release_work(
(struct ipa_rm_resource_cons *)resource,
ipa_rm_work->prev_state,
true);
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
kfree(ipa_rm_work);
}
/**
* ipa_rm_wq_send_cmd() - send a command for deferred work
* @wq_cmd: command that should be executed
* @resource_name: resource on which command should be executed
* @notify_registered_only: notify only clients registered by
* ipa_rm_register()
*
* Returns: 0 on success, negative otherwise
*/
int ipa_rm_wq_send_cmd(enum ipa_rm_wq_cmd wq_cmd,
enum ipa_rm_resource_name resource_name,
enum ipa_rm_event event,
bool notify_registered_only)
{
int result = -ENOMEM;
struct ipa_rm_wq_work_type *work = kzalloc(sizeof(*work), GFP_ATOMIC);
if (work) {
INIT_WORK((struct work_struct *)work, ipa_rm_wq_handler);
work->wq_cmd = wq_cmd;
work->resource_name = resource_name;
work->event = event;
work->notify_registered_only = notify_registered_only;
result = queue_work(ipa_rm_ctx->ipa_rm_wq,
(struct work_struct *)work);
}
return result;
}
int ipa_rm_wq_send_suspend_cmd(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_state prev_state,
u32 needed_bw)
{
int result = -ENOMEM;
struct ipa_rm_wq_suspend_resume_work_type *work = kzalloc(sizeof(*work),
GFP_ATOMIC);
if (work) {
INIT_WORK((struct work_struct *)work,
ipa_rm_wq_suspend_handler);
work->resource_name = resource_name;
work->prev_state = prev_state;
work->needed_bw = needed_bw;
result = queue_work(ipa_rm_ctx->ipa_rm_wq,
(struct work_struct *)work);
}
return result;
}
int ipa_rm_wq_send_resume_cmd(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_state prev_state,
u32 needed_bw,
bool inc_usage_count)
{
int result = -ENOMEM;
struct ipa_rm_wq_suspend_resume_work_type *work = kzalloc(sizeof(*work),
GFP_ATOMIC);
if (work) {
INIT_WORK((struct work_struct *)work, ipa_rm_wq_resume_handler);
work->resource_name = resource_name;
work->prev_state = prev_state;
work->needed_bw = needed_bw;
work->inc_usage_count = inc_usage_count;
result = queue_work(ipa_rm_ctx->ipa_rm_wq,
(struct work_struct *)work);
} else {
IPA_RM_ERR("no mem\n");
}
return result;
}
/**
* ipa_rm_initialize() - initialize IPA RM component
*
* Returns: 0 on success, negative otherwise
*/
int ipa_rm_initialize(void)
{
int result;
ipa_rm_ctx = kzalloc(sizeof(*ipa_rm_ctx), GFP_KERNEL);
if (!ipa_rm_ctx) {
IPA_RM_ERR("no mem\n");
result = -ENOMEM;
goto bail;
}
ipa_rm_ctx->ipa_rm_wq = create_singlethread_workqueue("ipa_rm_wq");
if (!ipa_rm_ctx->ipa_rm_wq) {
IPA_RM_ERR("create workqueue failed\n");
result = -ENOMEM;
goto create_wq_fail;
}
result = ipa_rm_dep_graph_create(&(ipa_rm_ctx->dep_graph));
if (result) {
IPA_RM_ERR("create dependency graph failed\n");
goto graph_alloc_fail;
}
spin_lock_init(&ipa_rm_ctx->ipa_rm_lock);
IPA_RM_DBG("SUCCESS\n");
return 0;
graph_alloc_fail:
destroy_workqueue(ipa_rm_ctx->ipa_rm_wq);
create_wq_fail:
kfree(ipa_rm_ctx);
bail:
return result;
}
/**
* ipa_rm_stat() - print RM stat
* @buf: [in] The user buff used to print
* @size: [in] The size of buf
* Returns: number of bytes used on success, negative on failure
*
* This function is called by ipa_debugfs in order to receive
* a full picture of the current state of the RM
*/
int ipa_rm_stat(char *buf, int size)
{
unsigned long flags;
int i, cnt = 0, result = EINVAL;
struct ipa_rm_resource *resource = NULL;
u32 sum_bw_prod = 0;
u32 sum_bw_cons = 0;
if (!buf || size < 0)
return result;
spin_lock_irqsave(&ipa_rm_ctx->ipa_rm_lock, flags);
for (i = 0; i < IPA_RM_RESOURCE_MAX; ++i) {
if (!IPA_RM_RESORCE_IS_PROD(i))
continue;
result = ipa_rm_dep_graph_get_resource(
ipa_rm_ctx->dep_graph,
i,
&resource);
if (!result) {
result = ipa_rm_resource_producer_print_stat(
resource, buf + cnt,
size-cnt);
if (result < 0)
goto bail;
cnt += result;
}
}
for (i = 0; i < IPA_RM_RESOURCE_MAX; i++) {
if (IPA_RM_RESORCE_IS_PROD(i))
sum_bw_prod += ipa_rm_ctx->prof_vote.bw_resources[i];
else
sum_bw_cons += ipa_rm_ctx->prof_vote.bw_resources[i];
}
result = scnprintf(buf + cnt, size - cnt,
"All prod bandwidth: %d, All cons bandwidth: %d\n",
sum_bw_prod, sum_bw_cons);
cnt += result;
result = scnprintf(buf + cnt, size - cnt,
"Voting: voltage %d, bandwidth %d\n",
ipa_rm_ctx->prof_vote.curr_volt,
ipa_rm_ctx->prof_vote.curr_bw);
cnt += result;
result = cnt;
bail:
spin_unlock_irqrestore(&ipa_rm_ctx->ipa_rm_lock, flags);
return result;
}
/**
* ipa_rm_resource_str() - returns string that represent the resource
* @resource_name: [in] resource name
*/
const char *ipa_rm_resource_str(enum ipa_rm_resource_name resource_name)
{
if (resource_name < 0 || resource_name >= IPA_RM_RESOURCE_MAX)
return "INVALID RESOURCE";
return resource_name_to_str[resource_name];
};
static void ipa_rm_perf_profile_notify_to_ipa_work(struct work_struct *work)
{
struct ipa_rm_notify_ipa_work_type *notify_work = container_of(work,
struct ipa_rm_notify_ipa_work_type,
work);
int res;
IPA_RM_DBG_LOW("calling to IPA driver. voltage %d bandwidth %d\n",
notify_work->volt, notify_work->bandwidth_mbps);
res = ipa3_set_required_perf_profile(notify_work->volt,
notify_work->bandwidth_mbps);
if (res) {
IPA_RM_ERR("ipa3_set_required_perf_profile failed %d\n", res);
goto bail;
}
IPA_RM_DBG_LOW("IPA driver notified\n");
bail:
kfree(notify_work);
}
static void ipa_rm_perf_profile_notify_to_ipa(enum ipa_voltage_level volt,
u32 bandwidth)
{
struct ipa_rm_notify_ipa_work_type *work;
work = kzalloc(sizeof(*work), GFP_ATOMIC);
if (!work)
return;
INIT_WORK(&work->work, ipa_rm_perf_profile_notify_to_ipa_work);
work->volt = volt;
work->bandwidth_mbps = bandwidth;
queue_work(ipa_rm_ctx->ipa_rm_wq, &work->work);
}
/**
* ipa_rm_perf_profile_change() - change performance profile vote for resource
* @resource_name: [in] resource name
*
* change bandwidth and voltage vote based on resource state.
*/
void ipa_rm_perf_profile_change(enum ipa_rm_resource_name resource_name)
{
enum ipa_voltage_level old_volt;
u32 *bw_ptr;
u32 old_bw;
struct ipa_rm_resource *resource;
int i;
u32 sum_bw_prod = 0;
u32 sum_bw_cons = 0;
IPA_RM_DBG_LOW("%s\n", ipa_rm_resource_str(resource_name));
if (ipa_rm_dep_graph_get_resource(ipa_rm_ctx->dep_graph,
resource_name,
&resource) != 0) {
IPA_RM_ERR("resource does not exists\n");
WARN_ON(1);
return;
}
old_volt = ipa_rm_ctx->prof_vote.curr_volt;
old_bw = ipa_rm_ctx->prof_vote.curr_bw;
bw_ptr = &ipa_rm_ctx->prof_vote.bw_resources[resource_name];
switch (resource->state) {
case IPA_RM_GRANTED:
case IPA_RM_REQUEST_IN_PROGRESS:
IPA_RM_DBG_LOW("max_bw = %d, needed_bw = %d\n",
resource->max_bw, resource->needed_bw);
*bw_ptr = min(resource->max_bw, resource->needed_bw);
ipa_rm_ctx->prof_vote.volt[resource_name] =
resource->floor_voltage;
break;
case IPA_RM_RELEASE_IN_PROGRESS:
case IPA_RM_RELEASED:
*bw_ptr = 0;
ipa_rm_ctx->prof_vote.volt[resource_name] = 0;
break;
default:
IPA_RM_ERR("unknown state %d\n", resource->state);
WARN_ON(1);
return;
}
IPA_RM_DBG_LOW("resource bandwidth: %d voltage: %d\n", *bw_ptr,
resource->floor_voltage);
ipa_rm_ctx->prof_vote.curr_volt = IPA_VOLTAGE_UNSPECIFIED;
for (i = 0; i < IPA_RM_RESOURCE_MAX; i++) {
if (ipa_rm_ctx->prof_vote.volt[i] >
ipa_rm_ctx->prof_vote.curr_volt) {
ipa_rm_ctx->prof_vote.curr_volt =
ipa_rm_ctx->prof_vote.volt[i];
}
}
for (i = 0; i < IPA_RM_RESOURCE_MAX; i++) {
if (IPA_RM_RESORCE_IS_PROD(i))
sum_bw_prod += ipa_rm_ctx->prof_vote.bw_resources[i];
else
sum_bw_cons += ipa_rm_ctx->prof_vote.bw_resources[i];
}
IPA_RM_DBG_LOW("all prod bandwidth: %d all cons bandwidth: %d\n",
sum_bw_prod, sum_bw_cons);
ipa_rm_ctx->prof_vote.curr_bw = min(sum_bw_prod, sum_bw_cons);
if (ipa_rm_ctx->prof_vote.curr_volt == old_volt &&
ipa_rm_ctx->prof_vote.curr_bw == old_bw) {
IPA_RM_DBG_LOW("same voting\n");
return;
}
IPA_RM_DBG_LOW("new voting: voltage %d bandwidth %d\n",
ipa_rm_ctx->prof_vote.curr_volt,
ipa_rm_ctx->prof_vote.curr_bw);
ipa_rm_perf_profile_notify_to_ipa(ipa_rm_ctx->prof_vote.curr_volt,
ipa_rm_ctx->prof_vote.curr_bw);
return;
};
/**
* ipa_rm_exit() - free all IPA RM resources
*/
void ipa_rm_exit(void)
{
IPA_RM_DBG("ENTER\n");
ipa_rm_dep_graph_delete(ipa_rm_ctx->dep_graph);
destroy_workqueue(ipa_rm_ctx->ipa_rm_wq);
kfree(ipa_rm_ctx);
ipa_rm_ctx = NULL;
IPA_RM_DBG("EXIT\n");
}

240
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_rm_dependency_graph.c Normal file
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@ -0,0 +1,240 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
*/
#include <linux/slab.h>
#include "ipa_rm_dependency_graph.h"
#include "ipa_rm_i.h"
static int ipa_rm_dep_get_index(enum ipa_rm_resource_name resource_name)
{
int resource_index = IPA_RM_INDEX_INVALID;
if (IPA_RM_RESORCE_IS_PROD(resource_name))
resource_index = ipa_rm_prod_index(resource_name);
else if (IPA_RM_RESORCE_IS_CONS(resource_name))
resource_index = ipa_rm_cons_index(resource_name);
return resource_index;
}
/**
* ipa_rm_dep_graph_create() - creates graph
* @dep_graph: [out] created dependency graph
*
* Returns: dependency graph on success, NULL on failure
*/
int ipa_rm_dep_graph_create(struct ipa_rm_dep_graph **dep_graph)
{
int result = 0;
*dep_graph = kzalloc(sizeof(**dep_graph), GFP_KERNEL);
if (!*dep_graph)
result = -ENOMEM;
return result;
}
/**
* ipa_rm_dep_graph_delete() - destroyes the graph
* @graph: [in] dependency graph
*
* Frees all resources.
*/
void ipa_rm_dep_graph_delete(struct ipa_rm_dep_graph *graph)
{
int resource_index;
if (!graph) {
IPA_RM_ERR("invalid params\n");
return;
}
for (resource_index = 0;
resource_index < IPA_RM_RESOURCE_MAX;
resource_index++)
kfree(graph->resource_table[resource_index]);
memset(graph->resource_table, 0, sizeof(graph->resource_table));
}
/**
* ipa_rm_dep_graph_get_resource() - provides a resource by name
* @graph: [in] dependency graph
* @name: [in] name of the resource
* @resource: [out] resource in case of success
*
* Returns: 0 on success, negative on failure
*/
int ipa_rm_dep_graph_get_resource(
struct ipa_rm_dep_graph *graph,
enum ipa_rm_resource_name resource_name,
struct ipa_rm_resource **resource)
{
int result;
int resource_index;
if (!graph) {
result = -EINVAL;
goto bail;
}
resource_index = ipa_rm_dep_get_index(resource_name);
if (resource_index == IPA_RM_INDEX_INVALID) {
result = -EINVAL;
goto bail;
}
*resource = graph->resource_table[resource_index];
if (!*resource) {
result = -EINVAL;
goto bail;
}
result = 0;
bail:
return result;
}
/**
* ipa_rm_dep_graph_add() - adds resource to graph
* @graph: [in] dependency graph
* @resource: [in] resource to add
*
* Returns: 0 on success, negative on failure
*/
int ipa_rm_dep_graph_add(struct ipa_rm_dep_graph *graph,
struct ipa_rm_resource *resource)
{
int result = 0;
int resource_index;
if (!graph || !resource) {
result = -EINVAL;
goto bail;
}
resource_index = ipa_rm_dep_get_index(resource->name);
if (resource_index == IPA_RM_INDEX_INVALID) {
result = -EINVAL;
goto bail;
}
graph->resource_table[resource_index] = resource;
bail:
return result;
}
/**
* ipa_rm_dep_graph_remove() - removes resource from graph
* @graph: [in] dependency graph
* @resource: [in] resource to add
*
* Returns: 0 on success, negative on failure
*/
int ipa_rm_dep_graph_remove(struct ipa_rm_dep_graph *graph,
enum ipa_rm_resource_name resource_name)
{
if (!graph)
return -EINVAL;
graph->resource_table[resource_name] = NULL;
return 0;
}
/**
* ipa_rm_dep_graph_add_dependency() - adds dependency between
* two nodes in graph
* @graph: [in] dependency graph
* @resource_name: [in] resource to add
* @depends_on_name: [in] resource to add
* @userspace_dep: [in] operation requested by userspace ?
*
* Returns: 0 on success, negative on failure
*/
int ipa_rm_dep_graph_add_dependency(struct ipa_rm_dep_graph *graph,
enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name,
bool userspace_dep)
{
struct ipa_rm_resource *dependent = NULL;
struct ipa_rm_resource *dependency = NULL;
int result;
if (!graph ||
!IPA_RM_RESORCE_IS_PROD(resource_name) ||
!IPA_RM_RESORCE_IS_CONS(depends_on_name)) {
IPA_RM_ERR("invalid params\n");
result = -EINVAL;
goto bail;
}
if (ipa_rm_dep_graph_get_resource(graph,
resource_name,
&dependent)) {
IPA_RM_ERR("%s does not exist\n",
ipa_rm_resource_str(resource_name));
result = -EINVAL;
goto bail;
}
if (ipa_rm_dep_graph_get_resource(graph,
depends_on_name,
&dependency)) {
IPA_RM_ERR("%s does not exist\n",
ipa_rm_resource_str(depends_on_name));
result = -EINVAL;
goto bail;
}
result = ipa_rm_resource_add_dependency(dependent, dependency,
userspace_dep);
bail:
IPA_RM_DBG("EXIT with %d\n", result);
return result;
}
/**
* ipa_rm_dep_graph_delete_dependency() - deleted dependency between
* two nodes in graph
* @graph: [in] dependency graph
* @resource_name: [in] resource to delete
* @depends_on_name: [in] resource to delete
* @userspace_dep: [in] operation requested by userspace ?
*
* Returns: 0 on success, negative on failure
*
*/
int ipa_rm_dep_graph_delete_dependency(struct ipa_rm_dep_graph *graph,
enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name,
bool userspace_dep)
{
struct ipa_rm_resource *dependent = NULL;
struct ipa_rm_resource *dependency = NULL;
int result;
if (!graph ||
!IPA_RM_RESORCE_IS_PROD(resource_name) ||
!IPA_RM_RESORCE_IS_CONS(depends_on_name)) {
IPA_RM_ERR("invalid params\n");
result = -EINVAL;
goto bail;
}
if (ipa_rm_dep_graph_get_resource(graph,
resource_name,
&dependent)) {
IPA_RM_DBG("%s does not exist\n",
ipa_rm_resource_str(resource_name));
result = -EINVAL;
goto bail;
}
if (ipa_rm_dep_graph_get_resource(graph,
depends_on_name,
&dependency)) {
IPA_RM_DBG("%s does not exist\n",
ipa_rm_resource_str(depends_on_name));
result = -EINVAL;
goto bail;
}
result = ipa_rm_resource_delete_dependency(dependent, dependency,
userspace_dep);
bail:
IPA_RM_DBG("EXIT with %d\n", result);
return result;
}

42
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_rm_dependency_graph.h Normal file
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@ -0,0 +1,42 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
*/
#ifndef _IPA_RM_DEPENDENCY_GRAPH_H_
#define _IPA_RM_DEPENDENCY_GRAPH_H_
#include <linux/list.h>
#include "ipa.h"
#include "ipa_rm_resource.h"
struct ipa_rm_dep_graph {
struct ipa_rm_resource *resource_table[IPA_RM_RESOURCE_MAX];
};
int ipa_rm_dep_graph_get_resource(
struct ipa_rm_dep_graph *graph,
enum ipa_rm_resource_name name,
struct ipa_rm_resource **resource);
int ipa_rm_dep_graph_create(struct ipa_rm_dep_graph **dep_graph);
void ipa_rm_dep_graph_delete(struct ipa_rm_dep_graph *graph);
int ipa_rm_dep_graph_add(struct ipa_rm_dep_graph *graph,
struct ipa_rm_resource *resource);
int ipa_rm_dep_graph_remove(struct ipa_rm_dep_graph *graph,
enum ipa_rm_resource_name resource_name);
int ipa_rm_dep_graph_add_dependency(struct ipa_rm_dep_graph *graph,
enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name,
bool userspsace_dep);
int ipa_rm_dep_graph_delete_dependency(struct ipa_rm_dep_graph *graph,
enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name,
bool userspsace_dep);
#endif /* _IPA_RM_DEPENDENCY_GRAPH_H_ */

150
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_rm_i.h Normal file
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@ -0,0 +1,150 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
*/
#ifndef _IPA_RM_I_H_
#define _IPA_RM_I_H_
#include <linux/workqueue.h>
#include "ipa.h"
#include "ipa_rm_resource.h"
#include "ipa_common_i.h"
#define IPA_RM_DRV_NAME "ipa_rm"
#define IPA_RM_DBG_LOW(fmt, args...) \
do { \
pr_debug(IPA_RM_DRV_NAME " %s:%d " fmt, __func__, __LINE__, \
## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf_low(), \
IPA_RM_DRV_NAME " %s:%d " fmt, ## args); \
} while (0)
#define IPA_RM_DBG(fmt, args...) \
do { \
pr_debug(IPA_RM_DRV_NAME " %s:%d " fmt, __func__, __LINE__, \
## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf(), \
IPA_RM_DRV_NAME " %s:%d " fmt, ## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf_low(), \
IPA_RM_DRV_NAME " %s:%d " fmt, ## args); \
} while (0)
#define IPA_RM_ERR(fmt, args...) \
do { \
pr_err(IPA_RM_DRV_NAME " %s:%d " fmt, __func__, __LINE__, \
## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf(), \
IPA_RM_DRV_NAME " %s:%d " fmt, ## args); \
IPA_IPC_LOGGING(ipa3_get_ipc_logbuf_low(), \
IPA_RM_DRV_NAME " %s:%d " fmt, ## args); \
} while (0)
#define IPA_RM_RESORCE_IS_PROD(x) \
(x < IPA_RM_RESOURCE_MAX && (x & 0x1) == 0)
#define IPA_RM_RESORCE_IS_CONS(x) \
(x < IPA_RM_RESOURCE_MAX && (x & 0x1) == 1)
#define IPA_RM_INDEX_INVALID (-1)
#define IPA_RM_RELEASE_DELAY_IN_MSEC 1000
int ipa_rm_prod_index(enum ipa_rm_resource_name resource_name);
int ipa_rm_cons_index(enum ipa_rm_resource_name resource_name);
/**
* struct ipa_rm_delayed_release_work_type - IPA RM delayed resource release
* work type
* @delayed_work: work struct
* @ipa_rm_resource_name: name of the resource on which this work should be done
* @needed_bw: bandwidth required for resource in Mbps
* @dec_usage_count: decrease usage count on release ?
*/
struct ipa_rm_delayed_release_work_type {
struct delayed_work work;
enum ipa_rm_resource_name resource_name;
u32 needed_bw;
bool dec_usage_count;
};
/**
* enum ipa_rm_wq_cmd - workqueue commands
*/
enum ipa_rm_wq_cmd {
IPA_RM_WQ_NOTIFY_PROD,
IPA_RM_WQ_NOTIFY_CONS,
IPA_RM_WQ_RESOURCE_CB
};
/**
* struct ipa_rm_wq_work_type - IPA RM worqueue specific
* work type
* @work: work struct
* @wq_cmd: command that should be processed in workqueue context
* @resource_name: name of the resource on which this work
* should be done
* @dep_graph: data structure to search for resource if exists
* @event: event to notify
* @notify_registered_only: notify only clients registered by
* ipa_rm_register()
*/
struct ipa_rm_wq_work_type {
struct work_struct work;
enum ipa_rm_wq_cmd wq_cmd;
enum ipa_rm_resource_name resource_name;
enum ipa_rm_event event;
bool notify_registered_only;
};
/**
* struct ipa_rm_wq_suspend_resume_work_type - IPA RM worqueue resume or
* suspend work type
* @work: work struct
* @resource_name: name of the resource on which this work
* should be done
* @prev_state:
* @needed_bw:
*/
struct ipa_rm_wq_suspend_resume_work_type {
struct work_struct work;
enum ipa_rm_resource_name resource_name;
enum ipa_rm_resource_state prev_state;
u32 needed_bw;
bool inc_usage_count;
};
int ipa_rm_wq_send_cmd(enum ipa_rm_wq_cmd wq_cmd,
enum ipa_rm_resource_name resource_name,
enum ipa_rm_event event,
bool notify_registered_only);
int ipa_rm_wq_send_resume_cmd(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_state prev_state,
u32 needed_bw,
bool inc_usage_count);
int ipa_rm_wq_send_suspend_cmd(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_state prev_state,
u32 needed_bw);
int ipa_rm_initialize(void);
int ipa_rm_stat(char *buf, int size);
const char *ipa_rm_resource_str(enum ipa_rm_resource_name resource_name);
void ipa_rm_perf_profile_change(enum ipa_rm_resource_name resource_name);
int ipa_rm_request_resource_with_timer(enum ipa_rm_resource_name resource_name);
void delayed_release_work_func(struct work_struct *work);
int ipa_rm_add_dependency_from_ioctl(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name);
int ipa_rm_delete_dependency_from_ioctl(enum ipa_rm_resource_name resource_name,
enum ipa_rm_resource_name depends_on_name);
void ipa_rm_exit(void);
#endif /* _IPA_RM_I_H_ */

45
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_rm_inactivity_timer.c Normal file
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
*/
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/timer.h>
#include <linux/unistd.h>
#include <linux/workqueue.h>
#include "ipa.h"
#include "ipa_rm_i.h"
#define MAX_WS_NAME 20
/**
* struct ipa_rm_it_private - IPA RM Inactivity Timer private
* data
* @initied: indicates if instance was initialized
* @lock - spinlock for mutual exclusion
* @resource_name - resource name
* @work: delayed work object for running delayed releas
* function
* @resource_requested: boolean flag indicates if resource was requested
* @reschedule_work: boolean flag indicates to not release and to
* reschedule the release work.
* @work_in_progress: boolean flag indicates is release work was scheduled.
* @jiffies: number of jiffies for timeout
*
* WWAN private - holds all relevant info about WWAN driver
*/
struct ipa_rm_it_private {
bool initied;
enum ipa_rm_resource_name resource_name;
spinlock_t lock;
struct delayed_work work;
bool resource_requested;
bool reschedule_work;
bool work_in_progress;
unsigned long jiffies;
struct wakeup_source *w_lock;
char w_lock_name[MAX_WS_NAME];
};

272
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_rm_peers_list.c Normal file
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved
*/
#include <linux/slab.h>
#include "ipa_rm_i.h"
/**
* ipa_rm_peers_list_get_resource_index() - resource name to index
* of this resource in corresponding peers list
* @resource_name: [in] resource name
*
* Returns: resource index mapping, IPA_RM_INDEX_INVALID
* in case provided resource name isn't contained in enum
* ipa_rm_resource_name.
*
*/
static int ipa_rm_peers_list_get_resource_index(
enum ipa_rm_resource_name resource_name)
{
int resource_index = IPA_RM_INDEX_INVALID;
if (IPA_RM_RESORCE_IS_PROD(resource_name))
resource_index = ipa_rm_prod_index(resource_name);
else if (IPA_RM_RESORCE_IS_CONS(resource_name))
resource_index = ipa_rm_cons_index(resource_name);
return resource_index;
}
static bool ipa_rm_peers_list_check_index(int index,
struct ipa_rm_peers_list *peers_list)
{
return !(index > peers_list->max_peers || index < 0);
}
/**
* ipa_rm_peers_list_create() - creates the peers list
*
* @max_peers: maximum number of peers in new list
* @peers_list: [out] newly created peers list
*
* Returns: 0 in case of SUCCESS, negative otherwise
*/
int ipa_rm_peers_list_create(int max_peers,
struct ipa_rm_peers_list **peers_list)
{
int result;
*peers_list = kzalloc(sizeof(**peers_list), GFP_ATOMIC);
if (!*peers_list) {
IPA_RM_ERR("no mem\n");
result = -ENOMEM;
goto bail;
}
(*peers_list)->max_peers = max_peers;
(*peers_list)->peers = kzalloc((*peers_list)->max_peers *
sizeof(*((*peers_list)->peers)), GFP_ATOMIC);
if (!((*peers_list)->peers)) {
IPA_RM_ERR("no mem\n");
result = -ENOMEM;
goto list_alloc_fail;
}
return 0;
list_alloc_fail:
kfree(*peers_list);
*peers_list = NULL;
bail:
return result;
}
/**
* ipa_rm_peers_list_delete() - deletes the peers list
*
* @peers_list: peers list
*
*/
void ipa_rm_peers_list_delete(struct ipa_rm_peers_list *peers_list)
{
if (peers_list) {
kfree(peers_list->peers);
kfree(peers_list);
}
}
/**
* ipa_rm_peers_list_remove_peer() - removes peer from the list
*
* @peers_list: peers list
* @resource_name: name of the resource to remove
*
*/
void ipa_rm_peers_list_remove_peer(
struct ipa_rm_peers_list *peers_list,
enum ipa_rm_resource_name resource_name)
{
if (!peers_list)
return;
peers_list->peers[ipa_rm_peers_list_get_resource_index(
resource_name)].resource = NULL;
peers_list->peers[ipa_rm_peers_list_get_resource_index(
resource_name)].userspace_dep = false;
peers_list->peers_count--;
}
/**
* ipa_rm_peers_list_add_peer() - adds peer to the list
*
* @peers_list: peers list
* @resource: resource to add
*
*/
void ipa_rm_peers_list_add_peer(
struct ipa_rm_peers_list *peers_list,
struct ipa_rm_resource *resource,
bool userspace_dep)
{
if (!peers_list || !resource)
return;
peers_list->peers[ipa_rm_peers_list_get_resource_index(
resource->name)].resource = resource;
peers_list->peers[ipa_rm_peers_list_get_resource_index(
resource->name)].userspace_dep = userspace_dep;
peers_list->peers_count++;
}
/**
* ipa_rm_peers_list_is_empty() - checks
* if resource peers list is empty
*
* @peers_list: peers list
*
* Returns: true if the list is empty, false otherwise
*/
bool ipa_rm_peers_list_is_empty(struct ipa_rm_peers_list *peers_list)
{
bool result = true;
if (!peers_list)
goto bail;
if (peers_list->peers_count > 0)
result = false;
bail:
return result;
}
/**
* ipa_rm_peers_list_has_last_peer() - checks
* if resource peers list has exactly one peer
*
* @peers_list: peers list
*
* Returns: true if the list has exactly one peer, false otherwise
*/
bool ipa_rm_peers_list_has_last_peer(
struct ipa_rm_peers_list *peers_list)
{
bool result = false;
if (!peers_list)
goto bail;
if (peers_list->peers_count == 1)
result = true;
bail:
return result;
}
/**
* ipa_rm_peers_list_check_dependency() - check dependency
* between 2 peer lists
* @resource_peers: first peers list
* @resource_name: first peers list resource name
* @depends_on_peers: second peers list
* @depends_on_name: second peers list resource name
* @userspace_dep: [out] dependency was created by userspace
*
* Returns: true if there is dependency, false otherwise
*
*/
bool ipa_rm_peers_list_check_dependency(
struct ipa_rm_peers_list *resource_peers,
enum ipa_rm_resource_name resource_name,
struct ipa_rm_peers_list *depends_on_peers,
enum ipa_rm_resource_name depends_on_name,
bool *userspace_dep)
{
bool result = false;
int resource_index;
struct ipa_rm_resource_peer *peer_ptr;
if (!resource_peers || !depends_on_peers || !userspace_dep)
return result;
resource_index = ipa_rm_peers_list_get_resource_index(depends_on_name);
peer_ptr = &resource_peers->peers[resource_index];
if (peer_ptr->resource != NULL) {
result = true;
*userspace_dep = peer_ptr->userspace_dep;
}
resource_index = ipa_rm_peers_list_get_resource_index(resource_name);
peer_ptr = &depends_on_peers->peers[resource_index];
if (peer_ptr->resource != NULL) {
result = true;
*userspace_dep = peer_ptr->userspace_dep;
}
return result;
}
/**
* ipa_rm_peers_list_get_resource() - get resource by
* resource index
* @resource_index: resource index
* @resource_peers: peers list
*
* Returns: the resource if found, NULL otherwise
*/
struct ipa_rm_resource *ipa_rm_peers_list_get_resource(int resource_index,
struct ipa_rm_peers_list *resource_peers)
{
struct ipa_rm_resource *result = NULL;
if (!ipa_rm_peers_list_check_index(resource_index, resource_peers))
goto bail;
result = resource_peers->peers[resource_index].resource;
bail:
return result;
}
/**
* ipa_rm_peers_list_get_userspace_dep() - returns whether resource dependency
* was added by userspace
* @resource_index: resource index
* @resource_peers: peers list
*
* Returns: true if dependency was added by userspace, false by kernel
*/
bool ipa_rm_peers_list_get_userspace_dep(int resource_index,
struct ipa_rm_peers_list *resource_peers)
{
bool result = false;
if (!ipa_rm_peers_list_check_index(resource_index, resource_peers))
goto bail;
result = resource_peers->peers[resource_index].userspace_dep;
bail:
return result;
}
/**
* ipa_rm_peers_list_get_size() - get peers list sise
*
* @peers_list: peers list
*
* Returns: the size of the peers list
*/
int ipa_rm_peers_list_get_size(struct ipa_rm_peers_list *peers_list)
{
return peers_list->max_peers;
}

55
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_rm_peers_list.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
*/
#ifndef _IPA_RM_PEERS_LIST_H_
#define _IPA_RM_PEERS_LIST_H_
#include "ipa_rm_resource.h"
struct ipa_rm_resource_peer {
struct ipa_rm_resource *resource;
bool userspace_dep;
};
/**
* struct ipa_rm_peers_list - IPA RM resource peers list
* @peers: the list of references to resources dependent on this resource
* in case of producer or list of dependencies in case of consumer
* @max_peers: maximum number of peers for this resource
* @peers_count: actual number of peers for this resource
*/
struct ipa_rm_peers_list {
struct ipa_rm_resource_peer *peers;
int max_peers;
int peers_count;
};
int ipa_rm_peers_list_create(int max_peers,
struct ipa_rm_peers_list **peers_list);
void ipa_rm_peers_list_delete(struct ipa_rm_peers_list *peers_list);
void ipa_rm_peers_list_remove_peer(
struct ipa_rm_peers_list *peers_list,
enum ipa_rm_resource_name resource_name);
void ipa_rm_peers_list_add_peer(
struct ipa_rm_peers_list *peers_list,
struct ipa_rm_resource *resource,
bool userspace_dep);
bool ipa_rm_peers_list_check_dependency(
struct ipa_rm_peers_list *resource_peers,
enum ipa_rm_resource_name resource_name,
struct ipa_rm_peers_list *depends_on_peers,
enum ipa_rm_resource_name depends_on_name,
bool *userspace_dep);
struct ipa_rm_resource *ipa_rm_peers_list_get_resource(int resource_index,
struct ipa_rm_peers_list *peers_list);
bool ipa_rm_peers_list_get_userspace_dep(int resource_index,
struct ipa_rm_peers_list *resource_peers);
int ipa_rm_peers_list_get_size(struct ipa_rm_peers_list *peers_list);
bool ipa_rm_peers_list_is_empty(struct ipa_rm_peers_list *peers_list);
bool ipa_rm_peers_list_has_last_peer(
struct ipa_rm_peers_list *peers_list);
#endif /* _IPA_RM_PEERS_LIST_H_ */

1204
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_rm_resource.c Normal file
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159
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_rm_resource.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
*/
#ifndef _IPA_RM_RESOURCE_H_
#define _IPA_RM_RESOURCE_H_
#include <linux/list.h>
#include "ipa.h"
#include "ipa_rm_peers_list.h"
/**
* enum ipa_rm_resource_state - resource state
*/
enum ipa_rm_resource_state {
IPA_RM_RELEASED,
IPA_RM_REQUEST_IN_PROGRESS,
IPA_RM_GRANTED,
IPA_RM_RELEASE_IN_PROGRESS
};
/**
* enum ipa_rm_resource_type - IPA resource manager resource type
*/
enum ipa_rm_resource_type {
IPA_RM_PRODUCER,
IPA_RM_CONSUMER
};
/**
* struct ipa_rm_notification_info - notification information
* of IPA RM client
* @reg_params: registration parameters
* @explicit: registered explicitly by ipa_rm_register()
* @link: link to the list of all registered clients information
*/
struct ipa_rm_notification_info {
struct ipa_rm_register_params reg_params;
bool explicit;
struct list_head link;
};
/**
* struct ipa_rm_resource - IPA RM resource
* @name: name identifying resource
* @type: type of resource (PRODUCER or CONSUMER)
* @floor_voltage: minimum voltage level for operation
* @max_bw: maximum bandwidth required for resource in Mbps
* @state: state of the resource
* @peers_list: list of the peers of the resource
*/
struct ipa_rm_resource {
enum ipa_rm_resource_name name;
enum ipa_rm_resource_type type;
enum ipa_voltage_level floor_voltage;
u32 max_bw;
u32 needed_bw;
enum ipa_rm_resource_state state;
struct ipa_rm_peers_list *peers_list;
};
/**
* struct ipa_rm_resource_cons - IPA RM consumer
* @resource: resource
* @usage_count: number of producers in GRANTED / REQUESTED state
* using this consumer
* @request_consumer_in_progress: when set, the consumer is during its request
* phase
* @request_resource: function which should be called to request resource
* from resource manager
* @release_resource: function which should be called to release resource
* from resource manager
* Add new fields after @resource only.
*/
struct ipa_rm_resource_cons {
struct ipa_rm_resource resource;
int usage_count;
struct completion request_consumer_in_progress;
int (*request_resource)(void);
int (*release_resource)(void);
};
/**
* struct ipa_rm_resource_prod - IPA RM producer
* @resource: resource
* @event_listeners: clients registered with this producer
* for notifications in resource state
* list Add new fields after @resource only.
*/
struct ipa_rm_resource_prod {
struct ipa_rm_resource resource;
struct list_head event_listeners;
int pending_request;
int pending_release;
};
int ipa_rm_resource_create(
struct ipa_rm_create_params *create_params,
struct ipa_rm_resource **resource);
int ipa_rm_resource_delete(struct ipa_rm_resource *resource);
int ipa_rm_resource_producer_register(struct ipa_rm_resource_prod *producer,
struct ipa_rm_register_params *reg_params,
bool explicit);
int ipa_rm_resource_producer_deregister(struct ipa_rm_resource_prod *producer,
struct ipa_rm_register_params *reg_params);
int ipa_rm_resource_add_dependency(struct ipa_rm_resource *resource,
struct ipa_rm_resource *depends_on,
bool userspace_dep);
int ipa_rm_resource_delete_dependency(struct ipa_rm_resource *resource,
struct ipa_rm_resource *depends_on,
bool userspace_dep);
int ipa_rm_resource_producer_request(struct ipa_rm_resource_prod *producer);
int ipa_rm_resource_producer_release(struct ipa_rm_resource_prod *producer);
int ipa_rm_resource_consumer_request(struct ipa_rm_resource_cons *consumer,
u32 needed_bw,
bool inc_usage_count,
bool wake_client);
int ipa_rm_resource_consumer_release(struct ipa_rm_resource_cons *consumer,
u32 needed_bw,
bool dec_usage_count);
int ipa_rm_resource_set_perf_profile(struct ipa_rm_resource *resource,
struct ipa_rm_perf_profile *profile);
void ipa_rm_resource_consumer_handle_cb(struct ipa_rm_resource_cons *consumer,
enum ipa_rm_event event);
void ipa_rm_resource_producer_notify_clients(
struct ipa_rm_resource_prod *producer,
enum ipa_rm_event event,
bool notify_registered_only);
int ipa_rm_resource_producer_print_stat(
struct ipa_rm_resource *resource,
char *buf,
int size);
int ipa_rm_resource_consumer_request_work(struct ipa_rm_resource_cons *consumer,
enum ipa_rm_resource_state prev_state,
u32 needed_bw,
bool notify_completion,
bool dec_client_on_err);
int ipa_rm_resource_consumer_release_work(
struct ipa_rm_resource_cons *consumer,
enum ipa_rm_resource_state prev_state,
bool notify_completion);
#endif /* _IPA_RM_RESOURCE_H_ */

404
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_test_module/ipa_rm_ut.c Normal file
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*/
#include <linux/fs.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
#include "ipa.h"
#include <linux/msm_ipa.h>
#include <linux/kernel.h>
#include "ipa_rm_ut.h"
#define IPA_UT_DBG(x...) pr_err(x)
/**
* enum ut_wq_cmd - workqueue commands
*/
enum ut_wq_cmd {
UT_WQ_REQ,
UT_WQ_REL
};
/**
* struct ipa_rm_ut_wq_work_type - IPA RM worqueue specific
* work type
* @work: work struct
* @wq_cmd: command that should be processed in workqueue context
* @resource_name: name of the resource on which this work
* should be done
* @dep_graph: data structure to search for resource if exists
* @event: event to notify
*/
struct ipa_rm_ut_wq_work_type {
struct work_struct work;
enum ut_wq_cmd wq_cmd;
enum ipa_rm_resource_name resource_name;
enum ipa_rm_event event;
};
static struct {
int (*add_dependency)(enum ipa_rm_resource_name
dependant_name,
enum ipa_rm_resource_name
dependency_name);
int (*resource_request)(enum ipa_rm_resource_name resource_name);
int (*resource_release)(enum ipa_rm_resource_name resource_name);
int (*consumer_cb)(enum ipa_rm_event,
enum ipa_rm_resource_name resource_name);
struct workqueue_struct *wq;
} ipa_rm_ut_cb;
struct device_manager_type {
void *user_data;
ipa_rm_notify_cb notify_cb;
int (*release_function)(void);
int (*request_function)(void);
};
static void ipa_ut_wq_handler(struct work_struct *work);
int ipa_ut_wq_send_cmd(enum ut_wq_cmd wq_cmd,
enum ipa_rm_resource_name resource_name,
enum ipa_rm_event event);
static int usb_mgr_release_function(void);
static int usb_mgr_request_function(void);
static void usb_mgr_notify_function(void *user_data,
enum ipa_rm_event event,
unsigned long data);
static struct device_manager_type usb_device_manager = {
NULL,
usb_mgr_notify_function,
usb_mgr_release_function,
usb_mgr_request_function
};
/* USB device manager */
static int usb_mgr_release_function(void)
{
IPA_UT_DBG("USB Released\n");
IPA_UT_DBG("ASYNC CALL USB calling to IPA RM provided CB\n");
ipa_ut_wq_send_cmd(UT_WQ_REL,
IPA_RM_RESOURCE_USB_CONS,
IPA_RM_RESOURCE_RELEASED);
return -EINPROGRESS;
}
static int usb_mgr_request_function(void)
{
IPA_UT_DBG("USB Requested\n");
IPA_UT_DBG("ASYNC CALL USB calling to IPA RM provided CB\n");
ipa_ut_wq_send_cmd(UT_WQ_REQ,
IPA_RM_RESOURCE_USB_CONS,
IPA_RM_RESOURCE_GRANTED);
return -EINPROGRESS;
}
static void usb_mgr_notify_function(void *notify_cb_data,
enum ipa_rm_event event,
unsigned long data)
{
IPA_UT_DBG("USB got event [%d]\n", event);
}
/* HSIC device manager */
static int hsic_mgr_release_function(void)
{
int result = 0;
IPA_UT_DBG("HSIC Released\n");
IPA_UT_DBG("HSIC calling to IPA RM provided CB\n");
result = ipa_rm_ut_cb.consumer_cb(IPA_RM_RESOURCE_RELEASED,
IPA_RM_RESOURCE_HSIC_CONS);
return -EINPROGRESS;
}
static int hsic_mgr_request_function(void)
{
int result = 0;
IPA_UT_DBG("HSIC Requested\n");
IPA_UT_DBG("HSIC calling to IPA RM provided CB\n");
result = ipa_rm_ut_cb.consumer_cb(IPA_RM_RESOURCE_GRANTED,
IPA_RM_RESOURCE_HSIC_CONS);
return -EINPROGRESS;
}
static void hsic_notify_function(void *notify_cb_data,
enum ipa_rm_event event,
unsigned long data)
{
IPA_UT_DBG("HSIC got event [%d]\n", event);
}
static struct device_manager_type hsic_device_manager = {
NULL,
hsic_notify_function,
hsic_mgr_release_function,
hsic_mgr_request_function
};
static void rmnet_bridge_mgr_notify_function
(void *notify_cb_data,
enum ipa_rm_event event,
unsigned long data)
{
IPA_UT_DBG("RmNet got event [%d]\n", event);
}
static struct device_manager_type rmnet_bridge_device_manager = {
NULL,
rmnet_bridge_mgr_notify_function,
NULL,
NULL
};
static void ipa_ut_wq_handler(struct work_struct *work)
{
enum ut_wq_cmd ut_cmd;
struct ipa_rm_ut_wq_work_type *ipa_rm_work =
(struct ipa_rm_ut_wq_work_type *)work;
if (!ipa_rm_work)
return;
ut_cmd = (enum ut_wq_cmd)ipa_rm_work->wq_cmd;
IPA_UT_DBG("***UT CMD Q command [%d]\n", ut_cmd);
switch (ut_cmd) {
case UT_WQ_REQ:
switch (ipa_rm_work->resource_name) {
case IPA_RM_RESOURCE_USB_CONS:
IPA_UT_DBG
("***calling to USB consumer notify request CB\n");
ipa_rm_ut_cb.consumer_cb(IPA_RM_RESOURCE_GRANTED,
IPA_RM_RESOURCE_USB_CONS);
break;
case IPA_RM_RESOURCE_HSIC_CONS:
break;
default:
return;
}
break;
case UT_WQ_REL:
switch (ipa_rm_work->resource_name) {
case IPA_RM_RESOURCE_USB_CONS:
IPA_UT_DBG
("***calling to USB consumer notify release CB\n");
ipa_rm_ut_cb.consumer_cb(IPA_RM_RESOURCE_RELEASED,
IPA_RM_RESOURCE_USB_CONS);
break;
case IPA_RM_RESOURCE_HSIC_CONS:
break;
default:
return;
}
break;
default:
break;
}
kfree((void *) work);
}
int ipa_ut_wq_send_cmd(enum ut_wq_cmd wq_cmd,
enum ipa_rm_resource_name resource_name,
enum ipa_rm_event event)
{
int result = 0;
struct ipa_rm_ut_wq_work_type *work =
(struct ipa_rm_ut_wq_work_type *)
kzalloc(sizeof(*work), GFP_KERNEL);
if (work) {
INIT_WORK((struct work_struct *)work, ipa_ut_wq_handler);
work->wq_cmd = (enum ut_wq_cmd) wq_cmd;
work->resource_name = resource_name;
work->event = event;
result = queue_work(ipa_rm_ut_cb.wq,
(struct work_struct *)work);
} else {
result = -ENOMEM;
}
return result;
}
/**
* build_rmnet_bridge_use_case_graph() - simulate resource creation
*
* @create_resource: create resource function provided by ipa_rm
* unit under test
* @consumer_cb: consumer CB function provided by ipa_rm
* unit under test
*
* Returns: 0 on success, negative on failure
*/
int build_rmnet_bridge_use_case_graph(
int (*create_resource)
(struct ipa_rm_create_params *create_params),
int (*consumer_cb)(enum ipa_rm_event event,
enum ipa_rm_resource_name resource_name))
{
int result = 0;
struct ipa_rm_create_params create_params = {0};
IPA_UT_DBG("build_rmnet_bridge_use_case_graph ENTER\n");
ipa_rm_ut_cb.consumer_cb = consumer_cb;
/* create USB PROD */
create_params.name = IPA_RM_RESOURCE_USB_PROD;
create_params.reg_params.notify_cb =
usb_device_manager.notify_cb;
create_params.reg_params.user_data =
usb_device_manager.user_data;
result = create_resource(&create_params);
if (result)
goto bail;
/* create USB CONS */
create_params.name = IPA_RM_RESOURCE_USB_CONS;
create_params.release_resource =
usb_device_manager.release_function;
create_params.request_resource =
usb_device_manager.request_function;
result = create_resource(&create_params);
if (result)
goto bail;
/* create HSIC PROD */
create_params.name = IPA_RM_RESOURCE_HSIC_PROD;
create_params.reg_params.notify_cb =
hsic_device_manager.notify_cb;
create_params.reg_params.user_data =
hsic_device_manager.user_data;
result = create_resource(&create_params);
if (result)
goto bail;
/* create HSIC CONS */
create_params.name = IPA_RM_RESOURCE_HSIC_CONS;
create_params.release_resource =
hsic_device_manager.release_function;
create_params.request_resource =
hsic_device_manager.request_function;
result = create_resource(&create_params);
if (result)
goto bail;
/* BRIDGE PROD */
create_params.name = IPA_RM_RESOURCE_WWAN_0_PROD;
create_params.reg_params.notify_cb =
rmnet_bridge_device_manager.notify_cb;
create_params.reg_params.user_data =
rmnet_bridge_device_manager.user_data;
result = create_resource(&create_params);
if (result)
goto bail;
ipa_rm_ut_cb.wq = create_singlethread_workqueue("ut_wq");
if (!ipa_rm_ut_cb.wq) {
result = -ENOMEM;
goto bail;
}
IPA_UT_DBG("build_rmnet_bridge_use_case_graph EXIT SUCCESS\n");
bail:
return result;
}
/**
* build_rmnet_bridge_use_case_dependencies() - simulate build
* dependency graph process
* @add_dependency: add dependency function provided by ipa_rm
* unit under test
*
* Returns: 0 on success, negative on failure
*/
int build_rmnet_bridge_use_case_dependencies(
int (*add_dependency)
(enum ipa_rm_resource_name dependant_name,
enum ipa_rm_resource_name dependency_name))
{
int result = 0;
IPA_UT_DBG("build_rmnet_bridge_use_case_dependencies ENTER\n");
ipa_rm_ut_cb.add_dependency = add_dependency;
result = add_dependency(IPA_RM_RESOURCE_USB_PROD,
IPA_RM_RESOURCE_HSIC_CONS);
if (result)
goto bail;
result = add_dependency(IPA_RM_RESOURCE_HSIC_PROD,
IPA_RM_RESOURCE_USB_CONS);
if (result)
goto bail;
result = add_dependency(IPA_RM_RESOURCE_WWAN_0_PROD,
IPA_RM_RESOURCE_HSIC_CONS);
if (result)
goto bail;
result = add_dependency(IPA_RM_RESOURCE_WWAN_0_PROD,
IPA_RM_RESOURCE_USB_CONS);
if (result)
goto bail;
bail:
IPA_UT_DBG(
"build_rmnet_bridge_use_case_dependencies EXIT result [%d]\n",
result);
return result;
}
/**
* request_release_resource_sequence() - simulate request / release
* resource sequence
* @resource_request: request resource function provided by ipa_rm
* unit under test
* @resource_release: release resource function provided by ipa_rm
* unit under test
*
* Returns: 0 on success, negative on failure
*/
int request_release_resource_sequence(
int (*resource_request)
(enum ipa_rm_resource_name resource_name),
int (*resource_release)
(enum ipa_rm_resource_name resource_name))
{
int result = 0;
ipa_rm_ut_cb.resource_request = resource_request;
ipa_rm_ut_cb.resource_release = resource_release;
IPA_UT_DBG("request_release_resource_sequence ENTER\n");
result = resource_request(IPA_RM_RESOURCE_USB_PROD);
IPA_UT_DBG("result [%d]\n", result);
result = resource_request(IPA_RM_RESOURCE_HSIC_PROD);
IPA_UT_DBG("result [%d]\n", result);
result = resource_release(IPA_RM_RESOURCE_USB_PROD);
IPA_UT_DBG("result [%d]\n", result);
result = resource_release(IPA_RM_RESOURCE_HSIC_PROD);
IPA_UT_DBG("result [%d]\n", result);
IPA_UT_DBG("request_release_resource_sequence EXIT SUCCESS\n");
return result;
}
/**
* clean_ut() - free unit test module resources
*
*/
void clean_ut(void)
{
IPA_UT_DBG("clean_ut ENTER\n");
if (ipa_rm_ut_cb.wq)
destroy_workqueue(ipa_rm_ut_cb.wq);
IPA_UT_DBG("clean_ut EXIT SUCCESS\n");
}

32
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_test_module/ipa_rm_ut.h Normal file
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*/
#ifndef _IPA_RM_UT_H_
#define _IPA_RM_UT_H_
/**
* ipa_rm_ut - unit test module
* Defines sanity test scenarios executed from debugfs
* writer function defined in ipa_rm module
*/
#include <linux/msm_ipa.h>
#include "ipa.h"
int build_rmnet_bridge_use_case_graph(
int (*create_resource)(struct ipa_rm_create_params *create_params),
int (*consumer_cb)(enum ipa_rm_event event,
enum ipa_rm_resource_name resource_name));
int build_rmnet_bridge_use_case_dependencies(
int (*add_dependency)(enum ipa_rm_resource_name dependant_name,
enum ipa_rm_resource_name dependency_name));
int request_release_resource_sequence(
int (*resource_request)(enum ipa_rm_resource_name resource_name),
int (*resource_release)(enum ipa_rm_resource_name resource_name));
void clean_ut(void);
#endif /* _IPA_RM_UT_H_ */

221
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_test_module/ipa_test_module.h Normal file
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// SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note
/*
* Copyright (c) 2017-2018,2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _IPA_TEST_MODULE_H_
#define _IPA_TEST_MODULE_H_
#include <linux/stddef.h>
#include <linux/msm_ipa.h>
#include <linux/ioctl.h>
#ifdef _KERNEL_
#include "ipa.h"
#endif
#define IPA_TEST_IOC_MAGIC 0xA5
enum {
IPA_TEST_IOCTL_GET_HW_TYPE = 1,
IPA_TEST_IOCTL_CONFIGURE,
IPA_TEST_IOCTL_CLEAN,
IPA_TEST_IOCTL_EP_CTRL,
IPA_TEST_IOCTL_REG_SUSPEND_HNDL,
IPA_TEST_IOCTL_HOLB_CONFIG,
IPA_TEST_IOCTL_FLT_TBL_IN_SRAM,
IPA_TEST_IOCTL_GET_MEM_PART,
IPA_TEST_IOCTL_ULSO_CONFIGURE,
IPA_TEST_IOCTL_ADD_HDR_HPC,
IPA_TEST_IOCTL_PKT_INIT_EX_SET_HDR_OFST,
IPA_TEST_IOCTL_NUM,
};
#define IPA_TEST_IOC_GET_HW_TYPE _IO(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_GET_HW_TYPE)
#define IPA_TEST_IOC_CONFIGURE _IOWR(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_CONFIGURE, \
struct ipa_test_config_header *)
#define IPA_TEST_IOC_CLEAN _IO(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_CLEAN)
#define IPA_TEST_IOC_EP_CTRL _IOWR(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_EP_CTRL, \
struct ipa_test_ep_ctrl *)
#define IPA_TEST_IOC_REG_SUSPEND_HNDL _IOWR(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_REG_SUSPEND_HNDL, \
struct ipa_test_reg_suspend_handler *)
#define IPA_TEST_IOC_HOLB_CONFIG _IOWR(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_HOLB_CONFIG, \
struct handle_holb_config_ioctl *)
#define IPA_TEST_IOC_IS_TEST_PROD_FLT_IN_SRAM _IO(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_FLT_TBL_IN_SRAM)
#define IPA_TEST_IOC_GET_MEM_PART _IOWR(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_GET_MEM_PART, \
struct ipa_test_mem_partition *)
#define IPA_TEST_IOC_ULSO_CONFIGURE _IOWR(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_ULSO_CONFIGURE, \
struct ipa_test_config_header *)
#define IPA_TEST_IOC_ADD_HDR_HPC _IOWR(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_ADD_HDR_HPC, \
struct ipa_ioc_add_hdr *)
#define IPA_TEST_IOC_PKT_INIT_EX_SET_HDR_OFST _IOWR(IPA_TEST_IOC_MAGIC, \
IPA_TEST_IOCTL_PKT_INIT_EX_SET_HDR_OFST, \
struct ipa_ioc_set_pkt_init_ex_hdr_ofst *)
#define IPA_TEST_CONFIG_MARKER 0x57
#define IPA_TEST_CHANNEL_CONFIG_MARKER 0x83
/*
* This is the configuration number that is saved for Generic configuration
* we need it in order to allow coexistence of Generic
* configured tests with old fashion tests
*/
#define GENERIC_TEST_CONFIGURATION_IDX 37788239
struct ipa_test_config_header
{
unsigned char head_marker; /* IPA_TEST_CONFIG_MARKER */
int to_ipa_channels_num;
struct ipa_channel_config **to_ipa_channel_config;
int from_ipa_channels_num;
struct ipa_channel_config **from_ipa_channel_config;
unsigned char tail_marker; /* IPA_TEST_CONFIG_MARKER */
};
struct ipa_test_en_status
{
int num_clients;
enum ipa_client_type *clients;
};
struct ipa_test_ep_ctrl
{
bool ipa_ep_suspend;
bool ipa_ep_delay;
int from_dev_num;
};
struct ipa_test_reg_suspend_handler
{
int DevNum;
bool reg;
bool deferred_flag;
};
struct ipa_channel_config
{
unsigned char head_marker; /* IPA_TEST_CHANNEL_CONFIG_MARKER */
enum ipa_client_type client;
int index; /* shall be used for to_ipa_x or from_ipa_x */
size_t config_size;
void *cfg;
bool en_status;
unsigned char tail_marker; /* IPA_TEST_CHANNEL_CONFIG_MARKER */
};
struct ipa_test_holb_config
{
enum ipa_client_type client;
unsigned tmr_val;
unsigned short en;
};
struct ipa_test_mem_partition {
unsigned ofst_start;
unsigned v4_flt_hash_ofst;
unsigned v4_flt_hash_size;
unsigned v4_flt_hash_size_ddr;
unsigned v4_flt_nhash_ofst;
unsigned v4_flt_nhash_size;
unsigned v4_flt_nhash_size_ddr;
unsigned v6_flt_hash_ofst;
unsigned v6_flt_hash_size;
unsigned v6_flt_hash_size_ddr;
unsigned v6_flt_nhash_ofst;
unsigned v6_flt_nhash_size;
unsigned v6_flt_nhash_size_ddr;
unsigned v4_rt_num_index;
unsigned v4_modem_rt_index_lo;
unsigned v4_modem_rt_index_hi;
unsigned v4_apps_rt_index_lo;
unsigned v4_apps_rt_index_hi;
unsigned v4_rt_hash_ofst;
unsigned v4_rt_hash_size;
unsigned v4_rt_hash_size_ddr;
unsigned v4_rt_nhash_ofst;
unsigned v4_rt_nhash_size;
unsigned v4_rt_nhash_size_ddr;
unsigned v6_rt_num_index;
unsigned v6_modem_rt_index_lo;
unsigned v6_modem_rt_index_hi;
unsigned v6_apps_rt_index_lo;
unsigned v6_apps_rt_index_hi;
unsigned v6_rt_hash_ofst;
unsigned v6_rt_hash_size;
unsigned v6_rt_hash_size_ddr;
unsigned v6_rt_nhash_ofst;
unsigned v6_rt_nhash_size;
unsigned v6_rt_nhash_size_ddr;
unsigned modem_hdr_ofst;
unsigned modem_hdr_size;
unsigned apps_hdr_ofst;
unsigned apps_hdr_size;
unsigned apps_hdr_size_ddr;
unsigned modem_hdr_proc_ctx_ofst;
unsigned modem_hdr_proc_ctx_size;
unsigned apps_hdr_proc_ctx_ofst;
unsigned apps_hdr_proc_ctx_size;
unsigned apps_hdr_proc_ctx_size_ddr;
unsigned nat_tbl_ofst;
unsigned nat_tbl_size;
unsigned modem_comp_decomp_ofst;
unsigned modem_comp_decomp_size;
unsigned modem_ofst;
unsigned modem_size;
unsigned apps_v4_flt_hash_ofst;
unsigned apps_v4_flt_hash_size;
unsigned apps_v4_flt_nhash_ofst;
unsigned apps_v4_flt_nhash_size;
unsigned apps_v6_flt_hash_ofst;
unsigned apps_v6_flt_hash_size;
unsigned apps_v6_flt_nhash_ofst;
unsigned apps_v6_flt_nhash_size;
unsigned uc_info_ofst;
unsigned uc_info_size;
unsigned end_ofst;
unsigned apps_v4_rt_hash_ofst;
unsigned apps_v4_rt_hash_size;
unsigned apps_v4_rt_nhash_ofst;
unsigned apps_v4_rt_nhash_size;
unsigned apps_v6_rt_hash_ofst;
unsigned apps_v6_rt_hash_size;
unsigned apps_v6_rt_nhash_ofst;
unsigned apps_v6_rt_nhash_size;
unsigned uc_descriptor_ram_ofst;
unsigned uc_descriptor_ram_size;
unsigned pdn_config_ofst;
unsigned pdn_config_size;
unsigned stats_quota_q6_ofst;
unsigned stats_quota_q6_size;
unsigned stats_quota_ap_ofst;
unsigned stats_quota_ap_size;
unsigned stats_tethering_ofst;
unsigned stats_tethering_size;
unsigned stats_fnr_ofst;
unsigned stats_fnr_size;
unsigned uc_ofst;
unsigned uc_size;
/* Irrelevant starting IPA4.5 */
unsigned stats_flt_v4_ofst;
unsigned stats_flt_v4_size;
unsigned stats_flt_v6_ofst;
unsigned stats_flt_v6_size;
unsigned stats_rt_v4_ofst;
unsigned stats_rt_v4_size;
unsigned stats_rt_v6_ofst;
unsigned stats_rt_v6_size;
unsigned stats_drop_ofst;
unsigned stats_drop_size;
};
#endif /* _IPA_TEST_MODULE_H_ */

4857
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_test_module/ipa_test_module_impl.c Normal file
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190
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_test_module/ipa_test_module_tsp.h Normal file
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//SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/* This file should be removed once TSP feature POR */
#ifndef _IPA_TEST_MODULE_TSP_H_
#define _IPA_TEST_MODULE_TSP_H_
#include <linux/msm_ipa.h>
#define IPA_IOCTL_TSP_GET_INGR_TC_NUM 91
#define IPA_IOCTL_TSP_GET_EGR_EP_NUM 92
#define IPA_IOCTL_TSP_GET_EGR_TC_NUM 93
#define IPA_IOCTL_TSP_GET_INGR_TC 94
#define IPA_IOCTL_TSP_GET_EGR_EP 95
#define IPA_IOCTL_TSP_GET_EGR_TC 96
#define IPA_IOCTL_TSP_SET_INGR_TC 97
#define IPA_IOCTL_TSP_SET_EGR_EP 98
#define IPA_IOCTL_TSP_SET_EGR_TC 99
#define IPA_IOCTL_TSP_COMMIT 100
#define IPA_IOCTL_TSP_RESET 101
/**
* struct ipa_ioc_tsp_ingress_class_params - IPA Ingress traffic-class params
*
* @max_burst: Maximal-burst allowed in bytes
* @max_rate: Maximal bandwidth rate for matching ingress traffic-class in 1.2MB/second units
* @include_l2_len: Bool - Include L2 size for bandwidth calculation?
*/
struct ipa_ioc_tsp_ingress_class_params {
__u16 max_burst;
__u16 max_rate;
__u32 include_l2_len;
};
/**
* struct ipa_ioc_tsp_ingress_class_get - IPA Ingress traffic-class get ioctl struct
*
* @index: Ingress traffic-class index
* @reserved: Reserved for alignment
* @params: Output parameter - Ingress traffic-class Params, valid only when
* ioctl return val is non-negative
*/
struct ipa_ioc_tsp_ingress_class_get {
__u32 index;
__u32 reserved;
struct ipa_ioc_tsp_ingress_class_params params;
};
/**
* struct ipa_ioc_tsp_ingress_class_set - IPA Ingress traffic-class set ioctl struct
*
* @index: Ingress traffic-class index
* @commit: Bool - Commit the setting to the HW
* @params: Params to set
*/
struct ipa_ioc_tsp_ingress_class_set {
__u32 index;
__u32 commit;
struct ipa_ioc_tsp_ingress_class_params params;
};
/**
* struct ipa_ioc_tsp_egress_prod_params - IPA TSP-enabled producer params
*
* @client: For output - which "clients" pipe does this entry apply to?
* @max_rate: Maximal bandwidth rate for producer in 1.2MB/second units
* @max_burst: Maximal-burst allowed in bytes
* @max_out_bytes: max output size in bytes allowed per producer
* @tc_lo: Lowest egress traffic-class index assignes to this producer
* @tc_hi: Highest egress traffic-class index assignes to this producer
* @policing_by_max_out: Bool - enable policing by max output size
* in case of valid egress_tc, max output size policing will be valid
* regardless to this flag
* @reserved: Reserved for alignment
*/
struct ipa_ioc_tsp_egress_prod_params {
enum ipa_client_type client;
__u16 max_rate;
__u16 max_burst;
__u32 max_out_bytes;
__u8 tc_lo;
__u8 tc_hi;
__u8 policing_by_max_out;
__u8 reserved;
};
/**
* struct ipa_ioc_tsp_egress_prod_get - IPA TSP-enabled producer get ioctl struct
*
* @index: TSP-enabled producer index
* @reserved: Reserved for alignment
* @params: Output parameter - TSP-enabled producer Params, valid only when
* ioctl return val is non-negative
*/
struct ipa_ioc_tsp_egress_prod_get {
__u32 index;
__u32 reserved;
struct ipa_ioc_tsp_egress_prod_params params;
};
/**
* struct ipa_ioc_tsp_egress_prod_set - IPA TSP-enabled producer set ioctl struct
*
* @index: Producer index
* @commit: Bool - Commit the setting to the HW
* @params: Params to set
*/
struct ipa_ioc_tsp_egress_prod_set {
__u32 index;
__u32 commit;
struct ipa_ioc_tsp_egress_prod_params params;
};
/**
* struct ipa_ioc_tsp_egress_class_params - IPA egress traffic-class params
*
* @guaranteed_rate: Guaranteed bandwidth rate for traffic-class in 1.2MB/second units
* If guaranteed_rate, guaranteed_freq and guaranteed_burst are all set to 0,
* the guaranteed bandwidth rate will be disabled,
* and only maximal bandwidth rate will be considered.
* @max_rate: Maximal bandwidth rate for traffic-class in 1.2MB/second units
* @guaranteed_burst: Maximal-burst allowed for guaranteed bandwidth rate (in bytes)
* @max_burst: Maximal-burst allowed for maximal bandwidth rate (in bytes)
*/
struct ipa_ioc_tsp_egress_class_params {
__u16 guaranteed_rate;
__u16 max_rate;
__u16 guaranteed_burst;
__u16 max_burst;
};
/**
* struct ipa_ioc_tsp_egress_class_get - IPA Egress traffic-class get ioctl struct
*
* @index: Egress traffic-class index
* @reserved: Reserved for alignment
* @params: Output parameter - Egress traffic-class Params, valid only when
* ioctl return val is non-negative
*/
struct ipa_ioc_tsp_egress_class_get {
__u32 index;
__u32 reserved;
struct ipa_ioc_tsp_egress_class_params params;
};
/**
* struct ipa_ioc_tsp_egress_class_set - IPA Engress traffic-class set ioctl struct
*
* @index: Egress traffic-class index
* @commit: Bool - Commit the setting to the HW
* @params: Params to set
*/
struct ipa_ioc_tsp_egress_class_set {
__u32 index;
__u32 commit;
struct ipa_ioc_tsp_egress_class_params params;
};
#define IPA_IOC_TSP_GET_INGR_TC_NUM _IOWR(IPA_IOC_MAGIC, \
IPA_IOCTL_TSP_GET_INGR_TC_NUM, \
uint32_t)
#define IPA_IOC_TSP_GET_EGR_EP_NUM _IOWR(IPA_IOC_MAGIC, \
IPA_IOCTL_TSP_GET_EGR_EP_NUM, \
uint32_t)
#define IPA_IOC_TSP_GET_EGR_TC_NUM _IOWR(IPA_IOC_MAGIC, \
IPA_IOCTL_TSP_GET_EGR_TC_NUM, \
uint32_t)
#define IPA_IOC_TSP_GET_INGR_TC _IOWR(IPA_IOC_MAGIC, \
IPA_IOCTL_TSP_GET_INGR_TC, \
struct ipa_ioc_tsp_ingress_class_get)
#define IPA_IOC_TSP_GET_EGR_EP _IOWR(IPA_IOC_MAGIC, \
IPA_IOCTL_TSP_GET_EGR_EP, \
struct ipa_ioc_tsp_egress_prod_get)
#define IPA_IOC_TSP_GET_EGR_TC _IOWR(IPA_IOC_MAGIC, \
IPA_IOCTL_TSP_GET_EGR_TC, \
struct ipa_ioc_tsp_egress_class_get)
#define IPA_IOC_TSP_SET_INGR_TC _IOWR(IPA_IOC_MAGIC, \
IPA_IOCTL_TSP_SET_INGR_TC, \
struct ipa_ioc_tsp_ingress_class_set)
#define IPA_IOC_TSP_SET_EGR_EP _IOWR(IPA_IOC_MAGIC, \
IPA_IOCTL_TSP_SET_EGR_EP, \
struct ipa_ioc_tsp_egress_prod_set)
#define IPA_IOC_TSP_SET_EGR_TC _IOWR(IPA_IOC_MAGIC, \
IPA_IOCTL_TSP_SET_EGR_TC, \
struct ipa_ioc_tsp_egress_class_set)
#define IPA_IOC_TSP_COMMIT _IO(IPA_IOC_MAGIC, IPA_IOCTL_TSP_COMMIT)
#define IPA_IOC_TSP_RESET _IO(IPA_IOC_MAGIC, IPA_IOCTL_TSP_RESET)
#endif /* _IPA_TEST_MODULE_TSP_H_ */

22
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_uc_offload_common_i.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
*/
#include <linux/ipa_mhi.h>
#include <linux/ipa_qmi_service_v01.h>
#ifndef _IPA_UC_OFFLOAD_COMMON_I_H_
#define _IPA_UC_OFFLOAD_COMMON_I_H_
int ipa3_setup_uc_ntn_pipes(struct ipa_ntn_conn_in_params *in,
ipa_notify_cb notify, void *priv, u8 hdr_len,
struct ipa_ntn_conn_out_params *outp);
int ipa3_tear_down_uc_offload_pipes(int ipa_ep_idx_ul, int ipa_ep_idx_dl,
struct ipa_ntn_conn_in_params *params);
int ipa3_ntn_uc_reg_rdyCB(void (*ipauc_ready_cb)(void *user_data),
void *user_data);
void ipa3_ntn_uc_dereg_rdyCB(void);
#endif /* _IPA_UC_OFFLOAD_COMMON_I_H_ */

4
qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_v3/Kbuild Normal file
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# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_IPA3_MHI_PRIME_MANAGER) += ipampmm.o
ipampmm-objs := ipa_mpm.o

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qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_v3/dump/ipa4.5/gsi_hwio.h Normal file
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qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_v3/dump/ipa4.5/gsi_hwio_def.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*/
#if !defined(_GSI_HWIO_DEF_H_)
#define _GSI_HWIO_DEF_H_
struct gsi_hwio_def_gsi_cfg_s {
u32 gsi_enable : 1;
u32 mcs_enable : 1;
u32 double_mcs_clk_freq : 1;
u32 uc_is_mcs : 1;
u32 gsi_pwr_clps : 1;
u32 bp_mtrix_disable : 1;
u32 reserved0 : 2;
u32 sleep_clk_div : 4;
u32 reserved1 : 20;
};
union gsi_hwio_def_gsi_cfg_u {
struct gsi_hwio_def_gsi_cfg_s def;
u32 value;
};
struct gsi_hwio_def_gsi_ree_cfg_s {
u32 move_to_esc_clr_mode_trsh : 1;
u32 channel_empty_int_enable : 1;
u32 reserved0 : 6;
u32 max_burst_size : 8;
u32 reserved1 : 16;
};
union gsi_hwio_def_gsi_ree_cfg_u {
struct gsi_hwio_def_gsi_ree_cfg_s def;
u32 value;
};
struct gsi_hwio_def_gsi_manager_ee_qos_n_s {
u32 ee_prio : 2;
u32 reserved0 : 6;
u32 max_ch_alloc : 5;
u32 reserved1 : 3;
u32 max_ev_alloc : 5;
u32 reserved2 : 11;
};
union gsi_hwio_def_gsi_manager_ee_qos_n_u {
struct gsi_hwio_def_gsi_manager_ee_qos_n_s def;
u32 value;
};
struct gsi_hwio_def_gsi_shram_n_s {
u32 shram : 32;
};
union gsi_hwio_def_gsi_shram_n_u {
struct gsi_hwio_def_gsi_shram_n_s def;
u32 value;
};
struct gsi_hwio_def_gsi_map_ee_n_ch_k_vp_table_s {
u32 phy_ch : 5;
u32 valid : 1;
u32 reserved0 : 26;
};
union gsi_hwio_def_gsi_map_ee_n_ch_k_vp_table_u {
struct gsi_hwio_def_gsi_map_ee_n_ch_k_vp_table_s def;
u32 value;
};
struct gsi_hwio_def_gsi_test_bus_sel_s {
u32 gsi_testbus_sel : 8;
u32 reserved0 : 8;
u32 gsi_hw_events_sel : 4;
u32 reserved1 : 12;
};
union gsi_hwio_def_gsi_test_bus_sel_u {
struct gsi_hwio_def_gsi_test_bus_sel_s def;
u32 value;
};
struct gsi_hwio_def_gsi_test_bus_reg_s {
u32 gsi_testbus_reg : 32;
};
union gsi_hwio_def_gsi_test_bus_reg_u {
struct gsi_hwio_def_gsi_test_bus_reg_s def;
u32 value;
};
struct gsi_hwio_def_gsi_debug_countern_s {
u32 counter_value : 16;
u32 reserved0 : 16;
};
union gsi_hwio_def_gsi_debug_countern_u {
struct gsi_hwio_def_gsi_debug_countern_s def;
u32 value;
};
struct gsi_hwio_def_gsi_debug_qsb_log_last_misc_idn_s {
u32 addr_20_0 : 21;
u32 write : 1;
u32 tid : 5;
u32 mid : 5;
};
union gsi_hwio_def_gsi_debug_qsb_log_last_misc_idn_u {
struct gsi_hwio_def_gsi_debug_qsb_log_last_misc_idn_s def;
u32 value;
};
struct gsi_hwio_def_gsi_debug_sw_rf_n_read_s {
u32 rf_reg : 32;
};
union gsi_hwio_def_gsi_debug_sw_rf_n_read_u {
struct gsi_hwio_def_gsi_debug_sw_rf_n_read_s def;
u32 value;
};
struct gsi_hwio_def_gsi_debug_ee_n_ev_k_vp_table_s {
u32 phy_ev_ch : 5;
u32 valid : 1;
u32 reserved0 : 26;
};
union gsi_hwio_def_gsi_debug_ee_n_ev_k_vp_table_u {
struct gsi_hwio_def_gsi_debug_ee_n_ev_k_vp_table_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_0_s {
u32 chtype_protocol : 3;
u32 chtype_dir : 1;
u32 ee : 4;
u32 chid : 5;
u32 chtype_protocol_msb : 1;
u32 erindex : 5;
u32 reserved0 : 1;
u32 chstate : 4;
u32 element_size : 8;
};
union gsi_hwio_def_ee_n_gsi_ch_k_cntxt_0_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_0_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_1_s {
u32 r_length : 16;
u32 reserved0 : 16;
};
union gsi_hwio_def_ee_n_gsi_ch_k_cntxt_1_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_1_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_2_s {
u32 r_base_addr_lsbs : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_cntxt_2_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_2_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_3_s {
u32 r_base_addr_msbs : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_cntxt_3_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_3_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_4_s {
u32 read_ptr_lsb : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_cntxt_4_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_4_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_5_s {
u32 read_ptr_msb : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_cntxt_5_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_5_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_6_s {
u32 write_ptr_lsb : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_cntxt_6_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_6_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_7_s {
u32 write_ptr_msb : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_cntxt_7_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_cntxt_7_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_re_fetch_read_ptr_s {
u32 read_ptr : 16;
u32 reserved0 : 16;
};
union gsi_hwio_def_ee_n_gsi_ch_k_re_fetch_read_ptr_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_re_fetch_read_ptr_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_re_fetch_write_ptr_s {
u32 re_intr_db : 16;
u32 reserved0 : 16;
};
union gsi_hwio_def_ee_n_gsi_ch_k_re_fetch_write_ptr_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_re_fetch_write_ptr_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_qos_s {
u32 wrr_weight : 4;
u32 reserved0 : 4;
u32 max_prefetch : 1;
u32 use_db_eng : 1;
u32 prefetch_mode : 4;
u32 reserved1 : 2;
u32 empty_lvl_thrshold : 8;
u32 reserved2 : 8;
};
union gsi_hwio_def_ee_n_gsi_ch_k_qos_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_qos_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_scratch_0_s {
u32 scratch : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_scratch_0_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_scratch_0_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_scratch_1_s {
u32 scratch : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_scratch_1_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_scratch_1_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_scratch_2_s {
u32 scratch : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_scratch_2_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_scratch_2_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_ch_k_scratch_3_s {
u32 scratch : 32;
};
union gsi_hwio_def_ee_n_gsi_ch_k_scratch_3_u {
struct gsi_hwio_def_ee_n_gsi_ch_k_scratch_3_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_0_s {
u32 chtype : 4;
u32 ee : 4;
u32 evchid : 8;
u32 intype : 1;
u32 reserved0 : 3;
u32 chstate : 4;
u32 element_size : 8;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_0_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_0_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_1_s {
u32 r_length : 16;
u32 reserved0 : 16;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_1_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_1_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_2_s {
u32 r_base_addr_lsbs : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_2_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_2_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_3_s {
u32 r_base_addr_msbs : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_3_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_3_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_4_s {
u32 read_ptr_lsb : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_4_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_4_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_5_s {
u32 read_ptr_msb : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_5_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_5_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_6_s {
u32 write_ptr_lsb : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_6_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_6_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_7_s {
u32 write_ptr_msb : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_7_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_7_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_8_s {
u32 int_modt : 16;
u32 int_modc : 8;
u32 int_mod_cnt : 8;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_8_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_8_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_9_s {
u32 intvec : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_9_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_9_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_10_s {
u32 msi_addr_lsb : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_10_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_10_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_11_s {
u32 msi_addr_msb : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_11_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_11_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_12_s {
u32 rp_update_addr_lsb : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_12_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_12_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_13_s {
u32 rp_update_addr_msb : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_cntxt_13_u {
struct gsi_hwio_def_ee_n_ev_ch_k_cntxt_13_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_scratch_0_s {
u32 scratch : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_scratch_0_u {
struct gsi_hwio_def_ee_n_ev_ch_k_scratch_0_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_ev_ch_k_scratch_1_s {
u32 scratch : 32;
};
union gsi_hwio_def_ee_n_ev_ch_k_scratch_1_u {
struct gsi_hwio_def_ee_n_ev_ch_k_scratch_1_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_gsi_status_s {
u32 enabled : 1;
u32 reserved0 : 31;
};
union gsi_hwio_def_ee_n_gsi_status_u {
struct gsi_hwio_def_ee_n_gsi_status_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_type_irq_s {
u32 ch_ctrl : 1;
u32 ev_ctrl : 1;
u32 glob_ee : 1;
u32 ieob : 1;
u32 inter_ee_ch_ctrl : 1;
u32 inter_ee_ev_ctrl : 1;
u32 general : 1;
u32 reserved0 : 25;
};
union gsi_hwio_def_ee_n_cntxt_type_irq_u {
struct gsi_hwio_def_ee_n_cntxt_type_irq_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_type_irq_msk_s {
u32 ch_ctrl : 1;
u32 ev_ctrl : 1;
u32 glob_ee : 1;
u32 ieob : 1;
u32 inter_ee_ch_ctrl : 1;
u32 inter_ee_ev_ctrl : 1;
u32 general : 1;
u32 reserved0 : 25;
};
union gsi_hwio_def_ee_n_cntxt_type_irq_msk_u {
struct gsi_hwio_def_ee_n_cntxt_type_irq_msk_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_src_gsi_ch_irq_s {
u32 gsi_ch_bit_map : 32;
};
union gsi_hwio_def_ee_n_cntxt_src_gsi_ch_irq_u {
struct gsi_hwio_def_ee_n_cntxt_src_gsi_ch_irq_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_src_ev_ch_irq_s {
u32 ev_ch_bit_map : 32;
};
union gsi_hwio_def_ee_n_cntxt_src_ev_ch_irq_u {
struct gsi_hwio_def_ee_n_cntxt_src_ev_ch_irq_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_src_gsi_ch_irq_msk_s {
u32 gsi_ch_bit_map_msk : 23;
u32 reserved0 : 9;
};
union gsi_hwio_def_ee_n_cntxt_src_gsi_ch_irq_msk_u {
struct gsi_hwio_def_ee_n_cntxt_src_gsi_ch_irq_msk_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_src_ev_ch_irq_msk_s {
u32 ev_ch_bit_map_msk : 20;
u32 reserved0 : 12;
};
union gsi_hwio_def_ee_n_cntxt_src_ev_ch_irq_msk_u {
struct gsi_hwio_def_ee_n_cntxt_src_ev_ch_irq_msk_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_src_gsi_ch_irq_clr_s {
u32 gsi_ch_bit_map : 32;
};
union gsi_hwio_def_ee_n_cntxt_src_gsi_ch_irq_clr_u {
struct gsi_hwio_def_ee_n_cntxt_src_gsi_ch_irq_clr_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_src_ev_ch_irq_clr_s {
u32 ev_ch_bit_map : 32;
};
union gsi_hwio_def_ee_n_cntxt_src_ev_ch_irq_clr_u {
struct gsi_hwio_def_ee_n_cntxt_src_ev_ch_irq_clr_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_src_ieob_irq_s {
u32 ev_ch_bit_map : 32;
};
union gsi_hwio_def_ee_n_cntxt_src_ieob_irq_u {
struct gsi_hwio_def_ee_n_cntxt_src_ieob_irq_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_src_ieob_irq_msk_s {
u32 ev_ch_bit_map_msk : 20;
u32 reserved0 : 12;
};
union gsi_hwio_def_ee_n_cntxt_src_ieob_irq_msk_u {
struct gsi_hwio_def_ee_n_cntxt_src_ieob_irq_msk_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_src_ieob_irq_clr_s {
u32 ev_ch_bit_map : 32;
};
union gsi_hwio_def_ee_n_cntxt_src_ieob_irq_clr_u {
struct gsi_hwio_def_ee_n_cntxt_src_ieob_irq_clr_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_glob_irq_stts_s {
u32 error_int : 1;
u32 gp_int1 : 1;
u32 gp_int2 : 1;
u32 gp_int3 : 1;
u32 reserved0 : 28;
};
union gsi_hwio_def_ee_n_cntxt_glob_irq_stts_u {
struct gsi_hwio_def_ee_n_cntxt_glob_irq_stts_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_gsi_irq_stts_s {
u32 gsi_break_point : 1;
u32 gsi_bus_error : 1;
u32 gsi_cmd_fifo_ovrflow : 1;
u32 gsi_mcs_stack_ovrflow : 1;
u32 reserved0 : 28;
};
union gsi_hwio_def_ee_n_cntxt_gsi_irq_stts_u {
struct gsi_hwio_def_ee_n_cntxt_gsi_irq_stts_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_intset_s {
u32 intype : 1;
u32 reserved0 : 31;
};
union gsi_hwio_def_ee_n_cntxt_intset_u {
struct gsi_hwio_def_ee_n_cntxt_intset_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_msi_base_lsb_s {
u32 msi_addr_lsb : 32;
};
union gsi_hwio_def_ee_n_cntxt_msi_base_lsb_u {
struct gsi_hwio_def_ee_n_cntxt_msi_base_lsb_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_msi_base_msb_s {
u32 msi_addr_msb : 32;
};
union gsi_hwio_def_ee_n_cntxt_msi_base_msb_u {
struct gsi_hwio_def_ee_n_cntxt_msi_base_msb_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_error_log_s {
u32 error_log : 32;
};
union gsi_hwio_def_ee_n_error_log_u {
struct gsi_hwio_def_ee_n_error_log_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_error_log_clr_s {
u32 error_log_clr : 32;
};
union gsi_hwio_def_ee_n_error_log_clr_u {
struct gsi_hwio_def_ee_n_error_log_clr_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_scratch_0_s {
u32 scratch : 32;
};
union gsi_hwio_def_ee_n_cntxt_scratch_0_u {
struct gsi_hwio_def_ee_n_cntxt_scratch_0_s def;
u32 value;
};
struct gsi_hwio_def_ee_n_cntxt_scratch_1_s {
u32 scratch : 32;
};
union gsi_hwio_def_ee_n_cntxt_scratch_1_u {
struct gsi_hwio_def_ee_n_cntxt_scratch_1_s def;
u32 value;
};
#endif

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qcom/opensource/dataipa/drivers/platform/msm/ipa/ipa_v3/dump/ipa4.5/ipa_access_control.h Normal file
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*/
#if !defined(_IPA_ACCESS_CONTROL_H_)
#define _IPA_ACCESS_CONTROL_H_
#include "ipa_reg_dump.h"
/*
* The following is target specific.
*/
static struct reg_mem_access_map_t mem_access_map[] = {
/*------------------------------------------------------------*/
/* Range Use when Use when */
/* Begin End SD_ENABLED SD_DISABLED */
/*------------------------------------------------------------*/
{ 0x04000, 0x05000, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x1F000, 0x27000, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x05000, 0x0f000, { &io_matrix[AA_COMBO], &io_matrix[AN_COMBO] } },
{ 0x0f000, 0x10000, { &io_matrix[NN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x13000, 0x17000, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x17000, 0x1b000, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x1b000, 0x1f000, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x10000, 0x11000, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x11000, 0x12000, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x12000, 0x13000, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x43000, 0x44000, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x44000, 0x45000, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x45000, 0x47000, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x40000, 0x42000, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x42000, 0x43000, { &io_matrix[AA_COMBO], &io_matrix[AN_COMBO] } },
{ 0x50000, 0x60000, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x60000, 0x80000, { &io_matrix[AN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x80000, 0x81000, { &io_matrix[NN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x81000, 0x83000, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0xa0000, 0xc0000, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0xc0000, 0xc2000, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0xc2000, 0xd0000, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
};
#endif /* #if !defined(_IPA_ACCESS_CONTROL_H_) */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*/
#if !defined(_IPA_GCC_HWIO_H_)
#define _IPA_GCC_HWIO_H_
/*
*
* HWIO register definitions to follow:
*
*/
#endif

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*/
#if !defined(_IPA_GCC_HWIO_DEF_H_)
#define _IPA_GCC_HWIO_DEF_H_
#endif

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*/
#if !defined(_IPA_HW_COMMON_EX_H_)
#define _IPA_HW_COMMON_EX_H_
/* VLVL defs are available for 854 */
#define FEATURE_VLVL_DEFS true
#define FEATURE_IPA_HW_VERSION_4_5 true
/* Important Platform Specific Values : IRQ_NUM, IRQ_CNT, BCR */
#define IPA_HW_BAM_IRQ_NUM 639
/* Q6 IRQ number for IPA. */
#define IPA_HW_IRQ_NUM 640
/* Total number of different interrupts that can be enabled */
#define IPA_HW_IRQ_CNT_TOTAL 23
/* IPAv4 spare reg value */
#define IPA_HW_SPARE_1_REG_VAL 0xC0000005
/* Whether to allow setting step mode on IPA when we crash or not */
#define IPA_CFG_HW_IS_STEP_MODE_ALLOWED (false)
/* GSI MHI related definitions */
#define IPA_HW_GSI_MHI_CONSUMER_CHANNEL_NUM 0x0
#define IPA_HW_GSI_MHI_PRODUCER_CHANNEL_NUM 0x1
#define IPA_HW_GSI_MHI_CONSUMER_EP_NUM 0x1
#define IPA_HW_GSI_MHI_PRODUCER_EP_NUM 0x11
/* IPA ZIP WA related Macros */
#define IPA_HW_DCMP_SRC_PIPE 0x8
#define IPA_HW_DCMP_DEST_PIPE 0x4
#define IPA_HW_ACK_MNGR_MASK 0x1D
#define IPA_HW_DCMP_SRC_GRP 0x5
/* IPA Clock resource name */
#define IPA_CLK_RESOURCE_NAME "/clk/pcnoc"
/* IPA Clock Bus Client name */
#define IPA_CLK_BUS_CLIENT_NAME "IPA_PCNOC_BUS_CLIENT"
/* HPS Sequences */
#define IPA_HW_PKT_PROCESS_HPS_DMA 0x0
#define IPA_HW_PKT_PROCESS_HPS_DMA_DECIPH_CIPHE 0x1
#define IPA_HW_PKT_PROCESS_HPS_PKT_PRS_NO_DECIPH_UCP 0x2
#define IPA_HW_PKT_PROCESS_HPS_PKT_PRS_DECIPH_UCP 0x3
#define IPA_HW_PKT_PROCESS_HPS_2_PKT_PRS_NO_DECIPH 0x4
#define IPA_HW_PKT_PROCESS_HPS_2_PKT_PRS_DECIPH 0x5
#define IPA_HW_PKT_PROCESS_HPS_PKT_PRS_NO_DECIPH_NO_UCP 0x6
#define IPA_HW_PKT_PROCESS_HPS_PKT_PRS_DECIPH_NO_UCP 0x7
#define IPA_HW_PKT_PROCESS_HPS_DMA_PARSER 0x8
#define IPA_HW_PKT_PROCESS_HPS_DMA_DECIPH_PARSER 0x9
#define IPA_HW_PKT_PROCESS_HPS_2_PKT_PRS_UCP_TWICE_NO_DECIPH 0xA
#define IPA_HW_PKT_PROCESS_HPS_2_PKT_PRS_UCP_TWICE_DECIPH 0xB
#define IPA_HW_PKT_PROCESS_HPS_3_PKT_PRS_UCP_TWICE_NO_DECIPH 0xC
#define IPA_HW_PKT_PROCESS_HPS_3_PKT_PRS_UCP_TWICE_DECIPH 0xD
/* DPS Sequences */
#define IPA_HW_PKT_PROCESS_DPS_DMA 0x0
#define IPA_HW_PKT_PROCESS_DPS_DMA_WITH_DECIPH 0x1
#define IPA_HW_PKT_PROCESS_DPS_DMA_WITH_DECOMP 0x2
#define IPA_HW_PKT_PROCESS_DPS_DMA_WITH_CIPH 0x3
/* Src RSRC GRP config */
#define IPA_HW_SRC_RSRC_GRP_01_RSRC_TYPE_0 0x0B040803
#define IPA_HW_SRC_RSRC_GRP_01_RSRC_TYPE_1 0x0C0C0909
#define IPA_HW_SRC_RSRC_GRP_01_RSRC_TYPE_2 0x0E0E0909
#define IPA_HW_SRC_RSRC_GRP_01_RSRC_TYPE_3 0x3F003F00
#define IPA_HW_SRC_RSRC_GRP_01_RSRC_TYPE_4 0x10101616
#define IPA_HW_SRC_RSRC_GRP_23_RSRC_TYPE_0 0x01010101
#define IPA_HW_SRC_RSRC_GRP_23_RSRC_TYPE_1 0x02020202
#define IPA_HW_SRC_RSRC_GRP_23_RSRC_TYPE_2 0x04040404
#define IPA_HW_SRC_RSRC_GRP_23_RSRC_TYPE_3 0x3F003F00
#define IPA_HW_SRC_RSRC_GRP_23_RSRC_TYPE_4 0x02020606
#define IPA_HW_SRC_RSRC_GRP_45_RSRC_TYPE_0 0x00000000
#define IPA_HW_SRC_RSRC_GRP_45_RSRC_TYPE_1 0x00000000
#define IPA_HW_SRC_RSRC_GRP_45_RSRC_TYPE_2 0x00000000
#define IPA_HW_SRC_RSRC_GRP_45_RSRC_TYPE_3 0x00003F00
#define IPA_HW_SRC_RSRC_GRP_45_RSRC_TYPE_4 0x00000000
/* Dest RSRC GRP config */
#define IPA_HW_DST_RSRC_GRP_01_RSRC_TYPE_0 0x05051010
#define IPA_HW_DST_RSRC_GRP_01_RSRC_TYPE_1 0x3F013F02
#define IPA_HW_DST_RSRC_GRP_23_RSRC_TYPE_0 0x02020202
#define IPA_HW_DST_RSRC_GRP_23_RSRC_TYPE_1 0x02010201
#define IPA_HW_DST_RSRC_GRP_45_RSRC_TYPE_0 0x00000000
#define IPA_HW_DST_RSRC_GRP_45_RSRC_TYPE_1 0x00000200
#define IPA_HW_RX_HPS_CLIENTS_MIN_DEPTH_0 0x03030303
#define IPA_HW_RX_HPS_CLIENTS_MAX_DEPTH_0 0x03030303
#define IPA_HW_RSRP_GRP_0 0x0
#define IPA_HW_RSRP_GRP_1 0x1
#define IPA_HW_RSRP_GRP_2 0x2
#define IPA_HW_RSRP_GRP_3 0x3
#define IPA_HW_PCIE_SRC_RSRP_GRP IPA_HW_RSRP_GRP_0
#define IPA_HW_PCIE_DEST_RSRP_GRP IPA_HW_RSRP_GRP_0
#define IPA_HW_DDR_SRC_RSRP_GRP IPA_HW_RSRP_GRP_1
#define IPA_HW_DDR_DEST_RSRP_GRP IPA_HW_RSRP_GRP_1
#define IPA_HW_DMA_SRC_RSRP_GRP IPA_HW_RSRP_GRP_2
#define IPA_HW_DMA_DEST_RSRP_GRP IPA_HW_RSRP_GRP_2
#define IPA_HW_SRC_RSRP_TYPE_MAX 0x05
#define IPA_HW_DST_RSRP_TYPE_MAX 0x02
#define GSI_HW_QSB_LOG_MISC_MAX 0x4
/* IPA Clock Bus Client name */
#define IPA_CLK_BUS_CLIENT_NAME "IPA_PCNOC_BUS_CLIENT"
/* Is IPA decompression feature enabled */
#define IPA_HW_IS_DECOMPRESSION_ENABLED (1)
/* Whether to allow setting step mode on IPA when we crash or not */
#define IPA_HW_IS_STEP_MODE_ALLOWED (true)
/* Max number of virtual pipes for UL QBAP provided by HW */
#define IPA_HW_MAX_VP_NUM (32)
/*
* HW specific clock vote freq values in KHz
* (BIMC/SNOC/PCNOC/IPA/Q6 CPU)
*/
enum ipa_hw_clk_freq_e {
/* BIMC */
IPA_HW_CLK_FREQ_BIMC_PEAK = 518400,
IPA_HW_CLK_FREQ_BIMC_NOM_PLUS = 404200,
IPA_HW_CLK_FREQ_BIMC_NOM = 404200,
IPA_HW_CLK_FREQ_BIMC_SVS = 100000,
/* PCNOC */
IPA_HW_CLK_FREQ_PCNOC_PEAK = 133330,
IPA_HW_CLK_FREQ_PCNOC_NOM_PLUS = 100000,
IPA_HW_CLK_FREQ_PCNOC_NOM = 100000,
IPA_HW_CLK_FREQ_PCNOC_SVS = 50000,
/*IPA_HW_CLK_SNOC*/
IPA_HW_CLK_FREQ_SNOC_PEAK = 200000,
IPA_HW_CLK_FREQ_SNOC_NOM_PLUS = 150000,
IPA_HW_CLK_FREQ_SNOC_NOM = 150000,
IPA_HW_CLK_FREQ_SNOC_SVS = 85000,
IPA_HW_CLK_FREQ_SNOC_SVS_2 = 50000,
/* IPA */
IPA_HW_CLK_FREQ_IPA_PEAK = 600000,
IPA_HW_CLK_FREQ_IPA_NOM_PLUS = 500000,
IPA_HW_CLK_FREQ_IPA_NOM = 500000,
IPA_HW_CLK_FREQ_IPA_SVS = 250000,
IPA_HW_CLK_FREQ_IPA_SVS_2 = 150000,
/* Q6 CPU */
IPA_HW_CLK_FREQ_Q6_PEAK = 729600,
IPA_HW_CLK_FREQ_Q6_NOM_PLUS = 729600,
IPA_HW_CLK_FREQ_Q6_NOM = 729600,
IPA_HW_CLK_FREQ_Q6_SVS = 729600,
};
enum ipa_hw_qtimer_gran_e {
IPA_HW_QTIMER_GRAN_0 = 0, /* granularity 0 is 10us */
IPA_HW_QTIMER_GRAN_1 = 1, /* granularity 1 is 100us */
IPA_HW_QTIMER_GRAN_MAX,
};
/* Pipe ID of all the IPA pipes */
enum ipa_hw_pipe_id_e {
IPA_HW_PIPE_ID_0,
IPA_HW_PIPE_ID_1,
IPA_HW_PIPE_ID_2,
IPA_HW_PIPE_ID_3,
IPA_HW_PIPE_ID_4,
IPA_HW_PIPE_ID_5,
IPA_HW_PIPE_ID_6,
IPA_HW_PIPE_ID_7,
IPA_HW_PIPE_ID_8,
IPA_HW_PIPE_ID_9,
IPA_HW_PIPE_ID_10,
IPA_HW_PIPE_ID_11,
IPA_HW_PIPE_ID_12,
IPA_HW_PIPE_ID_13,
IPA_HW_PIPE_ID_14,
IPA_HW_PIPE_ID_15,
IPA_HW_PIPE_ID_16,
IPA_HW_PIPE_ID_17,
IPA_HW_PIPE_ID_18,
IPA_HW_PIPE_ID_19,
IPA_HW_PIPE_ID_20,
IPA_HW_PIPE_ID_21,
IPA_HW_PIPE_ID_22,
IPA_HW_PIPE_ID_23,
IPA_HW_PIPE_ID_24,
IPA_HW_PIPE_ID_25,
IPA_HW_PIPE_ID_26,
IPA_HW_PIPE_ID_27,
IPA_HW_PIPE_ID_28,
IPA_HW_PIPE_ID_29,
IPA_HW_PIPE_ID_30,
IPA_HW_PIPE_ID_MAX
};
/* Pipe ID's of System Bam Endpoints between Q6 & IPA */
enum ipa_hw_q6_pipe_id_e {
/* Pipes used by IPA Q6 driver */
IPA_HW_Q6_DL_CONSUMER_PIPE_ID = IPA_HW_PIPE_ID_5,
IPA_HW_Q6_CTL_CONSUMER_PIPE_ID = IPA_HW_PIPE_ID_6,
IPA_HW_Q6_DL_NLO_CONSUMER_PIPE_ID = IPA_HW_PIPE_ID_8,
IPA_HW_Q6_UL_ACC_ACK_PRODUCER_PIPE_ID = IPA_HW_PIPE_ID_20,
IPA_HW_Q6_UL_PRODUCER_PIPE_ID = IPA_HW_PIPE_ID_21,
IPA_HW_Q6_DL_PRODUCER_PIPE_ID = IPA_HW_PIPE_ID_17,
IPA_HW_Q6_QBAP_STATUS_PRODUCER_PIPE_ID = IPA_HW_PIPE_ID_18,
IPA_HW_Q6_UL_ACC_DATA_PRODUCER_PIPE_ID = IPA_HW_PIPE_ID_19,
IPA_HW_Q6_UL_ACK_PRODUCER_PIPE_ID =
IPA_HW_Q6_UL_ACC_ACK_PRODUCER_PIPE_ID,
IPA_HW_Q6_UL_DATA_PRODUCER_PIPE_ID =
IPA_HW_Q6_UL_ACC_DATA_PRODUCER_PIPE_ID,
IPA_HW_Q6_DMA_ASYNC_CONSUMER_PIPE_ID = IPA_HW_PIPE_ID_4,
IPA_HW_Q6_DMA_ASYNC_PRODUCER_PIPE_ID = IPA_HW_PIPE_ID_29,
/* Test Simulator Pipes */
IPA_HW_Q6_SIM_UL_CONSUMER_PIPE_0_ID = IPA_HW_PIPE_ID_0,
IPA_HW_Q6_SIM_UL_CONSUMER_PIPE_1_ID = IPA_HW_PIPE_ID_1,
/* GSI UT channel SW->IPA */
IPA_HW_Q6_GSI_UT_CONSUMER_PIPE_1_ID = IPA_HW_PIPE_ID_3,
/* GSI UT channel SW->IPA */
IPA_HW_Q6_GSI_UT_CONSUMER_PIPE_2_ID = IPA_HW_PIPE_ID_10,
IPA_HW_Q6_SIM_UL_CONSUMER_PIPE_2_ID = IPA_HW_PIPE_ID_7,
/* GSI UT channel IPA->SW */
IPA_HW_Q6_DIAG_CONSUMER_PIPE_ID = IPA_HW_PIPE_ID_9,
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_0_ID = IPA_HW_PIPE_ID_23,
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_1_ID = IPA_HW_PIPE_ID_24,
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_2_ID = IPA_HW_PIPE_ID_25,
/* GSI UT channel IPA->SW */
IPA_HW_Q6_GSI_UT_PRODUCER_PIPE_1_ID = IPA_HW_PIPE_ID_26,
/* GSI UT channel IPA->SW */
IPA_HW_Q6_GSI_UT_PRODUCER_PIPE_2_ID = IPA_HW_PIPE_ID_27,
IPA_HW_Q6_PIPE_ID_MAX = IPA_HW_PIPE_ID_MAX,
};
enum ipa_hw_q6_pipe_ch_id_e {
/* Channels used by IPA Q6 driver */
IPA_HW_Q6_DL_CONSUMER_PIPE_CH_ID = 0,
IPA_HW_Q6_CTL_CONSUMER_PIPE_CH_ID = 1,
IPA_HW_Q6_DL_NLO_CONSUMER_PIPE_CH_ID = 2,
IPA_HW_Q6_UL_ACC_PATH_ACK_PRODUCER_PIPE_CH_ID = 6,
IPA_HW_Q6_UL_PRODUCER_PIPE_CH_ID = 7,
IPA_HW_Q6_DL_PRODUCER_PIPE_CH_ID = 3,
IPA_HW_Q6_UL_ACC_PATH_DATA_PRODUCER_PIPE_CH_ID = 5,
IPA_HW_Q6_QBAP_STATUS_PRODUCER_PIPE_CH_ID = 4,
IPA_HW_Q6_DMA_ASYNC_CONSUMER_PIPE_CH_ID = 8,
IPA_HW_Q6_DMA_ASYNC_PRODUCER_PIPE_CH_ID = 9,
/* CH_ID 8 and 9 are Q6 SPARE CONSUMERs */
/* Test Simulator Channels */
IPA_HW_Q6_SIM_UL_CONSUMER_PIPE_0_CH_ID = 10,
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_0_CH_ID = 11,
IPA_HW_Q6_SIM_UL_CONSUMER_PIPE_1_CH_ID = 12,
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_1_CH_ID = 13,
IPA_HW_Q6_SIM_UL_CONSUMER_PIPE_2_CH_ID = 14,
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_2_CH_ID = 15,
/* GSI UT channel SW->IPA */
IPA_HW_Q6_GSI_UT_CONSUMER_PIPE_1_CH_ID = 16,
/* GSI UT channel IPA->SW */
IPA_HW_Q6_GSI_UT_PRODUCER_PIPE_1_CH_ID = 17,
/* GSI UT channel SW->IPA */
IPA_HW_Q6_GSI_UT_CONSUMER_PIPE_2_CH_ID = 18,
/* GSI UT channel IPA->SW */
IPA_HW_Q6_GSI_UT_PRODUCER_PIPE_2_CH_ID = 19,
};
/* System Bam Endpoints between Q6 & IPA */
enum ipa_hw_q6_pipe_e {
/* DL Pipe IPA->Q6 */
IPA_HW_Q6_DL_PRODUCER_PIPE = 0,
/* UL Pipe IPA->Q6 */
IPA_HW_Q6_UL_PRODUCER_PIPE = 1,
/* DL Pipe Q6->IPA */
IPA_HW_Q6_DL_CONSUMER_PIPE = 2,
/* CTL Pipe Q6->IPA */
IPA_HW_Q6_CTL_CONSUMER_PIPE = 3,
/* Q6 -> IPA, DL NLO */
IPA_HW_Q6_DL_NLO_CONSUMER_PIPE = 4,
/* DMA ASYNC CONSUMER */
IPA_HW_Q6_DMA_ASYNC_CONSUMER_PIPE = 5,
/* DMA ASYNC PRODUCER */
IPA_HW_Q6_DMA_ASYNC_PRODUCER_PIPE = 6,
/* UL Acc Path Data Pipe IPA->Q6 */
IPA_HW_Q6_UL_ACC_DATA_PRODUCER_PIPE = 7,
/* UL Acc Path ACK Pipe IPA->Q6 */
IPA_HW_Q6_UL_ACC_ACK_PRODUCER_PIPE = 8,
/* UL Acc Path QBAP status Pipe IPA->Q6 */
IPA_HW_Q6_QBAP_STATUS_PRODUCER_PIPE = 9,
/* Diag status pipe IPA->Q6 */
/* Used only when FEATURE_IPA_TEST_PER_SIM is ON */
/* SIM Pipe IPA->Sim */
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_0 = 10,
/* SIM Pipe Sim->IPA */
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_1 = 11,
/* SIM Pipe Sim->IPA */
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_2 = 12,
/* SIM Pipe Sim->IPA */
IPA_HW_Q6_SIM_UL_CONSUMER_PIPE_0 = 13,
/* SIM B2B PROD Pipe */
IPA_HW_Q6_SIM_UL_CONSUMER_PIPE_1 = 14,
/* SIM Pipe IPA->Sim */
IPA_HW_Q6_SIM_UL_CONSUMER_PIPE_2 = 15,
/* End FEATURE_IPA_TEST_PER_SIM */
/* GSI UT channel SW->IPA */
IPA_HW_Q6_GSI_UT_CONSUMER_PIPE_1 = 16,
/* GSI UT channel IPA->SW */
IPA_HW_Q6_GSI_UT_PRODUCER_PIPE_1 = 17,
/* GSI UT channel SW->IPA */
IPA_HW_Q6_GSI_UT_CONSUMER_PIPE_2 = 18,
/* GSI UT channel IPA->SW */
IPA_HW_Q6_GSI_UT_PRODUCER_PIPE_2 = 19,
IPA_HW_Q6_PIPE_TOTAL
};
/* System Bam Endpoints between Q6 & IPA */
enum ipa_hw_q6_gsi_ev_e { /* In Sdx24 0..11 */
/* DL Pipe IPA->Q6 */
IPA_HW_Q6_DL_PRODUCER_PIPE_GSI_EV = 0,
/* UL Pipe IPA->Q6 */
IPA_HW_Q6_UL_PRODUCER_PIPE_GSI_EV = 1,
/* DL Pipe Q6->IPA */
//IPA_HW_Q6_DL_CONSUMER_PIPE_GSI_EV = 2,
/* CTL Pipe Q6->IPA */
//IPA_HW_Q6_CTL_CONSUMER_PIPE_GSI_EV = 3,
/* Q6 -> IPA, LTE DL Optimized path */
//IPA_HW_Q6_LTE_DL_CONSUMER_PIPE_GSI_EV = 4,
/* LWA DL(Wifi to Q6) */
//IPA_HW_Q6_LWA_DL_PRODUCER_PIPE_GSI_EV = 5,
/* Diag status pipe IPA->Q6 */
//IPA_HW_Q6_DIAG_STATUS_PRODUCER_PIPE_GSI_EV = 6,
/* Used only when FEATURE_IPA_TEST_PER_SIM is ON */
/* SIM Pipe IPA->Sim */
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_0_GSI_EV = 2,
/* SIM Pipe Sim->IPA */
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_1_GSI_EV = 3,
/* SIM Pipe Sim->IPA */
IPA_HW_Q6_SIM_DL_PRODUCER_PIPE_2_GSI_EV = 4,
/* SIM Pipe Sim->IPA */
IPA_HW_Q6_SIM_1_GSI_EV = 5,
IPA_HW_Q6_SIM_2_GSI_EV = 6,
IPA_HW_Q6_SIM_3_GSI_EV = 7,
IPA_HW_Q6_SIM_4_GSI_EV = 8,
IPA_HW_Q6_PIPE_GSI_EV_TOTAL
};
/*
* All the IRQ's supported by the IPA HW. Use this enum to set IRQ_EN
* register and read IRQ_STTS register
*/
enum ipa_hw_irq_e {
IPA_HW_IRQ_GSI_HWP = (1 << 25),
IPA_HW_IRQ_GSI_IPA_IF_TLV_RCVD = (1 << 24),
IPA_HW_IRQ_GSI_EE_IRQ = (1 << 23),
IPA_HW_IRQ_DCMP_ERR = (1 << 22),
IPA_HW_IRQ_HWP_ERR = (1 << 21),
IPA_HW_IRQ_RED_MARKER_ABOVE = (1 << 20),
IPA_HW_IRQ_YELLOW_MARKER_ABOVE = (1 << 19),
IPA_HW_IRQ_RED_MARKER_BELOW = (1 << 18),
IPA_HW_IRQ_YELLOW_MARKER_BELOW = (1 << 17),
IPA_HW_IRQ_BAM_IDLE_IRQ = (1 << 16),
IPA_HW_IRQ_TX_HOLB_DROP = (1 << 15),
IPA_HW_IRQ_TX_SUSPEND = (1 << 14),
IPA_HW_IRQ_PROC_ERR = (1 << 13),
IPA_HW_IRQ_STEP_MODE = (1 << 12),
IPA_HW_IRQ_TX_ERR = (1 << 11),
IPA_HW_IRQ_DEAGGR_ERR = (1 << 10),
IPA_HW_IRQ_RX_ERR = (1 << 9),
IPA_HW_IRQ_PROC_TO_HW_ACK_Q_NOT_EMPTY = (1 << 8),
IPA_HW_IRQ_HWP_RX_CMD_Q_NOT_FULL = (1 << 7),
IPA_HW_IRQ_HWP_IN_Q_NOT_EMPTY = (1 << 6),
IPA_HW_IRQ_HWP_IRQ_3 = (1 << 5),
IPA_HW_IRQ_HWP_IRQ_2 = (1 << 4),
IPA_HW_IRQ_HWP_IRQ_1 = (1 << 3),
IPA_HW_IRQ_HWP_IRQ_0 = (1 << 2),
IPA_HW_IRQ_EOT_COAL = (1 << 1),
IPA_HW_IRQ_BAD_SNOC_ACCESS = (1 << 0),
IPA_HW_IRQ_NONE = 0,
IPA_HW_IRQ_ALL = 0xFFFFFFFF
};
/*
* All the IRQ sources supported by the IPA HW. Use this enum to set
* IRQ_SRCS register
*/
enum ipa_hw_irq_srcs_e {
IPA_HW_IRQ_SRCS_PIPE_0 = (1 << IPA_HW_PIPE_ID_0),
IPA_HW_IRQ_SRCS_PIPE_1 = (1 << IPA_HW_PIPE_ID_1),
IPA_HW_IRQ_SRCS_PIPE_2 = (1 << IPA_HW_PIPE_ID_2),
IPA_HW_IRQ_SRCS_PIPE_3 = (1 << IPA_HW_PIPE_ID_3),
IPA_HW_IRQ_SRCS_PIPE_4 = (1 << IPA_HW_PIPE_ID_4),
IPA_HW_IRQ_SRCS_PIPE_5 = (1 << IPA_HW_PIPE_ID_5),
IPA_HW_IRQ_SRCS_PIPE_6 = (1 << IPA_HW_PIPE_ID_6),
IPA_HW_IRQ_SRCS_PIPE_7 = (1 << IPA_HW_PIPE_ID_7),
IPA_HW_IRQ_SRCS_PIPE_8 = (1 << IPA_HW_PIPE_ID_8),
IPA_HW_IRQ_SRCS_PIPE_9 = (1 << IPA_HW_PIPE_ID_9),
IPA_HW_IRQ_SRCS_PIPE_10 = (1 << IPA_HW_PIPE_ID_10),
IPA_HW_IRQ_SRCS_PIPE_11 = (1 << IPA_HW_PIPE_ID_11),
IPA_HW_IRQ_SRCS_PIPE_12 = (1 << IPA_HW_PIPE_ID_12),
IPA_HW_IRQ_SRCS_PIPE_13 = (1 << IPA_HW_PIPE_ID_13),
IPA_HW_IRQ_SRCS_PIPE_14 = (1 << IPA_HW_PIPE_ID_14),
IPA_HW_IRQ_SRCS_PIPE_15 = (1 << IPA_HW_PIPE_ID_15),
IPA_HW_IRQ_SRCS_PIPE_16 = (1 << IPA_HW_PIPE_ID_16),
IPA_HW_IRQ_SRCS_PIPE_17 = (1 << IPA_HW_PIPE_ID_17),
IPA_HW_IRQ_SRCS_PIPE_18 = (1 << IPA_HW_PIPE_ID_18),
IPA_HW_IRQ_SRCS_PIPE_19 = (1 << IPA_HW_PIPE_ID_19),
IPA_HW_IRQ_SRCS_PIPE_20 = (1 << IPA_HW_PIPE_ID_20),
IPA_HW_IRQ_SRCS_PIPE_21 = (1 << IPA_HW_PIPE_ID_21),
IPA_HW_IRQ_SRCS_PIPE_22 = (1 << IPA_HW_PIPE_ID_22),
IPA_HW_IRQ_SRCS_NONE = 0,
IPA_HW_IRQ_SRCS_ALL = 0xFFFFFFFF,
};
/*
* Total number of channel contexts that need to be saved for APPS
*/
#define IPA_HW_REG_SAVE_GSI_NUM_CH_CNTXT_A7 20
/*
* Total number of channel contexts that need to be saved for UC
*/
#define IPA_HW_REG_SAVE_GSI_NUM_CH_CNTXT_UC 2
/*
* Total number of event ring contexts that need to be saved for APPS
*/
#define IPA_HW_REG_SAVE_GSI_NUM_EVT_CNTXT_A7 19
/*
* Total number of event ring contexts that need to be saved for UC
*/
#define IPA_HW_REG_SAVE_GSI_NUM_EVT_CNTXT_UC 1
/*
* Total number of endpoints for which ipa_reg_save.pipes[endp_number]
* are not saved by default (only if ipa_cfg.gen.full_reg_trace =
* true) There is no extra endpoints in Stingray
*/
#define IPA_HW_REG_SAVE_NUM_ENDP_EXTRA 0
/*
* Total number of endpoints for which ipa_reg_save.pipes[endp_number]
* are always saved
*/
#define IPA_HW_REG_SAVE_NUM_ACTIVE_PIPES IPA_HW_PIPE_ID_MAX
/*
* SHRAM Bytes per ch
*/
#define IPA_REG_SAVE_BYTES_PER_CHNL_SHRAM 12
/*
* Total number of rx splt cmdq's see:
* ipa_rx_splt_cmdq_n_cmd[IPA_RX_SPLT_CMDQ_MAX]
*/
#define IPA_RX_SPLT_CMDQ_MAX 4
/*
* Although not necessary for the numbers below, the use of round_up
* is so that future developers know that these particular constants
* have to be a multiple of four bytes, because the IPA memory reads
* that they drive are always 32 bits...
*/
#define IPA_IU_ADDR 0x000A0000
#define IPA_IU_SIZE round_up(40704, sizeof(u32))
#define IPA_SRAM_ADDR 0x00050000
#define IPA_SRAM_SIZE round_up(19232, sizeof(u32))
#define IPA_MBOX_ADDR 0x000C2000
#define IPA_MBOX_SIZE round_up(256, sizeof(u32))
#define IPA_HRAM_ADDR 0x00060000
#define IPA_HRAM_SIZE round_up(47536, sizeof(u32))
#define IPA_SEQ_ADDR 0x00081000
#define IPA_SEQ_SIZE round_up(768, sizeof(u32))
#define IPA_GSI_ADDR 0x00006000
#define IPA_GSI_SIZE round_up(5376, sizeof(u32))
/*
* Macro to define a particular register cfg entry for all pipe
* indexed register
*/
#define IPA_REG_SAVE_CFG_ENTRY_PIPE_ENDP(reg_name, var_name) \
({ GEN_1xVECTOR_REG_OFST(reg_name, 0), \
(u32 *)&ipa_reg_save.ipa.pipes[0].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 1), \
(u32 *)&ipa_reg_save.ipa.pipes[1].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 2), \
(u32 *)&ipa_reg_save.ipa.pipes[2].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 3), \
(u32 *)&ipa_reg_save.ipa.pipes[3].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 4), \
(u32 *)&ipa_reg_save.ipa.pipes[4].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 5), \
(u32 *)&ipa_reg_save.ipa.pipes[5].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 6), \
(u32 *)&ipa_reg_save.ipa.pipes[6].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 7), \
(u32 *)&ipa_reg_save.ipa.pipes[7].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 8), \
(u32 *)&ipa_reg_save.ipa.pipes[8].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 9), \
(u32 *)&ipa_reg_save.ipa.pipes[9].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 10), \
(u32 *)&ipa_reg_save.ipa.pipes[10].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 11), \
(u32 *)&ipa_reg_save.ipa.pipes[11].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 12), \
(u32 *)&ipa_reg_save.ipa.pipes[12].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 13), \
(u32 *)&ipa_reg_save.ipa.pipes[13].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 14), \
(u32 *)&ipa_reg_save.ipa.pipes[14].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 15), \
(u32 *)&ipa_reg_save.ipa.pipes[15].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 16), \
(u32 *)&ipa_reg_save.ipa.pipes[16].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 17), \
(u32 *)&ipa_reg_save.ipa.pipes[17].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 18), \
(u32 *)&ipa_reg_save.ipa.pipes[18].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 19), \
(u32 *)&ipa_reg_save.ipa.pipes[19].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 20), \
(u32 *)&ipa_reg_save.ipa.pipes[20].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 21), \
(u32 *)&ipa_reg_save.ipa.pipes[21].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 22), \
(u32 *)&ipa_reg_save.ipa.pipes[22].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 23), \
(u32 *)&ipa_reg_save.ipa.pipes[23].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 24), \
(u32 *)&ipa_reg_save.ipa.pipes[24].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 25), \
(u32 *)&ipa_reg_save.ipa.pipes[25].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 26), \
(u32 *)&ipa_reg_save.ipa.pipes[26].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 27), \
(u32 *)&ipa_reg_save.ipa.pipes[27].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 28), \
(u32 *)&ipa_reg_save.ipa.pipes[28].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 29), \
(u32 *)&ipa_reg_save.ipa.pipes[29].endp.var_name }, \
{ GEN_1xVECTOR_REG_OFST(reg_name, 30), \
(u32 *)&ipa_reg_save.ipa.pipes[30].endp.var_name })
/*
* Macro to define a particular register cfg entry for the remaining
* pipe indexed register. In Stingray case we don't have extra
* endpoints so it is intentially empty
*/
#define IPA_HW_REG_SAVE_CFG_ENTRY_PIPE_ENDP_EXTRA(REG_NAME, VAR_NAME) \
{ 0, 0 }
/*
* Macro to set the active flag for all active pipe indexed register
* In Stingray case we don't have extra endpoints so it is intentially
* empty
*/
#define IPA_HW_REG_SAVE_CFG_ENTRY_PIPE_ENDP_EXTRA_ACTIVE() \
do { \
} while (0)
#endif /* #if !defined(_IPA_HW_COMMON_EX_H_) */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*/
#if !defined(_IPA_PKT_CNTXT_H_)
#define _IPA_PKT_CNTXT_H_
#define IPA_HW_PKT_CTNTX_MAX 0x10
#define IPA_HW_NUM_SAVE_PKT_CTNTX 0x8
#define IPA_HW_PKT_CTNTX_START_ADDR 0xE434CA00
#define IPA_HW_PKT_CTNTX_SIZE (sizeof(ipa_pkt_ctntx_opcode_state_s) + \
sizeof(ipa_pkt_ctntx_u))
/*
* Packet Context States
*/
enum ipa_hw_pkt_cntxt_state_e {
IPA_HW_PKT_CNTXT_STATE_HFETCHER_INIT = 1,
IPA_HW_PKT_CNTXT_STATE_HFETCHER_DMAR,
IPA_HW_PKT_CNTXT_STATE_HFETCHER_DMAR_REP,
IPA_HW_PKT_CNTXT_STATE_H_DCPH,
IPA_HW_PKT_CNTXT_STATE_PKT_PARSER,
IPA_HW_PKT_CNTXT_STATE_FILTER_NAT,
IPA_HW_PKT_CNTXT_STATE_ROUTER,
IPA_HW_PKT_CNTXT_STATE_HDRI,
IPA_HW_PKT_CNTXT_STATE_UCP,
IPA_HW_PKT_CNTXT_STATE_ENQUEUER,
IPA_HW_PKT_CNTXT_STATE_DFETCHER,
IPA_HW_PKT_CNTXT_STATE_D_DCPH,
IPA_HW_PKT_CNTXT_STATE_DISPATCHER,
IPA_HW_PKT_CNTXT_STATE_TX,
IPA_HW_PKT_CNTXT_STATE_TX_ZLT,
IPA_HW_PKT_CNTXT_STATE_DFETCHER_DMAR,
IPA_HW_PKT_CNTXT_STATE_DCMP,
};
/*
* Packet Context fields as received from VI/Design
*/
struct ipa_pkt_ctntx_s {
u64 opcode : 8;
u64 state : 5;
u64 not_used_1 : 2;
u64 tx_pkt_dma_done : 1;
u64 exc_deagg : 1;
u64 exc_pkt_version : 1;
u64 exc_pkt_len : 1;
u64 exc_threshold : 1;
u64 exc_sw : 1;
u64 exc_nat : 1;
u64 exc_frag_miss : 1;
u64 filter_bypass : 1;
u64 router_bypass : 1;
u64 nat_bypass : 1;
u64 hdri_bypass : 1;
u64 dcph_bypass : 1;
u64 security_credentials_select : 1;
u64 pkt_2nd_pass : 1;
u64 xlat_bypass : 1;
u64 dcph_valid : 1;
u64 ucp_on : 1;
u64 replication : 1;
u64 src_status_en : 1;
u64 dest_status_en : 1;
u64 frag_status_en : 1;
u64 eot_dest : 1;
u64 eot_notif : 1;
u64 prev_eot_dest : 1;
u64 src_hdr_len : 8;
u64 tx_valid_sectors : 8;
u64 rx_flags : 8;
u64 rx_packet_length : 16;
u64 revised_packet_length : 16;
u64 frag_en : 1;
u64 frag_bypass : 1;
u64 frag_process : 1;
u64 notif_pipe : 5;
u64 src_id : 8;
u64 tx_pkt_transferred : 1;
u64 src_pipe : 5;
u64 dest_pipe : 5;
u64 frag_pipe : 5;
u64 ihl_offset : 8;
u64 protocol : 8;
u64 tos : 8;
u64 id : 16;
u64 v6_reserved : 4;
u64 ff : 1;
u64 mf : 1;
u64 pkt_israg : 1;
u64 tx_holb_timer_overflow : 1;
u64 tx_holb_timer_running : 1;
u64 trnseq_0 : 3;
u64 trnseq_1 : 3;
u64 trnseq_2 : 3;
u64 trnseq_3 : 3;
u64 trnseq_4 : 3;
u64 trnseq_ex_length : 8;
u64 trnseq_4_length : 8;
u64 trnseq_4_offset : 8;
u64 dps_tx_pop_cnt : 2;
u64 dps_tx_push_cnt : 2;
u64 vol_ic_dcph_cfg : 1;
u64 vol_ic_tag_stts : 1;
u64 vol_ic_pxkt_init_e : 1;
u64 vol_ic_pkt_init : 1;
u64 tx_holb_counter : 32;
u64 trnseq_0_length : 8;
u64 trnseq_0_offset : 8;
u64 trnseq_1_length : 8;
u64 trnseq_1_offset : 8;
u64 trnseq_2_length : 8;
u64 trnseq_2_offset : 8;
u64 trnseq_3_length : 8;
u64 trnseq_3_offset : 8;
u64 dmar_valid_length : 16;
u64 dcph_valid_length : 16;
u64 frag_hdr_offset : 9;
u64 ip_payload_offset : 9;
u64 frag_rule : 4;
u64 frag_table : 1;
u64 frag_hit : 1;
u64 data_cmdq_ptr : 8;
u64 filter_result : 6;
u64 router_result : 6;
u64 nat_result : 6;
u64 hdri_result : 6;
u64 dcph_result : 6;
u64 dcph_result_valid : 1;
u32 not_used_2 : 4;
u64 tx_pkt_suspended : 1;
u64 tx_pkt_dropped : 1;
u32 not_used_3 : 3;
u64 metadata_valid : 1;
u64 metadata_type : 4;
u64 ul_cs_start_diff : 9;
u64 cs_disable_trlr_vld_bit : 1;
u64 cs_required : 1;
u64 dest_hdr_len : 8;
u64 fr_l : 1;
u64 fl_h : 1;
u64 fr_g : 1;
u64 fr_ret : 1;
u64 fr_rule_id : 10;
u64 rt_l : 1;
u64 rt_h : 1;
u64 rtng_tbl_index : 5;
u64 rt_match : 1;
u64 rt_rule_id : 10;
u64 nat_tbl_index : 13;
u64 nat_type : 2;
u64 hdr_l : 1;
u64 header_offset : 10;
u64 not_used_4 : 1;
u64 filter_result_valid : 1;
u64 router_result_valid : 1;
u64 nat_result_valid : 1;
u64 hdri_result_valid : 1;
u64 not_used_5 : 1;
u64 stream_id : 8;
u64 not_used_6 : 6;
u64 dcph_context_index : 2;
u64 dcph_cfg_size : 16;
u64 dcph_cfg_count : 32;
u64 tag_info : 48;
u64 ucp_cmd_id : 16;
u64 metadata : 32;
u64 ucp_cmd_params : 32;
u64 nat_ip_address : 32;
u64 nat_ip_cs_diff : 16;
u64 frag_dest_pipe : 5;
u64 frag_nat_type : 2;
u64 fragr_ret : 1;
u64 frag_protocol : 8;
u64 src_ip_address : 32;
u64 dest_ip_address : 32;
u64 not_used_7 : 37;
u64 frag_hdr_l : 1;
u64 frag_header_offset : 10;
u64 frag_id : 16;
} __packed;
#endif /* #if !defined(_IPA_PKT_CNTXT_H_) */

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*/
#if !defined(_IPA_ACCESS_CONTROL_H_)
#define _IPA_ACCESS_CONTROL_H_
#include "ipa_reg_dump.h"
/*
* AA_COMBO - actual read, actual write
* AN_COMBO - actual read, no-op write
* NA_COMBO - no-op read, actual write
* NN_COMBO - no-op read, no-op write
*/
/*
* The following is target specific.
*/
static struct reg_mem_access_map_t mem_access_map[] = {
/*------------------------------------------------------------*/
/* Range Use when Use when */
/* Begin End SD_ENABLED SD_DISABLED */
/*------------------------------------------------------------*/
{ 0x04000, 0x04FFF, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0xA8000, 0xB7FFF, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x05000, 0x0EFFF, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x0F000, 0x0FFFF, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x18000, 0x29FFF, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x2A000, 0x3BFFF, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x3C000, 0x4DFFF, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x10000, 0x10FFF, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x11000, 0x11FFF, { &io_matrix[NN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x12000, 0x12FFF, { &io_matrix[NN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x14C000, 0x14CFFF, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x14D000, 0x14DFFF, { &io_matrix[NN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x14E000, 0x14FFFF, { &io_matrix[NN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x140000, 0x147FFF, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x148000, 0x14BFFF, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x150000, 0x15FFFF, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
{ 0x160000, 0x17FFFF, { &io_matrix[AN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x180000, 0x180FFF, { &io_matrix[NN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x181000, 0x19FFFF, { &io_matrix[AN_COMBO], &io_matrix[AN_COMBO] } },
{ 0x1A0000, 0x1BFFFF, { &io_matrix[AN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x1C0000, 0x1C1FFF, { &io_matrix[NN_COMBO], &io_matrix[NN_COMBO] } },
{ 0x1C2000, 0x1C3FFF, { &io_matrix[AA_COMBO], &io_matrix[AA_COMBO] } },
};
#endif /* #if !defined(_IPA_ACCESS_CONTROL_H_) */

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