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ARM: OMAP2+: clockdomain: Reintroduce SW_SLEEP Support

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Since commit 65aa94b204d (ARM: OMAP4: clockdomain/CM code: Update supported
transition modes), on OMAP4, all CLKDMs support HW_AUTO so this is used
instead of SW_SLEEP for the idling of clockdomains. However, additional
SoCs now leverage the OMAP4 clockdomain code so update it to use SW_SLEEP
if the clockdomain data specifies that the CLKDM has the
CLKDM_CAN_FORCE_SLEEP flag set rather than using HW_AUTO for both cases.

Without this patch, clockdomain handling is broken on AM43xx and no
clockdomains are actually being put into idle on this platform. Any
attempt to idle them results in the HW_AUTO value (0x3) being written
to them with no apparent effect.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[paul@pwsan.com: added extra explanatory text from patch set intro]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Dave Gerlach
2014-02-28 12:43:46 -07:00
committed by Paul Walmsley
parent a7daf64a34
commit f67f04ba27
1 changed files with 16 additions and 2 deletions
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18
arch/arm/mach-omap2/cminst44xx.c
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@ -254,6 +254,11 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
*
*/
void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
{
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
}
/**
* omap4_cminst_wait_module_ready - wait for a module to be in 'func' state
* @part: PRCM partition ID that the CM_CLKCTRL register exists in
@ -404,8 +409,17 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
static int omap4_clkdm_sleep(struct clockdomain *clkdm)
{
omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
clkdm->cm_inst, clkdm->clkdm_offs);
if (clkdm->flags & CLKDM_CAN_HWSUP)
omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
clkdm->cm_inst,
clkdm->clkdm_offs);
else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition,
clkdm->cm_inst,
clkdm->clkdm_offs);
else
return -EINVAL;
return 0;
}