Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6
This commit is contained in:
@ -1052,6 +1052,7 @@ struct ath5k_hw {
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bool ah_calibration;
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bool ah_running;
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bool ah_single_chip;
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bool ah_combined_mic;
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enum ath5k_rfgain ah_rf_gain;
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u32 ah_mac_srev;
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@ -317,6 +317,12 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version)
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goto err_free;
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}
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if (srev >= AR5K_SREV_AR2414) {
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ah->ah_combined_mic = true;
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AR5K_REG_ENABLE_BITS(ah, AR5K_MISC_MODE,
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AR5K_MISC_MODE_COMBINED_MIC);
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}
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/* MAC address is cleared until add_interface */
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ath5k_hw_set_lladdr(ah, mac);
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@ -267,24 +267,23 @@ void ath5k_hw_get_lladdr(struct ath5k_hw *ah, u8 *mac)
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* @mac: The card's mac address
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*
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* Set station id on hw using the provided mac address
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*
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* NOTE: This is only called during attach, don't call it
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* on reset because it overwrites all AR5K_STA_ID1 settings.
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* We have set_opmode (above) for reset.
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*/
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int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac)
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{
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u32 low_id, high_id;
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u32 pcu_reg;
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ATH5K_TRACE(ah->ah_sc);
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/* Set new station ID */
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memcpy(ah->ah_sta_id, mac, ETH_ALEN);
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pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
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low_id = AR5K_LOW_ID(mac);
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high_id = AR5K_HIGH_ID(mac);
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ath5k_hw_reg_write(ah, low_id, AR5K_STA_ID0);
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ath5k_hw_reg_write(ah, high_id, AR5K_STA_ID1);
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ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1);
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return 0;
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}
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@ -1014,6 +1013,23 @@ int ath5k_hw_is_key_valid(struct ath5k_hw *ah, u16 entry)
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AR5K_KEYTABLE_VALID;
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}
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static
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int ath5k_keycache_type(const struct ieee80211_key_conf *key)
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{
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switch (key->alg) {
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case ALG_TKIP:
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return AR5K_KEYTABLE_TYPE_TKIP;
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case ALG_CCMP:
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return AR5K_KEYTABLE_TYPE_CCM;
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case ALG_WEP:
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if (key->keylen == LEN_WEP40)
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return AR5K_KEYTABLE_TYPE_40;
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else if (key->keylen == LEN_WEP104)
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return AR5K_KEYTABLE_TYPE_104;
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}
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return -EINVAL;
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}
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/*
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* Set a key entry on the table
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*/
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@ -1028,6 +1044,7 @@ int ath5k_hw_set_key(struct ath5k_hw *ah, u16 entry,
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u32 keytype;
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u16 micentry = entry + AR5K_KEYTABLE_MIC_OFFSET;
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bool is_tkip;
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const u8 *key_ptr;
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ATH5K_TRACE(ah->ah_sc);
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@ -1043,33 +1060,25 @@ int ath5k_hw_set_key(struct ath5k_hw *ah, u16 entry,
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(is_tkip && micentry > AR5K_KEYTABLE_SIZE))
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return -EOPNOTSUPP;
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switch (keylen) {
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/* WEP 40-bit = 40-bit entered key + 24 bit IV = 64-bit */
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case 40 / 8:
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memcpy(&key_v[0], key->key, 5);
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keytype = AR5K_KEYTABLE_TYPE_40;
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break;
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if (unlikely(keylen > 16))
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return -EOPNOTSUPP;
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/* WEP 104-bit = 104-bit entered key + 24-bit IV = 128-bit */
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case 104 / 8:
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memcpy(&key_v[0], &key->key[0], 6);
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memcpy(&key_v[2], &key->key[6], 6);
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memcpy(&key_v[4], &key->key[12], 1);
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keytype = AR5K_KEYTABLE_TYPE_104;
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break;
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/* WEP/TKIP 128-bit = 128-bit entered key + 24 bit IV = 152-bit */
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case 128 / 8:
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memcpy(&key_v[0], &key->key[0], 6);
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memcpy(&key_v[2], &key->key[6], 6);
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memcpy(&key_v[4], &key->key[12], 4);
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keytype = is_tkip ?
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AR5K_KEYTABLE_TYPE_TKIP :
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AR5K_KEYTABLE_TYPE_128;
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break;
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keytype = ath5k_keycache_type(key);
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if (keytype < 0)
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return keytype;
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default:
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return -EINVAL; /* shouldn't happen */
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/*
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* each key block is 6 bytes wide, written as pairs of
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* alternating 32 and 16 bit le values.
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*/
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key_ptr = key->key;
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for (i = 0; keylen >= 6; keylen -= 6) {
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memcpy(&key_v[i], key_ptr, 6);
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i += 2;
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key_ptr += 6;
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}
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if (keylen)
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memcpy(&key_v[i], key_ptr, keylen);
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/* intentionally corrupt key until mic is installed */
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if (is_tkip) {
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@ -1087,20 +1096,20 @@ int ath5k_hw_set_key(struct ath5k_hw *ah, u16 entry,
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/* Install rx/tx MIC */
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rxmic = (__le32 *) &key->key[16];
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txmic = (__le32 *) &key->key[24];
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#if 0
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/* MISC_MODE register & 0x04 - for mac srev >= griffin */
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key_v[0] = rxmic[0];
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key_v[1] = (txmic[0] >> 16) & 0xffff;
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key_v[2] = rxmic[1];
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key_v[3] = txmic[0] & 0xffff;
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key_v[4] = txmic[1];
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#else
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key_v[0] = rxmic[0];
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key_v[1] = 0;
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key_v[2] = rxmic[1];
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key_v[3] = 0;
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key_v[4] = 0;
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#endif
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if (ah->ah_combined_mic) {
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key_v[0] = rxmic[0];
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key_v[1] = (txmic[0] >> 16) & 0xffff;
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key_v[2] = rxmic[1];
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key_v[3] = txmic[0] & 0xffff;
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key_v[4] = txmic[1];
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} else {
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key_v[0] = rxmic[0];
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key_v[1] = 0;
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key_v[2] = rxmic[1];
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key_v[3] = 0;
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key_v[4] = 0;
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}
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for (i = 0; i < ARRAY_SIZE(key_v); i++)
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ath5k_hw_reg_write(ah, le32_to_cpu(key_v[i]),
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AR5K_KEYTABLE_OFF(micentry, i));
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@ -1729,6 +1729,7 @@
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#define AR5K_MISC_MODE 0x8120 /* Register Address */
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#define AR5K_MISC_MODE_FBSSID_MATCH 0x00000001 /* Force BSSID match */
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#define AR5K_MISC_MODE_ACKSIFS_MEM 0x00000002 /* ACK SIFS memory (?) */
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#define AR5K_MISC_MODE_COMBINED_MIC 0x00000004 /* use rx/tx MIC key */
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/* more bits */
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/*
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@ -9,3 +9,14 @@ config ATH9K
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Atheros IEEE 802.11n AR5008 and AR9001 family of chipsets.
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If you choose to build a module, it'll be called ath9k.
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config ATH9K_DEBUG
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bool "Atheros ath9k debugging"
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depends on ATH9K
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---help---
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Say Y, if you need ath9k to display debug messages.
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Pass the debug mask as a module parameter:
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modprobe ath9k debug=0x00002000
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Look in ath9k/core.h for possible debug masks
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@ -11,4 +11,6 @@ ath9k-y += hw.o \
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xmit.o \
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rc.o
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ath9k-$(CONFIG_ATH9K_DEBUG) += debug.o
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obj-$(CONFIG_ATH9K) += ath9k.o
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@ -53,8 +53,8 @@ static bool ath9k_hw_ani_control(struct ath_hal *ah,
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if (level >= ARRAY_SIZE(ahp->ah_totalSizeDesired)) {
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DPRINTF(ah->ah_sc, ATH_DBG_ANI,
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"%s: level out of range (%u > %u)\n",
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__func__, level,
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"level out of range (%u > %u)\n",
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level,
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(unsigned)ARRAY_SIZE(ahp->ah_totalSizeDesired));
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return false;
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}
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@ -158,8 +158,8 @@ static bool ath9k_hw_ani_control(struct ath_hal *ah,
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if (level >= ARRAY_SIZE(firstep)) {
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DPRINTF(ah->ah_sc, ATH_DBG_ANI,
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"%s: level out of range (%u > %u)\n",
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__func__, level,
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"level out of range (%u > %u)\n",
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level,
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(unsigned) ARRAY_SIZE(firstep));
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return false;
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}
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@ -180,8 +180,8 @@ static bool ath9k_hw_ani_control(struct ath_hal *ah,
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if (level >= ARRAY_SIZE(cycpwrThr1)) {
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DPRINTF(ah->ah_sc, ATH_DBG_ANI,
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"%s: level out of range (%u > %u)\n",
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__func__, level,
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"level out of range (%u > %u)\n",
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level,
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(unsigned)
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ARRAY_SIZE(cycpwrThr1));
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return false;
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@ -200,11 +200,11 @@ static bool ath9k_hw_ani_control(struct ath_hal *ah,
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break;
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default:
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DPRINTF(ah->ah_sc, ATH_DBG_ANI,
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"%s: invalid cmd %u\n", __func__, cmd);
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"invalid cmd %u\n", cmd);
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return false;
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}
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DPRINTF(ah->ah_sc, ATH_DBG_ANI, "%s: ANI parameters:\n", __func__);
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DPRINTF(ah->ah_sc, ATH_DBG_ANI, "ANI parameters:\n");
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DPRINTF(ah->ah_sc, ATH_DBG_ANI,
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"noiseImmunityLevel=%d, spurImmunityLevel=%d, "
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"ofdmWeakSigDetectOff=%d\n",
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@ -262,8 +262,8 @@ static void ath9k_ani_restart(struct ath_hal *ah)
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AR_PHY_COUNTMAX - aniState->cckTrigHigh;
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}
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DPRINTF(ah->ah_sc, ATH_DBG_ANI,
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"%s: Writing ofdmbase=%u cckbase=%u\n",
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__func__, aniState->ofdmPhyErrBase,
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"Writing ofdmbase=%u cckbase=%u\n",
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aniState->ofdmPhyErrBase,
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aniState->cckPhyErrBase);
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REG_WRITE(ah, AR_PHY_ERR_1, aniState->ofdmPhyErrBase);
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REG_WRITE(ah, AR_PHY_ERR_2, aniState->cckPhyErrBase);
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@ -303,7 +303,7 @@ static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hal *ah)
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}
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}
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if (ah->ah_opmode == ATH9K_M_HOSTAP) {
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if (ah->ah_opmode == NL80211_IFTYPE_AP) {
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if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) {
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ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
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aniState->firstepLevel + 1);
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@ -368,7 +368,7 @@ static void ath9k_hw_ani_cck_err_trigger(struct ath_hal *ah)
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return;
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}
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}
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if (ah->ah_opmode == ATH9K_M_HOSTAP) {
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if (ah->ah_opmode == NL80211_IFTYPE_AP) {
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if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) {
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ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
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aniState->firstepLevel + 1);
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@ -398,7 +398,7 @@ static void ath9k_hw_ani_lower_immunity(struct ath_hal *ah)
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|
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aniState = ahp->ah_curani;
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if (ah->ah_opmode == ATH9K_M_HOSTAP) {
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if (ah->ah_opmode == NL80211_IFTYPE_AP) {
|
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if (aniState->firstepLevel > 0) {
|
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if (ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
|
||||
aniState->firstepLevel - 1))
|
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@ -487,11 +487,10 @@ void ath9k_ani_reset(struct ath_hal *ah)
|
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aniState = &ahp->ah_ani[index];
|
||||
ahp->ah_curani = aniState;
|
||||
|
||||
if (DO_ANI(ah) && ah->ah_opmode != ATH9K_M_STA
|
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&& ah->ah_opmode != ATH9K_M_IBSS) {
|
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if (DO_ANI(ah) && ah->ah_opmode != NL80211_IFTYPE_STATION
|
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&& ah->ah_opmode != NL80211_IFTYPE_ADHOC) {
|
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DPRINTF(ah->ah_sc, ATH_DBG_ANI,
|
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"%s: Reset ANI state opmode %u\n", __func__,
|
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ah->ah_opmode);
|
||||
"Reset ANI state opmode %u\n", ah->ah_opmode);
|
||||
ahp->ah_stats.ast_ani_reset++;
|
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|
||||
ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, 0);
|
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@ -505,7 +504,7 @@ void ath9k_ani_reset(struct ath_hal *ah)
|
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ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) |
|
||||
ATH9K_RX_FILTER_PHYERR);
|
||||
|
||||
if (ah->ah_opmode == ATH9K_M_HOSTAP) {
|
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if (ah->ah_opmode == NL80211_IFTYPE_AP) {
|
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ahp->ah_curani->ofdmTrigHigh =
|
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ah->ah_config.ofdm_trig_high;
|
||||
ahp->ah_curani->ofdmTrigLow =
|
||||
@ -581,9 +580,9 @@ void ath9k_hw_ani_monitor(struct ath_hal *ah,
|
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phyCnt2 < aniState->cckPhyErrBase) {
|
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if (phyCnt1 < aniState->ofdmPhyErrBase) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
|
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"%s: phyCnt1 0x%x, resetting "
|
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"phyCnt1 0x%x, resetting "
|
||||
"counter value to 0x%x\n",
|
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__func__, phyCnt1,
|
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phyCnt1,
|
||||
aniState->ofdmPhyErrBase);
|
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REG_WRITE(ah, AR_PHY_ERR_1,
|
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aniState->ofdmPhyErrBase);
|
||||
@ -592,9 +591,9 @@ void ath9k_hw_ani_monitor(struct ath_hal *ah,
|
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}
|
||||
if (phyCnt2 < aniState->cckPhyErrBase) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_ANI,
|
||||
"%s: phyCnt2 0x%x, resetting "
|
||||
"phyCnt2 0x%x, resetting "
|
||||
"counter value to 0x%x\n",
|
||||
__func__, phyCnt2,
|
||||
phyCnt2,
|
||||
aniState->cckPhyErrBase);
|
||||
REG_WRITE(ah, AR_PHY_ERR_2,
|
||||
aniState->cckPhyErrBase);
|
||||
@ -692,8 +691,7 @@ u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hal *ah,
|
||||
|
||||
if (cycles == 0 || cycles > cc) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: cycle counter wrap. ExtBusy = 0\n",
|
||||
__func__);
|
||||
"cycle counter wrap. ExtBusy = 0\n");
|
||||
good = 0;
|
||||
} else {
|
||||
u32 cc_d = cc - cycles;
|
||||
|
@ -647,13 +647,6 @@ enum ath9k_ant_setting {
|
||||
ATH9K_ANT_FIXED_B
|
||||
};
|
||||
|
||||
enum ath9k_opmode {
|
||||
ATH9K_M_STA = 1,
|
||||
ATH9K_M_IBSS = 0,
|
||||
ATH9K_M_HOSTAP = 6,
|
||||
ATH9K_M_MONITOR = 8
|
||||
};
|
||||
|
||||
#define ATH9K_SLOT_TIME_6 6
|
||||
#define ATH9K_SLOT_TIME_9 9
|
||||
#define ATH9K_SLOT_TIME_20 20
|
||||
@ -780,7 +773,8 @@ struct ath_hal {
|
||||
|
||||
void __iomem *ah_sh;
|
||||
struct ath_softc *ah_sc;
|
||||
enum ath9k_opmode ah_opmode;
|
||||
|
||||
enum nl80211_iftype ah_opmode;
|
||||
struct ath9k_ops_config ah_config;
|
||||
struct ath9k_hw_capabilities ah_caps;
|
||||
|
||||
@ -1009,7 +1003,6 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints);
|
||||
|
||||
/* MAC (PCU/QCU) */
|
||||
|
||||
void ath9k_hw_dmaRegDump(struct ath_hal *ah);
|
||||
u32 ath9k_hw_gettxbuf(struct ath_hal *ah, u32 q);
|
||||
bool ath9k_hw_puttxbuf(struct ath_hal *ah, u32 q, u32 txdp);
|
||||
bool ath9k_hw_txstart(struct ath_hal *ah, u32 q);
|
||||
|
@ -27,7 +27,7 @@ static int ath_beaconq_config(struct ath_softc *sc)
|
||||
struct ath9k_tx_queue_info qi;
|
||||
|
||||
ath9k_hw_get_txq_props(ah, sc->sc_bhalq, &qi);
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
|
||||
/* Always burst out beacon and CAB traffic. */
|
||||
qi.tqi_aifs = 1;
|
||||
qi.tqi_cwmin = 0;
|
||||
@ -41,8 +41,7 @@ static int ath_beaconq_config(struct ath_softc *sc)
|
||||
|
||||
if (!ath9k_hw_set_txq_props(ah, sc->sc_bhalq, &qi)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to update h/w beacon queue parameters\n",
|
||||
__func__);
|
||||
"unable to update h/w beacon queue parameters\n");
|
||||
return 0;
|
||||
} else {
|
||||
ath9k_hw_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
|
||||
@ -53,8 +52,8 @@ static int ath_beaconq_config(struct ath_softc *sc)
|
||||
static void ath_bstuck_process(struct ath_softc *sc)
|
||||
{
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: stuck beacon; resetting (bmiss count %u)\n",
|
||||
__func__, sc->sc_bmisscount);
|
||||
"stuck beacon; resetting (bmiss count %u)\n",
|
||||
sc->sc_bmisscount);
|
||||
ath_reset(sc, false);
|
||||
}
|
||||
|
||||
@ -76,15 +75,14 @@ static void ath_beacon_setup(struct ath_softc *sc,
|
||||
int ctsrate = 0;
|
||||
int ctsduration = 0;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "%s: m %p len %u\n",
|
||||
__func__, skb, skb->len);
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "m %p len %u\n", skb, skb->len);
|
||||
|
||||
/* setup descriptors */
|
||||
ds = bf->bf_desc;
|
||||
|
||||
flags = ATH9K_TXDESC_NOACK;
|
||||
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_IBSS &&
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
|
||||
(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
|
||||
ds->ds_link = bf->bf_daddr; /* self-linked */
|
||||
flags |= ATH9K_TXDESC_VEOL;
|
||||
@ -158,8 +156,8 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
|
||||
cabq = sc->sc_cabq;
|
||||
|
||||
if (avp->av_bcbuf == NULL) {
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "%s: avp=%p av_bcbuf=%p\n",
|
||||
__func__, avp, avp->av_bcbuf);
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
|
||||
avp, avp->av_bcbuf);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@ -192,6 +190,13 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
|
||||
pci_map_single(sc->pdev, skb->data,
|
||||
skb->len,
|
||||
PCI_DMA_TODEVICE);
|
||||
if (unlikely(pci_dma_mapping_error(sc->pdev, bf->bf_buf_addr))) {
|
||||
dev_kfree_skb_any(skb);
|
||||
bf->bf_mpdu = NULL;
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"pci_dma_mapping_error() on beaconing\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
skb = ieee80211_get_buffered_bc(sc->hw, vif);
|
||||
|
||||
@ -216,7 +221,7 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
|
||||
if (sc->sc_nvaps > 1) {
|
||||
ath_tx_draintxq(sc, cabq, false);
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: flush previous cabq traffic\n", __func__);
|
||||
"flush previous cabq traffic\n");
|
||||
}
|
||||
}
|
||||
|
||||
@ -253,8 +258,8 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id)
|
||||
avp = (void *)vif->drv_priv;
|
||||
|
||||
if (avp->av_bcbuf == NULL) {
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "%s: avp=%p av_bcbuf=%p\n",
|
||||
__func__, avp, avp != NULL ? avp->av_bcbuf : NULL);
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
|
||||
avp, avp != NULL ? avp->av_bcbuf : NULL);
|
||||
return;
|
||||
}
|
||||
bf = avp->av_bcbuf;
|
||||
@ -266,7 +271,7 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id)
|
||||
/* NB: caller is known to have already stopped tx dma */
|
||||
ath9k_hw_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
|
||||
ath9k_hw_txstart(ah, sc->sc_bhalq);
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "%s: TXDP%u = %llx (%p)\n", __func__,
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
|
||||
sc->sc_bhalq, ito64(bf->bf_daddr), bf->bf_desc);
|
||||
}
|
||||
|
||||
@ -304,7 +309,7 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id)
|
||||
struct ath_buf, list);
|
||||
list_del(&avp->av_bcbuf->list);
|
||||
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP ||
|
||||
!(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
|
||||
int slot;
|
||||
/*
|
||||
@ -351,8 +356,7 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id)
|
||||
*/
|
||||
skb = ieee80211_beacon_get(sc->hw, vif);
|
||||
if (skb == NULL) {
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "%s: cannot get skb\n",
|
||||
__func__);
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
@ -388,19 +392,25 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id)
|
||||
val = cpu_to_le64(tsfadjust << 10); /* TU->TSF */
|
||||
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: %s beacons, bslot %d intval %u tsfadjust %llu\n",
|
||||
__func__, "stagger",
|
||||
"stagger beacons, bslot %d intval %u tsfadjust %llu\n",
|
||||
avp->av_bslot, intval, (unsigned long long)tsfadjust);
|
||||
|
||||
hdr = (struct ieee80211_hdr *)skb->data;
|
||||
memcpy(&hdr[1], &val, sizeof(val));
|
||||
}
|
||||
|
||||
bf->bf_mpdu = skb;
|
||||
bf->bf_buf_addr = bf->bf_dmacontext =
|
||||
pci_map_single(sc->pdev, skb->data,
|
||||
skb->len,
|
||||
PCI_DMA_TODEVICE);
|
||||
bf->bf_mpdu = skb;
|
||||
if (unlikely(pci_dma_mapping_error(sc->pdev, bf->bf_buf_addr))) {
|
||||
dev_kfree_skb_any(skb);
|
||||
bf->bf_mpdu = NULL;
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"pci_dma_mapping_error() on beacon alloc\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -468,40 +478,38 @@ void ath9k_beacon_tasklet(unsigned long data)
|
||||
if (sc->sc_bmisscount < BSTUCK_THRESH) {
|
||||
if (sc->sc_flags & SC_OP_NO_RESET) {
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: missed %u consecutive beacons\n",
|
||||
__func__, sc->sc_bmisscount);
|
||||
"missed %u consecutive beacons\n",
|
||||
sc->sc_bmisscount);
|
||||
if (show_cycles) {
|
||||
/*
|
||||
* Display cycle counter stats from HW
|
||||
* to aide in debug of stickiness.
|
||||
*/
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: busy times: rx_clear=%d, "
|
||||
"busy times: rx_clear=%d, "
|
||||
"rx_frame=%d, tx_frame=%d\n",
|
||||
__func__, rx_clear, rx_frame,
|
||||
rx_clear, rx_frame,
|
||||
tx_frame);
|
||||
} else {
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: unable to obtain "
|
||||
"busy times\n", __func__);
|
||||
"unable to obtain "
|
||||
"busy times\n");
|
||||
}
|
||||
} else {
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: missed %u consecutive beacons\n",
|
||||
__func__, sc->sc_bmisscount);
|
||||
"missed %u consecutive beacons\n",
|
||||
sc->sc_bmisscount);
|
||||
}
|
||||
} else if (sc->sc_bmisscount >= BSTUCK_THRESH) {
|
||||
if (sc->sc_flags & SC_OP_NO_RESET) {
|
||||
if (sc->sc_bmisscount == BSTUCK_THRESH) {
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: beacon is officially "
|
||||
"stuck\n", __func__);
|
||||
ath9k_hw_dmaRegDump(ah);
|
||||
"beacon is officially "
|
||||
"stuck\n");
|
||||
}
|
||||
} else {
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: beacon is officially stuck\n",
|
||||
__func__);
|
||||
"beacon is officially stuck\n");
|
||||
ath_bstuck_process(sc);
|
||||
}
|
||||
}
|
||||
@ -511,12 +519,12 @@ void ath9k_beacon_tasklet(unsigned long data)
|
||||
if (sc->sc_bmisscount != 0) {
|
||||
if (sc->sc_flags & SC_OP_NO_RESET) {
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: resume beacon xmit after %u misses\n",
|
||||
__func__, sc->sc_bmisscount);
|
||||
"resume beacon xmit after %u misses\n",
|
||||
sc->sc_bmisscount);
|
||||
} else {
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: resume beacon xmit after %u misses\n",
|
||||
__func__, sc->sc_bmisscount);
|
||||
"resume beacon xmit after %u misses\n",
|
||||
sc->sc_bmisscount);
|
||||
}
|
||||
sc->sc_bmisscount = 0;
|
||||
}
|
||||
@ -536,8 +544,8 @@ void ath9k_beacon_tasklet(unsigned long data)
|
||||
if_id = sc->sc_bslot[(slot + 1) % ATH_BCBUF];
|
||||
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
|
||||
__func__, slot, (unsigned long long)tsf, tsftu,
|
||||
"slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
|
||||
slot, (unsigned long long)tsf, tsftu,
|
||||
intval, if_id);
|
||||
|
||||
bfaddr = 0;
|
||||
@ -580,8 +588,7 @@ void ath9k_beacon_tasklet(unsigned long data)
|
||||
*/
|
||||
if (!ath9k_hw_stoptxdma(ah, sc->sc_bhalq)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: beacon queue %u did not stop?\n",
|
||||
__func__, sc->sc_bhalq);
|
||||
"beacon queue %u did not stop?\n", sc->sc_bhalq);
|
||||
/* NB: the HAL still stops DMA, so proceed */
|
||||
}
|
||||
|
||||
@ -614,16 +621,16 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
|
||||
struct ath_hal *ah = sc->sc_ah;
|
||||
struct ath_beacon_config conf;
|
||||
struct ath_vap *avp;
|
||||
enum ath9k_opmode av_opmode;
|
||||
enum nl80211_iftype opmode;
|
||||
u32 nexttbtt, intval;
|
||||
|
||||
if (if_id != ATH_IF_ID_ANY) {
|
||||
vif = sc->sc_vaps[if_id];
|
||||
ASSERT(vif);
|
||||
avp = (void *)vif->drv_priv;
|
||||
av_opmode = avp->av_opmode;
|
||||
opmode = avp->av_opmode;
|
||||
} else {
|
||||
av_opmode = sc->sc_ah->ah_opmode;
|
||||
opmode = sc->sc_ah->ah_opmode;
|
||||
}
|
||||
|
||||
memset(&conf, 0, sizeof(struct ath_beacon_config));
|
||||
@ -639,7 +646,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
|
||||
nexttbtt = TSF_TO_TU(sc->bc_tstamp >> 32, sc->bc_tstamp);
|
||||
|
||||
/* XXX conditionalize multi-bss support? */
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
|
||||
/*
|
||||
* For multi-bss ap support beacons are either staggered
|
||||
* evenly over N slots or burst together. For the former
|
||||
@ -658,11 +665,11 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
|
||||
else if (intval) /* NB: can be 0 for monitor mode */
|
||||
nexttbtt = roundup(nexttbtt, intval);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
|
||||
__func__, nexttbtt, intval, conf.beacon_interval);
|
||||
DPRINTF(sc, ATH_DBG_BEACON, "nexttbtt %u intval %u (%u)\n",
|
||||
nexttbtt, intval, conf.beacon_interval);
|
||||
|
||||
/* Check for ATH9K_M_HOSTAP and sc_nostabeacons for WDS client */
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_STA) {
|
||||
/* Check for NL80211_IFTYPE_AP and sc_nostabeacons for WDS client */
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION) {
|
||||
struct ath9k_beacon_state bs;
|
||||
u64 tsf;
|
||||
u32 tsftu;
|
||||
@ -746,7 +753,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
|
||||
bs.bs_sleepduration = bs.bs_dtimperiod;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: tsf %llu "
|
||||
"tsf %llu "
|
||||
"tsf:tu %u "
|
||||
"intval %u "
|
||||
"nexttbtt %u "
|
||||
@ -758,7 +765,6 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
|
||||
"maxdur %u "
|
||||
"next %u "
|
||||
"timoffset %u\n",
|
||||
__func__,
|
||||
(unsigned long long)tsf, tsftu,
|
||||
bs.bs_intval,
|
||||
bs.bs_nexttbtt,
|
||||
@ -782,7 +788,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
|
||||
ath9k_hw_set_interrupts(ah, 0);
|
||||
if (nexttbtt == intval)
|
||||
intval |= ATH9K_BEACON_RESET_TSF;
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC) {
|
||||
/*
|
||||
* Pull nexttbtt forward to reflect the current
|
||||
* TSF
|
||||
@ -798,8 +804,8 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
|
||||
}
|
||||
#undef FUDGE
|
||||
DPRINTF(sc, ATH_DBG_BEACON,
|
||||
"%s: IBSS nexttbtt %u intval %u (%u)\n",
|
||||
__func__, nexttbtt,
|
||||
"IBSS nexttbtt %u intval %u (%u)\n",
|
||||
nexttbtt,
|
||||
intval & ~ATH9K_BEACON_RESET_TSF,
|
||||
conf.beacon_interval);
|
||||
|
||||
@ -814,7 +820,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
|
||||
if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
|
||||
sc->sc_imask |= ATH9K_INT_SWBA;
|
||||
ath_beaconq_config(sc);
|
||||
} else if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
|
||||
} else if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
|
||||
/*
|
||||
* In AP mode we enable the beacon timers and
|
||||
* SWBA interrupts to prepare beacon frames.
|
||||
@ -830,7 +836,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
|
||||
* When using a self-linked beacon descriptor in
|
||||
* ibss mode load it once here.
|
||||
*/
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_IBSS &&
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
|
||||
(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
|
||||
ath_beacon_start_adhoc(sc, 0);
|
||||
}
|
||||
|
@ -31,11 +31,11 @@ static const int16_t NOISE_FLOOR[] = { -96, -93, -98, -96, -93, -96 };
|
||||
static bool ath9k_hw_nf_in_range(struct ath_hal *ah, s16 nf)
|
||||
{
|
||||
if (nf > ATH9K_NF_TOO_LOW) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
|
||||
"%s: noise floor value detected (%d) is "
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"noise floor value detected (%d) is "
|
||||
"lower than what we think is a "
|
||||
"reasonable value (%d)\n",
|
||||
__func__, nf, ATH9K_NF_TOO_LOW);
|
||||
nf, ATH9K_NF_TOO_LOW);
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
@ -116,7 +116,7 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah,
|
||||
|
||||
if (nf & 0x100)
|
||||
nf = 0 - ((nf ^ 0x1ff) + 1);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"NF calibrated [ctl] [chain 1] is %d\n", nf);
|
||||
nfarray[1] = nf;
|
||||
|
||||
@ -125,7 +125,7 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah,
|
||||
AR_PHY_CH2_MINCCA_PWR);
|
||||
if (nf & 0x100)
|
||||
nf = 0 - ((nf ^ 0x1ff) + 1);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"NF calibrated [ctl] [chain 2] is %d\n", nf);
|
||||
nfarray[2] = nf;
|
||||
}
|
||||
@ -139,7 +139,7 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah,
|
||||
|
||||
if (nf & 0x100)
|
||||
nf = 0 - ((nf ^ 0x1ff) + 1);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"NF calibrated [ext] [chain 0] is %d\n", nf);
|
||||
nfarray[3] = nf;
|
||||
|
||||
@ -161,7 +161,7 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah,
|
||||
AR_PHY_CH2_EXT_MINCCA_PWR);
|
||||
if (nf & 0x100)
|
||||
nf = 0 - ((nf ^ 0x1ff) + 1);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"NF calibrated [ext] [chain 2] is %d\n", nf);
|
||||
nfarray[5] = nf;
|
||||
}
|
||||
@ -187,8 +187,7 @@ static bool getNoiseFloorThresh(struct ath_hal *ah,
|
||||
break;
|
||||
default:
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: invalid channel flags 0x%x\n", __func__,
|
||||
chan->channelFlags);
|
||||
"invalid channel flags 0x%x\n", chan->channelFlags);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -206,24 +205,22 @@ static void ath9k_hw_setup_calibration(struct ath_hal *ah,
|
||||
case IQ_MISMATCH_CAL:
|
||||
REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: starting IQ Mismatch Calibration\n",
|
||||
__func__);
|
||||
"starting IQ Mismatch Calibration\n");
|
||||
break;
|
||||
case ADC_GAIN_CAL:
|
||||
REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: starting ADC Gain Calibration\n", __func__);
|
||||
"starting ADC Gain Calibration\n");
|
||||
break;
|
||||
case ADC_DC_CAL:
|
||||
REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: starting ADC DC Calibration\n", __func__);
|
||||
"starting ADC DC Calibration\n");
|
||||
break;
|
||||
case ADC_DC_INIT_CAL:
|
||||
REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_INIT);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: starting Init ADC DC Calibration\n",
|
||||
__func__);
|
||||
"starting Init ADC DC Calibration\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -594,16 +591,16 @@ void ath9k_hw_reset_calvalid(struct ath_hal *ah, struct ath9k_channel *chan,
|
||||
|
||||
if (ichan == NULL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: invalid channel %u/0x%x; no mapping\n",
|
||||
__func__, chan->channel, chan->channelFlags);
|
||||
"invalid channel %u/0x%x; no mapping\n",
|
||||
chan->channel, chan->channelFlags);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
if (currCal->calState != CAL_DONE) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: Calibration state incorrect, %d\n",
|
||||
__func__, currCal->calState);
|
||||
"Calibration state incorrect, %d\n",
|
||||
currCal->calState);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -612,8 +609,8 @@ void ath9k_hw_reset_calvalid(struct ath_hal *ah, struct ath9k_channel *chan,
|
||||
return;
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: Resetting Cal %d state for channel %u/0x%x\n",
|
||||
__func__, currCal->calData->calType, chan->channel,
|
||||
"Resetting Cal %d state for channel %u/0x%x\n",
|
||||
currCal->calData->calType, chan->channel,
|
||||
chan->channelFlags);
|
||||
|
||||
ichan->CalValid &= ~currCal->calData->calType;
|
||||
@ -705,8 +702,7 @@ int16_t ath9k_hw_getnf(struct ath_hal *ah,
|
||||
chan->channelFlags &= (~CHANNEL_CW_INT);
|
||||
if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: NF did not complete in calibration window\n",
|
||||
__func__);
|
||||
"NF did not complete in calibration window\n");
|
||||
nf = 0;
|
||||
chan->rawNoiseFloor = nf;
|
||||
return chan->rawNoiseFloor;
|
||||
@ -716,8 +712,8 @@ int16_t ath9k_hw_getnf(struct ath_hal *ah,
|
||||
if (getNoiseFloorThresh(ah, chan, &nfThresh)
|
||||
&& nf > nfThresh) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: noise floor failed detected; "
|
||||
"detected %d, threshold %d\n", __func__,
|
||||
"noise floor failed detected; "
|
||||
"detected %d, threshold %d\n",
|
||||
nf, nfThresh);
|
||||
chan->channelFlags |= CHANNEL_CW_INT;
|
||||
}
|
||||
@ -759,9 +755,9 @@ s16 ath9k_hw_getchan_noise(struct ath_hal *ah, struct ath9k_channel *chan)
|
||||
|
||||
ichan = ath9k_regd_check_channel(ah, chan);
|
||||
if (ichan == NULL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_NF_CAL,
|
||||
"%s: invalid channel %u/0x%x; no mapping\n",
|
||||
__func__, chan->channel, chan->channelFlags);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"invalid channel %u/0x%x; no mapping\n",
|
||||
chan->channel, chan->channelFlags);
|
||||
return ATH_DEFAULT_NOISE_FLOOR;
|
||||
}
|
||||
if (ichan->rawNoiseFloor == 0) {
|
||||
@ -788,8 +784,8 @@ bool ath9k_hw_calibrate(struct ath_hal *ah, struct ath9k_channel *chan,
|
||||
|
||||
if (ichan == NULL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: invalid channel %u/0x%x; no mapping\n",
|
||||
__func__, chan->channel, chan->channelFlags);
|
||||
"invalid channel %u/0x%x; no mapping\n",
|
||||
chan->channel, chan->channelFlags);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -834,8 +830,8 @@ bool ath9k_hw_init_cal(struct ath_hal *ah,
|
||||
|
||||
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: offset calibration failed to complete in 1ms; "
|
||||
"noisy environment?\n", __func__);
|
||||
"offset calibration failed to complete in 1ms; "
|
||||
"noisy environment?\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -850,22 +846,19 @@ bool ath9k_hw_init_cal(struct ath_hal *ah,
|
||||
INIT_CAL(&ahp->ah_adcGainCalData);
|
||||
INSERT_CAL(ahp, &ahp->ah_adcGainCalData);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: enabling ADC Gain Calibration.\n",
|
||||
__func__);
|
||||
"enabling ADC Gain Calibration.\n");
|
||||
}
|
||||
if (ath9k_hw_iscal_supported(ah, chan, ADC_DC_CAL)) {
|
||||
INIT_CAL(&ahp->ah_adcDcCalData);
|
||||
INSERT_CAL(ahp, &ahp->ah_adcDcCalData);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: enabling ADC DC Calibration.\n",
|
||||
__func__);
|
||||
"enabling ADC DC Calibration.\n");
|
||||
}
|
||||
if (ath9k_hw_iscal_supported(ah, chan, IQ_MISMATCH_CAL)) {
|
||||
INIT_CAL(&ahp->ah_iqCalData);
|
||||
INSERT_CAL(ahp, &ahp->ah_iqCalData);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
|
||||
"%s: enabling IQ Calibration.\n",
|
||||
__func__);
|
||||
"enabling IQ Calibration.\n");
|
||||
}
|
||||
|
||||
ahp->ah_cal_list_curr = ahp->ah_cal_list;
|
||||
|
@ -17,27 +17,8 @@
|
||||
#ifndef CORE_H
|
||||
#define CORE_H
|
||||
|
||||
#include <linux/version.h>
|
||||
#include <linux/autoconf.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/ip.h>
|
||||
#include <linux/tcp.h>
|
||||
#include <linux/in.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/wait.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/list.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <asm/page.h>
|
||||
#include <net/mac80211.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/rfkill.h>
|
||||
@ -84,52 +65,64 @@ struct ath_node;
|
||||
|
||||
static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
|
||||
|
||||
/*************/
|
||||
/* Debugging */
|
||||
/*************/
|
||||
|
||||
enum ATH_DEBUG {
|
||||
ATH_DBG_RESET = 0x00000001,
|
||||
ATH_DBG_PHY_IO = 0x00000002,
|
||||
ATH_DBG_REG_IO = 0x00000004,
|
||||
ATH_DBG_QUEUE = 0x00000008,
|
||||
ATH_DBG_EEPROM = 0x00000010,
|
||||
ATH_DBG_NF_CAL = 0x00000020,
|
||||
ATH_DBG_CALIBRATE = 0x00000040,
|
||||
ATH_DBG_CHANNEL = 0x00000080,
|
||||
ATH_DBG_INTERRUPT = 0x00000100,
|
||||
ATH_DBG_REGULATORY = 0x00000200,
|
||||
ATH_DBG_ANI = 0x00000400,
|
||||
ATH_DBG_POWER_MGMT = 0x00000800,
|
||||
ATH_DBG_XMIT = 0x00001000,
|
||||
ATH_DBG_BEACON = 0x00002000,
|
||||
ATH_DBG_RATE = 0x00004000,
|
||||
ATH_DBG_CONFIG = 0x00008000,
|
||||
ATH_DBG_KEYCACHE = 0x00010000,
|
||||
ATH_DBG_AGGR = 0x00020000,
|
||||
ATH_DBG_FATAL = 0x00040000,
|
||||
ATH_DBG_REG_IO = 0x00000002,
|
||||
ATH_DBG_QUEUE = 0x00000004,
|
||||
ATH_DBG_EEPROM = 0x00000008,
|
||||
ATH_DBG_CALIBRATE = 0x00000010,
|
||||
ATH_DBG_CHANNEL = 0x00000020,
|
||||
ATH_DBG_INTERRUPT = 0x00000040,
|
||||
ATH_DBG_REGULATORY = 0x00000080,
|
||||
ATH_DBG_ANI = 0x00000100,
|
||||
ATH_DBG_POWER_MGMT = 0x00000200,
|
||||
ATH_DBG_XMIT = 0x00000400,
|
||||
ATH_DBG_BEACON = 0x00001000,
|
||||
ATH_DBG_CONFIG = 0x00002000,
|
||||
ATH_DBG_KEYCACHE = 0x00004000,
|
||||
ATH_DBG_FATAL = 0x00008000,
|
||||
ATH_DBG_ANY = 0xffffffff
|
||||
};
|
||||
|
||||
#define DBG_DEFAULT (ATH_DBG_FATAL)
|
||||
|
||||
#define DPRINTF(sc, _m, _fmt, ...) do { \
|
||||
if (sc->sc_debug & (_m)) \
|
||||
printk(_fmt , ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
#ifdef CONFIG_ATH9K_DEBUG
|
||||
|
||||
/***************************/
|
||||
/* Load-time Configuration */
|
||||
/***************************/
|
||||
struct ath9k_debug {
|
||||
int debug_mask;
|
||||
struct dentry *debugfs_root;
|
||||
struct dentry *debugfs_phy;
|
||||
struct dentry *debugfs_dma;
|
||||
};
|
||||
|
||||
void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...);
|
||||
int ath9k_init_debug(struct ath_softc *sc);
|
||||
void ath9k_exit_debug(struct ath_softc *sc);
|
||||
|
||||
#else
|
||||
|
||||
static inline void DPRINTF(struct ath_softc *sc, int dbg_mask,
|
||||
const char *fmt, ...)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int ath9k_init_debug(struct ath_softc *sc)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void ath9k_exit_debug(struct ath_softc *sc)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* CONFIG_ATH9K_DEBUG */
|
||||
|
||||
/* Per-instance load-time (note: NOT run-time) configurations
|
||||
* for Atheros Device */
|
||||
struct ath_config {
|
||||
u32 ath_aggr_prot;
|
||||
u16 txpowlimit;
|
||||
u16 txpowlimit_override;
|
||||
u8 cabqReadytime; /* Cabq Readytime % */
|
||||
u8 swBeaconProcess; /* Process received beacons in SW (vs HW) */
|
||||
u8 cabqReadytime;
|
||||
u8 swBeaconProcess;
|
||||
};
|
||||
|
||||
/*************************/
|
||||
@ -160,14 +153,13 @@ enum buffer_type {
|
||||
};
|
||||
|
||||
struct ath_buf_state {
|
||||
int bfs_nframes; /* # frames in aggregate */
|
||||
u16 bfs_al; /* length of aggregate */
|
||||
u16 bfs_frmlen; /* length of frame */
|
||||
int bfs_seqno; /* sequence number */
|
||||
int bfs_tidno; /* tid of this frame */
|
||||
int bfs_retries; /* current retries */
|
||||
u32 bf_type; /* BUF_* (enum buffer_type) */
|
||||
/* key type use to encrypt this frame */
|
||||
int bfs_nframes; /* # frames in aggregate */
|
||||
u16 bfs_al; /* length of aggregate */
|
||||
u16 bfs_frmlen; /* length of frame */
|
||||
int bfs_seqno; /* sequence number */
|
||||
int bfs_tidno; /* tid of this frame */
|
||||
int bfs_retries; /* current retries */
|
||||
u32 bf_type; /* BUF_* (enum buffer_type) */
|
||||
u32 bfs_keyix;
|
||||
enum ath9k_key_type bfs_keytype;
|
||||
};
|
||||
@ -213,13 +205,6 @@ struct ath_buf {
|
||||
dma_addr_t bf_dmacontext;
|
||||
};
|
||||
|
||||
/*
|
||||
* reset the rx buffer.
|
||||
* any new fields added to the athbuf and require
|
||||
* reset need to be added to this macro.
|
||||
* currently bf_status is the only one requires that
|
||||
* requires reset.
|
||||
*/
|
||||
#define ATH_RXBUF_RESET(_bf) ((_bf)->bf_status = 0)
|
||||
|
||||
/* hw processing complete, desc processed by hal */
|
||||
@ -263,11 +248,8 @@ void ath_rx_cleanup(struct ath_softc *sc);
|
||||
int ath_rx_tasklet(struct ath_softc *sc, int flush);
|
||||
|
||||
#define ATH_TXBUF 512
|
||||
/* max number of transmit attempts (tries) */
|
||||
#define ATH_TXMAXTRY 13
|
||||
/* max number of 11n transmit attempts (tries) */
|
||||
#define ATH_11N_TXMAXTRY 10
|
||||
/* max number of tries for management and control frames */
|
||||
#define ATH_MGT_TXMAXTRY 4
|
||||
#define WME_BA_BMP_SIZE 64
|
||||
#define WME_MAX_BA WME_BA_BMP_SIZE
|
||||
@ -279,22 +261,12 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush);
|
||||
WME_AC_VO)
|
||||
|
||||
|
||||
/* Wireless Multimedia Extension Defines */
|
||||
#define WME_AC_BE 0 /* best effort */
|
||||
#define WME_AC_BK 1 /* background */
|
||||
#define WME_AC_VI 2 /* video */
|
||||
#define WME_AC_VO 3 /* voice */
|
||||
#define WME_NUM_AC 4
|
||||
#define WME_AC_BE 0
|
||||
#define WME_AC_BK 1
|
||||
#define WME_AC_VI 2
|
||||
#define WME_AC_VO 3
|
||||
#define WME_NUM_AC 4
|
||||
|
||||
/*
|
||||
* Data transmit queue state. One of these exists for each
|
||||
* hardware transmit queue. Packets sent to us from above
|
||||
* are assigned to queues based on their priority. Not all
|
||||
* devices support a complete set of hardware transmit queues.
|
||||
* For those devices the array sc_ac2q will map multiple
|
||||
* priorities to fewer hardware queues (typically all to one
|
||||
* hardware queue).
|
||||
*/
|
||||
struct ath_txq {
|
||||
u32 axq_qnum; /* hardware q number */
|
||||
u32 *axq_link; /* link ptr in last TX desc */
|
||||
@ -372,14 +344,15 @@ struct ath_xmit_status {
|
||||
#define ATH_TX_BAR 0x04
|
||||
};
|
||||
|
||||
/* All RSSI values are noise floor adjusted */
|
||||
struct ath_tx_stat {
|
||||
int rssi; /* RSSI (noise floor ajusted) */
|
||||
int rssictl[ATH_MAX_ANTENNA]; /* RSSI (noise floor ajusted) */
|
||||
int rssiextn[ATH_MAX_ANTENNA]; /* RSSI (noise floor ajusted) */
|
||||
int rateieee; /* data rate xmitted (IEEE rate code) */
|
||||
int rateKbps; /* data rate xmitted (Kbps) */
|
||||
int ratecode; /* phy rate code */
|
||||
int flags; /* validity flags */
|
||||
int rssi;
|
||||
int rssictl[ATH_MAX_ANTENNA];
|
||||
int rssiextn[ATH_MAX_ANTENNA];
|
||||
int rateieee;
|
||||
int rateKbps;
|
||||
int ratecode;
|
||||
int flags;
|
||||
/* if any of ctl,extn chain rssis are valid */
|
||||
#define ATH_TX_CHAIN_RSSI_VALID 0x01
|
||||
/* if extn chain rssis are valid */
|
||||
@ -415,7 +388,7 @@ void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb);
|
||||
/**********************/
|
||||
|
||||
#define ADDBA_EXCHANGE_ATTEMPTS 10
|
||||
#define ATH_AGGR_DELIM_SZ 4 /* delimiter size */
|
||||
#define ATH_AGGR_DELIM_SZ 4
|
||||
#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
|
||||
/* number of delimiters for encryption padding */
|
||||
#define ATH_AGGR_ENCRYPTDELIM 10
|
||||
@ -466,10 +439,9 @@ struct aggr_rifs_param {
|
||||
|
||||
/* Per-node aggregation state */
|
||||
struct ath_node_aggr {
|
||||
struct ath_atx tx; /* node transmit state */
|
||||
struct ath_atx tx;
|
||||
};
|
||||
|
||||
/* driver-specific node state */
|
||||
struct ath_node {
|
||||
struct ath_softc *an_sc;
|
||||
struct ath_node_aggr an_aggr;
|
||||
@ -500,12 +472,11 @@ void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid
|
||||
#define ATH_SET_VAP_BSSID_MASK(bssid_mask) \
|
||||
((bssid_mask)[0] &= ~(((ATH_BCBUF-1)<<2)|0x02))
|
||||
|
||||
/* driver-specific vap state */
|
||||
struct ath_vap {
|
||||
int av_bslot; /* beacon slot index */
|
||||
enum ath9k_opmode av_opmode; /* VAP operational mode */
|
||||
struct ath_buf *av_bcbuf; /* beacon buffer */
|
||||
struct ath_tx_control av_btxctl; /* txctl information for beacon */
|
||||
int av_bslot;
|
||||
enum nl80211_iftype av_opmode;
|
||||
struct ath_buf *av_bcbuf;
|
||||
struct ath_tx_control av_btxctl;
|
||||
};
|
||||
|
||||
/*******************/
|
||||
@ -518,12 +489,11 @@ struct ath_vap {
|
||||
* number of beacon intervals, the game's up.
|
||||
*/
|
||||
#define BSTUCK_THRESH (9 * ATH_BCBUF)
|
||||
#define ATH_BCBUF 4 /* number of beacon buffers */
|
||||
#define ATH_DEFAULT_BINTVAL 100 /* default beacon interval in TU */
|
||||
#define ATH_BCBUF 4
|
||||
#define ATH_DEFAULT_BINTVAL 100 /* TU */
|
||||
#define ATH_DEFAULT_BMISS_LIMIT 10
|
||||
#define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
|
||||
|
||||
/* beacon configuration */
|
||||
struct ath_beacon_config {
|
||||
u16 beacon_interval;
|
||||
u16 listen_interval;
|
||||
@ -661,7 +631,9 @@ struct ath_softc {
|
||||
u8 sc_myaddr[ETH_ALEN];
|
||||
u8 sc_bssidmask[ETH_ALEN];
|
||||
|
||||
int sc_debug;
|
||||
#ifdef CONFIG_ATH9K_DEBUG
|
||||
struct ath9k_debug sc_debug;
|
||||
#endif
|
||||
u32 sc_intrstatus;
|
||||
u32 sc_flags; /* SC_OP_* */
|
||||
unsigned int rx_filter;
|
||||
@ -674,18 +646,18 @@ struct ath_softc {
|
||||
u8 sc_tx_chainmask;
|
||||
u8 sc_rx_chainmask;
|
||||
enum ath9k_int sc_imask;
|
||||
enum wireless_mode sc_curmode; /* current phy mode */
|
||||
enum wireless_mode sc_curmode;
|
||||
enum PROT_MODE sc_protmode;
|
||||
|
||||
u8 sc_nbcnvaps; /* # of vaps sending beacons */
|
||||
u16 sc_nvaps; /* # of active virtual ap's */
|
||||
u8 sc_nbcnvaps;
|
||||
u16 sc_nvaps;
|
||||
struct ieee80211_vif *sc_vaps[ATH_BCBUF];
|
||||
|
||||
u8 sc_mcastantenna;
|
||||
u8 sc_defant; /* current default antenna */
|
||||
u8 sc_rxotherant; /* rx's on non-default antenna */
|
||||
u8 sc_defant;
|
||||
u8 sc_rxotherant;
|
||||
|
||||
struct ath9k_node_stats sc_halstats; /* station-mode rssi stats */
|
||||
struct ath9k_node_stats sc_halstats;
|
||||
enum ath9k_ht_extprotspacing sc_ht_extprotspacing;
|
||||
enum ath9k_ht_macmode tx_chan_width;
|
||||
|
||||
@ -699,22 +671,22 @@ struct ath_softc {
|
||||
} sc_updateslot; /* slot time update fsm */
|
||||
|
||||
/* Crypto */
|
||||
u32 sc_keymax; /* size of key cache */
|
||||
DECLARE_BITMAP(sc_keymap, ATH_KEYMAX); /* key use bit map */
|
||||
u32 sc_keymax;
|
||||
DECLARE_BITMAP(sc_keymap, ATH_KEYMAX);
|
||||
u8 sc_splitmic; /* split TKIP MIC keys */
|
||||
|
||||
/* RX */
|
||||
struct list_head sc_rxbuf;
|
||||
struct ath_descdma sc_rxdma;
|
||||
int sc_rxbufsize; /* rx size based on mtu */
|
||||
u32 *sc_rxlink; /* link ptr in last RX desc */
|
||||
int sc_rxbufsize;
|
||||
u32 *sc_rxlink;
|
||||
|
||||
/* TX */
|
||||
struct list_head sc_txbuf;
|
||||
struct ath_txq sc_txq[ATH9K_NUM_TX_QUEUES];
|
||||
struct ath_descdma sc_txdma;
|
||||
u32 sc_txqsetup;
|
||||
int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME AC -> h/w qnum */
|
||||
int sc_haltype2q[ATH9K_WME_AC_VO+1];
|
||||
u16 seq_no; /* TX sequence number */
|
||||
|
||||
/* Beacon */
|
||||
@ -724,13 +696,13 @@ struct ath_softc {
|
||||
struct list_head sc_bbuf;
|
||||
u32 sc_bhalq;
|
||||
u32 sc_bmisscount;
|
||||
u32 ast_be_xmit; /* beacons transmitted */
|
||||
u32 ast_be_xmit;
|
||||
u64 bc_tstamp;
|
||||
|
||||
/* Rate */
|
||||
struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
|
||||
struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];
|
||||
u8 sc_protrix; /* protection rate index */
|
||||
u8 sc_protrix;
|
||||
|
||||
/* Channel, Band */
|
||||
struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX];
|
||||
|
160
drivers/net/wireless/ath9k/debug.c
Normal file
160
drivers/net/wireless/ath9k/debug.c
Normal file
@ -0,0 +1,160 @@
|
||||
/*
|
||||
* Copyright (c) 2008 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "core.h"
|
||||
#include "reg.h"
|
||||
#include "hw.h"
|
||||
|
||||
static unsigned int ath9k_debug = DBG_DEFAULT;
|
||||
module_param_named(debug, ath9k_debug, uint, 0);
|
||||
|
||||
void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...)
|
||||
{
|
||||
if (!sc)
|
||||
return;
|
||||
|
||||
if (sc->sc_debug.debug_mask & dbg_mask) {
|
||||
va_list args;
|
||||
|
||||
va_start(args, fmt);
|
||||
printk(KERN_DEBUG "ath9k: ");
|
||||
vprintk(fmt, args);
|
||||
va_end(args);
|
||||
}
|
||||
}
|
||||
|
||||
static int ath9k_debugfs_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
file->private_data = inode->i_private;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static ssize_t read_file_dma(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_hal *ah = sc->sc_ah;
|
||||
char buf[1024];
|
||||
unsigned int len = 0;
|
||||
u32 val[ATH9K_NUM_DMA_DEBUG_REGS];
|
||||
int i, qcuOffset = 0, dcuOffset = 0;
|
||||
u32 *qcuBase = &val[0], *dcuBase = &val[4];
|
||||
|
||||
REG_WRITE(ah, AR_MACMISC,
|
||||
((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
|
||||
(AR_MACMISC_MISC_OBS_BUS_1 <<
|
||||
AR_MACMISC_MISC_OBS_BUS_MSB_S)));
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"Raw DMA Debug values:\n");
|
||||
|
||||
for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) {
|
||||
if (i % 4 == 0)
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "\n");
|
||||
|
||||
val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof(u32)));
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "%d: %08x ",
|
||||
i, val[i]);
|
||||
}
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "\n\n");
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
|
||||
|
||||
for (i = 0; i < ATH9K_NUM_QUEUES; i++, qcuOffset += 4, dcuOffset += 5) {
|
||||
if (i == 8) {
|
||||
qcuOffset = 0;
|
||||
qcuBase++;
|
||||
}
|
||||
|
||||
if (i == 6) {
|
||||
dcuOffset = 0;
|
||||
dcuBase++;
|
||||
}
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"%2d %2x %1x %2x %2x\n",
|
||||
i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
|
||||
(*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset + 3),
|
||||
val[2] & (0x7 << (i * 3)) >> (i * 3),
|
||||
(*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
|
||||
}
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "\n");
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"qcu_stitch state: %2x qcu_fetch state: %2x\n",
|
||||
(val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"qcu_complete state: %2x dcu_complete state: %2x\n",
|
||||
(val[3] & 0x1c000000) >> 26, (val[6] & 0x3));
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"dcu_arb state: %2x dcu_fp state: %2x\n",
|
||||
(val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"chan_idle_dur: %3d chan_idle_dur_valid: %1d\n",
|
||||
(val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"txfifo_valid_0: %1d txfifo_valid_1: %1d\n",
|
||||
(val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12);
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"txfifo_dcu_num_0: %2d txfifo_dcu_num_1: %2d\n",
|
||||
(val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17);
|
||||
|
||||
len += snprintf(buf + len, sizeof(buf) - len, "pcu observe: 0x%x \n",
|
||||
REG_READ(ah, AR_OBS_BUS_1));
|
||||
len += snprintf(buf + len, sizeof(buf) - len,
|
||||
"AR_CR: 0x%x \n", REG_READ(ah, AR_CR));
|
||||
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
static const struct file_operations fops_dma = {
|
||||
.read = read_file_dma,
|
||||
.open = ath9k_debugfs_open,
|
||||
.owner = THIS_MODULE
|
||||
};
|
||||
|
||||
int ath9k_init_debug(struct ath_softc *sc)
|
||||
{
|
||||
sc->sc_debug.debug_mask = ath9k_debug;
|
||||
|
||||
sc->sc_debug.debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);
|
||||
if (!sc->sc_debug.debugfs_root)
|
||||
goto err;
|
||||
|
||||
sc->sc_debug.debugfs_phy = debugfs_create_dir(wiphy_name(sc->hw->wiphy),
|
||||
sc->sc_debug.debugfs_root);
|
||||
if (!sc->sc_debug.debugfs_phy)
|
||||
goto err;
|
||||
|
||||
sc->sc_debug.debugfs_dma = debugfs_create_file("dma", S_IRUGO,
|
||||
sc->sc_debug.debugfs_phy, sc, &fops_dma);
|
||||
if (!sc->sc_debug.debugfs_dma)
|
||||
goto err;
|
||||
|
||||
return 0;
|
||||
err:
|
||||
ath9k_exit_debug(sc);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
void ath9k_exit_debug(struct ath_softc *sc)
|
||||
{
|
||||
debugfs_remove(sc->sc_debug.debugfs_dma);
|
||||
debugfs_remove(sc->sc_debug.debugfs_phy);
|
||||
debugfs_remove(sc->sc_debug.debugfs_root);
|
||||
}
|
@ -116,7 +116,7 @@ static int ath9k_hw_flash_map(struct ath_hal *ah)
|
||||
|
||||
if (!ahp->ah_cal_mem) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
|
||||
"%s: cannot remap eeprom region \n", __func__);
|
||||
"cannot remap eeprom region \n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
@ -149,7 +149,7 @@ static bool ath9k_hw_fill_eeprom(struct ath_hal *ah)
|
||||
|
||||
if (!ath9k_hw_use_flash(ah)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
|
||||
"%s: Reading from EEPROM, not flash\n", __func__);
|
||||
"Reading from EEPROM, not flash\n");
|
||||
ar5416_eep_start_loc = 256;
|
||||
}
|
||||
|
||||
@ -162,8 +162,7 @@ static bool ath9k_hw_fill_eeprom(struct ath_hal *ah)
|
||||
if (!ath9k_hw_nvram_read(ah, addr + ar5416_eep_start_loc,
|
||||
eep_data)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
|
||||
"%s: Unable to read eeprom region \n",
|
||||
__func__);
|
||||
"Unable to read eeprom region \n");
|
||||
return false;
|
||||
}
|
||||
eep_data++;
|
||||
@ -185,12 +184,11 @@ static int ath9k_hw_check_eeprom(struct ath_hal *ah)
|
||||
if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,
|
||||
&magic)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
|
||||
"%s: Reading Magic # failed\n", __func__);
|
||||
"Reading Magic # failed\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "%s: Read Magic = 0x%04X\n",
|
||||
__func__, magic);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "Read Magic = 0x%04X\n", magic);
|
||||
|
||||
if (magic != AR5416_EEPROM_MAGIC) {
|
||||
magic2 = swab16(magic);
|
||||
@ -1205,11 +1203,11 @@ bool ath9k_hw_set_power_cal_table(struct ath_hal *ah,
|
||||
((pdadcValues[4 * j + 3] & 0xFF) << 24);
|
||||
REG_WRITE(ah, regOffset, reg32);
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"PDADC (%d,%4x): %4.4x %8.8x\n",
|
||||
i, regChainOffset, regOffset,
|
||||
reg32);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"PDADC: Chain %d | PDADC %3d Value %3d | "
|
||||
"PDADC %3d Value %3d | PDADC %3d Value %3d | "
|
||||
"PDADC %3d Value %3d |\n",
|
||||
|
@ -104,9 +104,10 @@ bool ath9k_hw_wait(struct ath_hal *ah, u32 reg, u32 mask, u32 val)
|
||||
|
||||
udelay(AH_TIME_QUANTUM);
|
||||
}
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
|
||||
"%s: timeout on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
|
||||
__func__, reg, REG_READ(ah, reg), mask, val);
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"timeout on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
|
||||
reg, REG_READ(ah, reg), mask, val);
|
||||
|
||||
return false;
|
||||
}
|
||||
@ -188,8 +189,8 @@ u16 ath9k_hw_computetxtime(struct ath_hal *ah,
|
||||
}
|
||||
break;
|
||||
default:
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
|
||||
"%s: unknown phy %u (rate ix %u)\n", __func__,
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"Unknown phy %u (rate ix %u)\n",
|
||||
rates->info[rateix].phy, rateix);
|
||||
txTime = 0;
|
||||
break;
|
||||
@ -355,9 +356,9 @@ static bool ath9k_hw_chip_test(struct ath_hal *ah)
|
||||
rdData = REG_READ(ah, addr);
|
||||
if (rdData != wrData) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"%s: address test failed "
|
||||
"address test failed "
|
||||
"addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
|
||||
__func__, addr, wrData, rdData);
|
||||
addr, wrData, rdData);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
@ -367,9 +368,9 @@ static bool ath9k_hw_chip_test(struct ath_hal *ah)
|
||||
rdData = REG_READ(ah, addr);
|
||||
if (wrData != rdData) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"%s: address test failed "
|
||||
"address test failed "
|
||||
"addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
|
||||
__func__, addr, wrData, rdData);
|
||||
addr, wrData, rdData);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
@ -449,8 +450,7 @@ static struct ath_hal_5416 *ath9k_hw_newstate(u16 devid,
|
||||
ahp = kzalloc(sizeof(struct ath_hal_5416), GFP_KERNEL);
|
||||
if (ahp == NULL) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: cannot allocate memory for state block\n",
|
||||
__func__);
|
||||
"Cannot allocate memory for state block\n");
|
||||
*status = -ENOMEM;
|
||||
return NULL;
|
||||
}
|
||||
@ -497,8 +497,7 @@ static int ath9k_hw_rfattach(struct ath_hal *ah)
|
||||
rfStatus = ath9k_hw_init_rf(ah, &ecode);
|
||||
if (!rfStatus) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s: RF setup failed, status %u\n", __func__,
|
||||
ecode);
|
||||
"RF setup failed, status %u\n", ecode);
|
||||
return ecode;
|
||||
}
|
||||
|
||||
@ -523,9 +522,9 @@ static int ath9k_hw_rf_claim(struct ath_hal *ah)
|
||||
break;
|
||||
default:
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: 5G Radio Chip Rev 0x%02X is not "
|
||||
"5G Radio Chip Rev 0x%02X is not "
|
||||
"supported by this driver\n",
|
||||
__func__, ah->ah_analog5GhzRev);
|
||||
ah->ah_analog5GhzRev);
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
@ -550,7 +549,7 @@ static int ath9k_hw_init_macaddr(struct ath_hal *ah)
|
||||
}
|
||||
if (sum == 0 || sum == 0xffff * 3) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
|
||||
"%s: mac address read failed: %pM\n", __func__,
|
||||
"mac address read failed: %pM\n",
|
||||
ahp->ah_macaddr);
|
||||
return -EADDRNOTAVAIL;
|
||||
}
|
||||
@ -612,7 +611,7 @@ static int ath9k_hw_post_attach(struct ath_hal *ah)
|
||||
|
||||
if (!ath9k_hw_chip_test(ah)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"%s: hardware self-test failed\n", __func__);
|
||||
"hardware self-test failed\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
@ -658,15 +657,13 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
|
||||
ahp->ah_intrMitigation = true;
|
||||
|
||||
if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: couldn't reset chip\n",
|
||||
__func__);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "Couldn't reset chip\n");
|
||||
ecode = -EIO;
|
||||
goto bad;
|
||||
}
|
||||
|
||||
if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: couldn't wakeup chip\n",
|
||||
__func__);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "Couldn't wakeup chip\n");
|
||||
ecode = -EIO;
|
||||
goto bad;
|
||||
}
|
||||
@ -682,17 +679,16 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s: serialize_regmode is %d\n",
|
||||
__func__, ah->ah_config.serialize_regmode);
|
||||
"serialize_regmode is %d\n",
|
||||
ah->ah_config.serialize_regmode);
|
||||
|
||||
if ((ah->ah_macVersion != AR_SREV_VERSION_5416_PCI) &&
|
||||
(ah->ah_macVersion != AR_SREV_VERSION_5416_PCIE) &&
|
||||
(ah->ah_macVersion != AR_SREV_VERSION_9160) &&
|
||||
(!AR_SREV_9100(ah)) && (!AR_SREV_9280(ah))) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s: Mac Chip Rev 0x%02x.%x is not supported by "
|
||||
"this driver\n", __func__,
|
||||
ah->ah_macVersion, ah->ah_macRev);
|
||||
"Mac Chip Rev 0x%02x.%x is not supported by "
|
||||
"this driver\n", ah->ah_macVersion, ah->ah_macRev);
|
||||
ecode = -EOPNOTSUPP;
|
||||
goto bad;
|
||||
}
|
||||
@ -737,7 +733,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s: This Mac Chip Rev 0x%02x.%x is \n", __func__,
|
||||
"This Mac Chip Rev 0x%02x.%x is \n",
|
||||
ah->ah_macVersion, ah->ah_macRev);
|
||||
|
||||
if (AR_SREV_9280_20_OR_LATER(ah)) {
|
||||
@ -874,7 +870,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
|
||||
#endif
|
||||
if (!ath9k_hw_fill_cap_info(ah)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s:failed ath9k_hw_fill_cap_info\n", __func__);
|
||||
"failed ath9k_hw_fill_cap_info\n");
|
||||
ecode = -EINVAL;
|
||||
goto bad;
|
||||
}
|
||||
@ -882,8 +878,7 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
|
||||
ecode = ath9k_hw_init_macaddr(ah);
|
||||
if (ecode != 0) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s: failed initializing mac address\n",
|
||||
__func__);
|
||||
"failed initializing mac address\n");
|
||||
goto bad;
|
||||
}
|
||||
|
||||
@ -1045,7 +1040,8 @@ static void ath9k_hw_init_chain_masks(struct ath_hal *ah)
|
||||
REG_READ(ah, AR_PHY_ANALOG_SWAP) | 0x00000001);
|
||||
}
|
||||
|
||||
static void ath9k_hw_init_interrupt_masks(struct ath_hal *ah, enum ath9k_opmode opmode)
|
||||
static void ath9k_hw_init_interrupt_masks(struct ath_hal *ah,
|
||||
enum nl80211_iftype opmode)
|
||||
{
|
||||
struct ath_hal_5416 *ahp = AH5416(ah);
|
||||
|
||||
@ -1062,7 +1058,7 @@ static void ath9k_hw_init_interrupt_masks(struct ath_hal *ah, enum ath9k_opmode
|
||||
|
||||
ahp->ah_maskReg |= AR_IMR_TXOK;
|
||||
|
||||
if (opmode == ATH9K_M_HOSTAP)
|
||||
if (opmode == NL80211_IFTYPE_AP)
|
||||
ahp->ah_maskReg |= AR_IMR_MIB;
|
||||
|
||||
REG_WRITE(ah, AR_IMR, ahp->ah_maskReg);
|
||||
@ -1080,8 +1076,7 @@ static bool ath9k_hw_set_ack_timeout(struct ath_hal *ah, u32 us)
|
||||
struct ath_hal_5416 *ahp = AH5416(ah);
|
||||
|
||||
if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_ACK))) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: bad ack timeout %u\n",
|
||||
__func__, us);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "bad ack timeout %u\n", us);
|
||||
ahp->ah_acktimeout = (u32) -1;
|
||||
return false;
|
||||
} else {
|
||||
@ -1097,8 +1092,7 @@ static bool ath9k_hw_set_cts_timeout(struct ath_hal *ah, u32 us)
|
||||
struct ath_hal_5416 *ahp = AH5416(ah);
|
||||
|
||||
if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_CTS))) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: bad cts timeout %u\n",
|
||||
__func__, us);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "bad cts timeout %u\n", us);
|
||||
ahp->ah_ctstimeout = (u32) -1;
|
||||
return false;
|
||||
} else {
|
||||
@ -1115,7 +1109,7 @@ static bool ath9k_hw_set_global_txtimeout(struct ath_hal *ah, u32 tu)
|
||||
|
||||
if (tu > 0xFFFF) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_XMIT,
|
||||
"%s: bad global tx timeout %u\n", __func__, tu);
|
||||
"bad global tx timeout %u\n", tu);
|
||||
ahp->ah_globaltxtimeout = (u32) -1;
|
||||
return false;
|
||||
} else {
|
||||
@ -1129,8 +1123,8 @@ static void ath9k_hw_init_user_settings(struct ath_hal *ah)
|
||||
{
|
||||
struct ath_hal_5416 *ahp = AH5416(ah);
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "--AP %s ahp->ah_miscMode 0x%x\n",
|
||||
__func__, ahp->ah_miscMode);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "ahp->ah_miscMode 0x%x\n",
|
||||
ahp->ah_miscMode);
|
||||
|
||||
if (ahp->ah_miscMode != 0)
|
||||
REG_WRITE(ah, AR_PCU_MISC,
|
||||
@ -1176,7 +1170,7 @@ struct ath_hal *ath9k_hw_attach(u16 devid, struct ath_softc *sc,
|
||||
break;
|
||||
default:
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_ANY,
|
||||
"devid=0x%x not supported.\n", devid);
|
||||
"devid=0x%x not supported.\n", devid);
|
||||
ah = NULL;
|
||||
*error = -ENXIO;
|
||||
break;
|
||||
@ -1355,13 +1349,13 @@ static int ath9k_hw_process_ini(struct ath_hal *ah,
|
||||
(u32) ah->ah_powerLimit));
|
||||
if (status != 0) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
|
||||
"%s: error init'ing transmit power\n", __func__);
|
||||
"error init'ing transmit power\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"%s: ar5416SetRfRegs failed\n", __func__);
|
||||
"ar5416SetRfRegs failed\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
@ -1430,18 +1424,18 @@ static void ath9k_hw_set_operating_mode(struct ath_hal *ah, int opmode)
|
||||
val = REG_READ(ah, AR_STA_ID1);
|
||||
val &= ~(AR_STA_ID1_STA_AP | AR_STA_ID1_ADHOC);
|
||||
switch (opmode) {
|
||||
case ATH9K_M_HOSTAP:
|
||||
case NL80211_IFTYPE_AP:
|
||||
REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_STA_AP
|
||||
| AR_STA_ID1_KSRCH_MODE);
|
||||
REG_CLR_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
|
||||
break;
|
||||
case ATH9K_M_IBSS:
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_ADHOC
|
||||
| AR_STA_ID1_KSRCH_MODE);
|
||||
REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
|
||||
break;
|
||||
case ATH9K_M_STA:
|
||||
case ATH9K_M_MONITOR:
|
||||
case NL80211_IFTYPE_STATION:
|
||||
case NL80211_IFTYPE_MONITOR:
|
||||
REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_KSRCH_MODE);
|
||||
break;
|
||||
}
|
||||
@ -1533,8 +1527,7 @@ static bool ath9k_hw_set_reset(struct ath_hal *ah, int type)
|
||||
REG_WRITE(ah, (u16) (AR_RTC_RC), 0);
|
||||
if (!ath9k_hw_wait(ah, (u16) (AR_RTC_RC), AR_RTC_RC_M, 0)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s: RTC stuck in MAC reset\n",
|
||||
__func__);
|
||||
"RTC stuck in MAC reset\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -1561,8 +1554,7 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hal *ah)
|
||||
AR_RTC_STATUS,
|
||||
AR_RTC_STATUS_M,
|
||||
AR_RTC_STATUS_ON)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: RTC not waking up\n",
|
||||
__func__);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "RTC not waking up\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -1641,9 +1633,8 @@ static struct ath9k_channel *ath9k_hw_check_chan(struct ath_hal *ah,
|
||||
{
|
||||
if (!(IS_CHAN_2GHZ(chan) ^ IS_CHAN_5GHZ(chan))) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: invalid channel %u/0x%x; not marked as "
|
||||
"2GHz or 5GHz\n", __func__, chan->channel,
|
||||
chan->channelFlags);
|
||||
"invalid channel %u/0x%x; not marked as "
|
||||
"2GHz or 5GHz\n", chan->channel, chan->channelFlags);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@ -1652,9 +1643,9 @@ static struct ath9k_channel *ath9k_hw_check_chan(struct ath_hal *ah,
|
||||
!IS_CHAN_HT20(chan) &&
|
||||
!IS_CHAN_HT40(chan)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: invalid channel %u/0x%x; not marked as "
|
||||
"invalid channel %u/0x%x; not marked as "
|
||||
"OFDM or CCK or HT20 or HT40PLUS or HT40MINUS\n",
|
||||
__func__, chan->channel, chan->channelFlags);
|
||||
chan->channel, chan->channelFlags);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@ -1670,8 +1661,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
|
||||
for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
|
||||
if (ath9k_hw_numtxpending(ah, qnum)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
|
||||
"%s: Transmit frames pending on queue %d\n",
|
||||
__func__, qnum);
|
||||
"Transmit frames pending on queue %d\n", qnum);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
@ -1679,8 +1669,8 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
|
||||
REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN);
|
||||
if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,
|
||||
AR_PHY_RFBUS_GRANT_EN)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_PHY_IO,
|
||||
"%s: Could not kill baseband RX\n", __func__);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"Could not kill baseband RX\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -1689,13 +1679,13 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
|
||||
if (AR_SREV_9280_10_OR_LATER(ah)) {
|
||||
if (!(ath9k_hw_ar9280_set_channel(ah, chan))) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: failed to set channel\n", __func__);
|
||||
"failed to set channel\n");
|
||||
return false;
|
||||
}
|
||||
} else {
|
||||
if (!(ath9k_hw_set_channel(ah, chan))) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: failed to set channel\n", __func__);
|
||||
"failed to set channel\n");
|
||||
return false;
|
||||
}
|
||||
}
|
||||
@ -1707,7 +1697,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
|
||||
min((u32) MAX_RATE_POWER,
|
||||
(u32) ah->ah_powerLimit)) != 0) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
|
||||
"%s: error init'ing transmit power\n", __func__);
|
||||
"error init'ing transmit power\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -2211,8 +2201,8 @@ bool ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
|
||||
|
||||
if (ath9k_hw_check_chan(ah, chan) == NULL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: invalid channel %u/0x%x; no mapping\n",
|
||||
__func__, chan->channel, chan->channelFlags);
|
||||
"invalid channel %u/0x%x; no mapping\n",
|
||||
chan->channel, chan->channelFlags);
|
||||
ecode = -EINVAL;
|
||||
goto bad;
|
||||
}
|
||||
@ -2254,8 +2244,7 @@ bool ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
|
||||
ath9k_hw_mark_phy_inactive(ah);
|
||||
|
||||
if (!ath9k_hw_chip_reset(ah, chan)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: chip reset failed\n",
|
||||
__func__);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "chip reset failed\n");
|
||||
ecode = -EINVAL;
|
||||
goto bad;
|
||||
}
|
||||
@ -2289,7 +2278,7 @@ bool ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
|
||||
|
||||
if (!ath9k_hw_eeprom_set_board_values(ah, chan)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
|
||||
"%s: error setting board options\n", __func__);
|
||||
"error setting board options\n");
|
||||
ecode = -EIO;
|
||||
goto bad;
|
||||
}
|
||||
@ -2379,15 +2368,13 @@ bool ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
|
||||
mask = REG_READ(ah, AR_CFG);
|
||||
if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s CFG Byte Swap Set 0x%x\n", __func__,
|
||||
mask);
|
||||
"CFG Byte Swap Set 0x%x\n", mask);
|
||||
} else {
|
||||
mask =
|
||||
INIT_CONFIG_STATUS | AR_CFG_SWRB | AR_CFG_SWTB;
|
||||
REG_WRITE(ah, AR_CFG, mask);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s Setting CFG 0x%x\n", __func__,
|
||||
REG_READ(ah, AR_CFG));
|
||||
"Setting CFG 0x%x\n", REG_READ(ah, AR_CFG));
|
||||
}
|
||||
} else {
|
||||
#ifdef __BIG_ENDIAN
|
||||
@ -2412,7 +2399,7 @@ bool ath9k_hw_keyreset(struct ath_hal *ah, u16 entry)
|
||||
|
||||
if (entry >= ah->ah_caps.keycache_size) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
|
||||
"%s: entry %u out of range\n", __func__, entry);
|
||||
"entry %u out of range\n", entry);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -2449,7 +2436,7 @@ bool ath9k_hw_keysetmac(struct ath_hal *ah, u16 entry, const u8 *mac)
|
||||
|
||||
if (entry >= ah->ah_caps.keycache_size) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
|
||||
"%s: entry %u out of range\n", __func__, entry);
|
||||
"entry %u out of range\n", entry);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -2485,7 +2472,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry,
|
||||
|
||||
if (entry >= pCap->keycache_size) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
|
||||
"%s: entry %u out of range\n", __func__, entry);
|
||||
"entry %u out of range\n", entry);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -2496,8 +2483,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry,
|
||||
case ATH9K_CIPHER_AES_CCM:
|
||||
if (!(pCap->hw_caps & ATH9K_HW_CAP_CIPHER_AESCCM)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
|
||||
"%s: AES-CCM not supported by "
|
||||
"mac rev 0x%x\n", __func__,
|
||||
"AES-CCM not supported by mac rev 0x%x\n",
|
||||
ah->ah_macRev);
|
||||
return false;
|
||||
}
|
||||
@ -2508,16 +2494,14 @@ bool ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry,
|
||||
if (ATH9K_IS_MIC_ENABLED(ah)
|
||||
&& entry + 64 >= pCap->keycache_size) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
|
||||
"%s: entry %u inappropriate for TKIP\n",
|
||||
__func__, entry);
|
||||
"entry %u inappropriate for TKIP\n", entry);
|
||||
return false;
|
||||
}
|
||||
break;
|
||||
case ATH9K_CIPHER_WEP:
|
||||
if (k->kv_len < LEN_WEP40) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
|
||||
"%s: WEP key length %u too small\n",
|
||||
__func__, k->kv_len);
|
||||
"WEP key length %u too small\n", k->kv_len);
|
||||
return false;
|
||||
}
|
||||
if (k->kv_len <= LEN_WEP40)
|
||||
@ -2532,8 +2516,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hal *ah, u16 entry,
|
||||
break;
|
||||
default:
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_KEYCACHE,
|
||||
"%s: cipher %u not supported\n", __func__,
|
||||
k->kv_type);
|
||||
"cipher %u not supported\n", k->kv_type);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -2682,8 +2665,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hal *ah,
|
||||
}
|
||||
if (i == 0) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
|
||||
"%s: Failed to wakeup in %uus\n",
|
||||
__func__, POWER_UP_TIME / 20);
|
||||
"Failed to wakeup in %uus\n", POWER_UP_TIME / 20);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
@ -2705,7 +2687,7 @@ bool ath9k_hw_setpower(struct ath_hal *ah,
|
||||
};
|
||||
int status = true, setChip = true;
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, "%s: %s -> %s (%s)\n", __func__,
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT, "%s -> %s (%s)\n",
|
||||
modes[ahp->ah_powerMode], modes[mode],
|
||||
setChip ? "set chip " : "");
|
||||
|
||||
@ -2722,7 +2704,7 @@ bool ath9k_hw_setpower(struct ath_hal *ah,
|
||||
break;
|
||||
default:
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_POWER_MGMT,
|
||||
"%s: unknown power mode %u\n", __func__, mode);
|
||||
"Unknown power mode %u\n", mode);
|
||||
return false;
|
||||
}
|
||||
ahp->ah_powerMode = mode;
|
||||
@ -2899,8 +2881,7 @@ bool ath9k_hw_getisr(struct ath_hal *ah, enum ath9k_int *masked)
|
||||
|
||||
if (isr & AR_ISR_RXORN) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
|
||||
"%s: receive FIFO overrun interrupt\n",
|
||||
__func__);
|
||||
"receive FIFO overrun interrupt\n");
|
||||
}
|
||||
|
||||
if (!AR_SREV_9100(ah)) {
|
||||
@ -2926,27 +2907,23 @@ bool ath9k_hw_getisr(struct ath_hal *ah, enum ath9k_int *masked)
|
||||
if (fatal_int) {
|
||||
if (sync_cause & AR_INTR_SYNC_HOST1_FATAL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_ANY,
|
||||
"%s: received PCI FATAL interrupt\n",
|
||||
__func__);
|
||||
"received PCI FATAL interrupt\n");
|
||||
}
|
||||
if (sync_cause & AR_INTR_SYNC_HOST1_PERR) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_ANY,
|
||||
"%s: received PCI PERR interrupt\n",
|
||||
__func__);
|
||||
"received PCI PERR interrupt\n");
|
||||
}
|
||||
}
|
||||
if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
|
||||
"%s: AR_INTR_SYNC_RADM_CPL_TIMEOUT\n",
|
||||
__func__);
|
||||
"AR_INTR_SYNC_RADM_CPL_TIMEOUT\n");
|
||||
REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);
|
||||
REG_WRITE(ah, AR_RC, 0);
|
||||
*masked |= ATH9K_INT_FATAL;
|
||||
}
|
||||
if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
|
||||
"%s: AR_INTR_SYNC_LOCAL_TIMEOUT\n",
|
||||
__func__);
|
||||
"AR_INTR_SYNC_LOCAL_TIMEOUT\n");
|
||||
}
|
||||
|
||||
REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);
|
||||
@ -2968,12 +2945,10 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints)
|
||||
u32 mask, mask2;
|
||||
struct ath9k_hw_capabilities *pCap = &ah->ah_caps;
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: 0x%x => 0x%x\n", __func__,
|
||||
omask, ints);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints);
|
||||
|
||||
if (omask & ATH9K_INT_GLOBAL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: disable IER\n",
|
||||
__func__);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "disable IER\n");
|
||||
REG_WRITE(ah, AR_IER, AR_IER_DISABLE);
|
||||
(void) REG_READ(ah, AR_IER);
|
||||
if (!AR_SREV_9100(ah)) {
|
||||
@ -3028,8 +3003,7 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints)
|
||||
mask2 |= AR_IMR_S2_CST;
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: new IMR 0x%x\n", __func__,
|
||||
mask);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "new IMR 0x%x\n", mask);
|
||||
REG_WRITE(ah, AR_IMR, mask);
|
||||
mask = REG_READ(ah, AR_IMR_S2) & ~(AR_IMR_S2_TIM |
|
||||
AR_IMR_S2_DTIM |
|
||||
@ -3049,8 +3023,7 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints)
|
||||
}
|
||||
|
||||
if (ints & ATH9K_INT_GLOBAL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "%s: enable IER\n",
|
||||
__func__);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "enable IER\n");
|
||||
REG_WRITE(ah, AR_IER, AR_IER_ENABLE);
|
||||
if (!AR_SREV_9100(ah)) {
|
||||
REG_WRITE(ah, AR_INTR_ASYNC_ENABLE,
|
||||
@ -3082,14 +3055,14 @@ void ath9k_hw_beaconinit(struct ath_hal *ah, u32 next_beacon, u32 beacon_period)
|
||||
ahp->ah_beaconInterval = beacon_period;
|
||||
|
||||
switch (ah->ah_opmode) {
|
||||
case ATH9K_M_STA:
|
||||
case ATH9K_M_MONITOR:
|
||||
case NL80211_IFTYPE_STATION:
|
||||
case NL80211_IFTYPE_MONITOR:
|
||||
REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon));
|
||||
REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff);
|
||||
REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff);
|
||||
flags |= AR_TBTT_TIMER_EN;
|
||||
break;
|
||||
case ATH9K_M_IBSS:
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
REG_SET_BIT(ah, AR_TXCFG,
|
||||
AR_TXCFG_ADHOC_BEACON_ATIM_TX_POLICY);
|
||||
REG_WRITE(ah, AR_NEXT_NDP_TIMER,
|
||||
@ -3097,7 +3070,7 @@ void ath9k_hw_beaconinit(struct ath_hal *ah, u32 next_beacon, u32 beacon_period)
|
||||
(ahp->ah_atimWindow ? ahp->
|
||||
ah_atimWindow : 1)));
|
||||
flags |= AR_NDP_TIMER_EN;
|
||||
case ATH9K_M_HOSTAP:
|
||||
case NL80211_IFTYPE_AP:
|
||||
REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon));
|
||||
REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT,
|
||||
TU_TO_USEC(next_beacon -
|
||||
@ -3110,6 +3083,12 @@ void ath9k_hw_beaconinit(struct ath_hal *ah, u32 next_beacon, u32 beacon_period)
|
||||
flags |=
|
||||
AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN;
|
||||
break;
|
||||
default:
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_BEACON,
|
||||
"%s: unsupported opmode: %d\n",
|
||||
__func__, ah->ah_opmode);
|
||||
return;
|
||||
break;
|
||||
}
|
||||
|
||||
REG_WRITE(ah, AR_BEACON_PERIOD, TU_TO_USEC(beacon_period));
|
||||
@ -3156,14 +3135,10 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hal *ah,
|
||||
else
|
||||
nextTbtt = bs->bs_nexttbtt;
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: next DTIM %d\n", __func__,
|
||||
bs->bs_nextdtim);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: next beacon %d\n", __func__,
|
||||
nextTbtt);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: beacon period %d\n", __func__,
|
||||
beaconintval);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "%s: DTIM period %d\n", __func__,
|
||||
dtimperiod);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "next DTIM %d\n", bs->bs_nextdtim);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "next beacon %d\n", nextTbtt);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "beacon period %d\n", beaconintval);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "DTIM period %d\n", dtimperiod);
|
||||
|
||||
REG_WRITE(ah, AR_NEXT_DTIM,
|
||||
TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP));
|
||||
@ -3209,15 +3184,14 @@ bool ath9k_hw_fill_cap_info(struct ath_hal *ah)
|
||||
|
||||
capField = ath9k_hw_get_eeprom(ah, EEP_OP_CAP);
|
||||
|
||||
if (ah->ah_opmode != ATH9K_M_HOSTAP &&
|
||||
if (ah->ah_opmode != NL80211_IFTYPE_AP &&
|
||||
ah->ah_subvendorid == AR_SUBVENDOR_ID_NEW_A) {
|
||||
if (ah->ah_currentRD == 0x64 || ah->ah_currentRD == 0x65)
|
||||
ah->ah_currentRD += 5;
|
||||
else if (ah->ah_currentRD == 0x41)
|
||||
ah->ah_currentRD = 0x43;
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: regdomain mapped to 0x%x\n", __func__,
|
||||
ah->ah_currentRD);
|
||||
"regdomain mapped to 0x%x\n", ah->ah_currentRD);
|
||||
}
|
||||
|
||||
eeval = ath9k_hw_get_eeprom(ah, EEP_OP_MODE);
|
||||
@ -3823,8 +3797,7 @@ void ath9k_hw_reset_tsf(struct ath_hal *ah)
|
||||
count++;
|
||||
if (count > 10) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
|
||||
"%s: AR_SLP32_TSF_WRITE_STATUS limit exceeded\n",
|
||||
__func__);
|
||||
"AR_SLP32_TSF_WRITE_STATUS limit exceeded\n");
|
||||
break;
|
||||
}
|
||||
udelay(10);
|
||||
@ -3849,8 +3822,7 @@ bool ath9k_hw_setslottime(struct ath_hal *ah, u32 us)
|
||||
struct ath_hal_5416 *ahp = AH5416(ah);
|
||||
|
||||
if (us < ATH9K_SLOT_TIME_9 || us > ath9k_hw_mac_to_usec(ah, 0xffff)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s: bad slot time %u\n",
|
||||
__func__, us);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "bad slot time %u\n", us);
|
||||
ahp->ah_slottime = (u32) -1;
|
||||
return false;
|
||||
} else {
|
||||
|
@ -25,10 +25,10 @@ static void ath9k_hw_set_txq_interrupts(struct ath_hal *ah,
|
||||
struct ath_hal_5416 *ahp = AH5416(ah);
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT,
|
||||
"%s: tx ok 0x%x err 0x%x desc 0x%x eol 0x%x urn 0x%x\n",
|
||||
__func__, ahp->ah_txOkInterruptMask,
|
||||
ahp->ah_txErrInterruptMask, ahp->ah_txDescInterruptMask,
|
||||
ahp->ah_txEolInterruptMask, ahp->ah_txUrnInterruptMask);
|
||||
"tx ok 0x%x err 0x%x desc 0x%x eol 0x%x urn 0x%x\n",
|
||||
ahp->ah_txOkInterruptMask, ahp->ah_txErrInterruptMask,
|
||||
ahp->ah_txDescInterruptMask, ahp->ah_txEolInterruptMask,
|
||||
ahp->ah_txUrnInterruptMask);
|
||||
|
||||
REG_WRITE(ah, AR_IMR_S0,
|
||||
SM(ahp->ah_txOkInterruptMask, AR_IMR_S0_QCU_TXOK)
|
||||
@ -40,78 +40,6 @@ static void ath9k_hw_set_txq_interrupts(struct ath_hal *ah,
|
||||
AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask);
|
||||
}
|
||||
|
||||
void ath9k_hw_dmaRegDump(struct ath_hal *ah)
|
||||
{
|
||||
u32 val[ATH9K_NUM_DMA_DEBUG_REGS];
|
||||
int qcuOffset = 0, dcuOffset = 0;
|
||||
u32 *qcuBase = &val[0], *dcuBase = &val[4];
|
||||
int i;
|
||||
|
||||
REG_WRITE(ah, AR_MACMISC,
|
||||
((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
|
||||
(AR_MACMISC_MISC_OBS_BUS_1 <<
|
||||
AR_MACMISC_MISC_OBS_BUS_MSB_S)));
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "Raw DMA Debug values:\n");
|
||||
|
||||
for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) {
|
||||
if (i % 4 == 0)
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n");
|
||||
|
||||
val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof(u32)));
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "%d: %08x ", i, val[i]);
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n\n");
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
|
||||
|
||||
for (i = 0; i < ATH9K_NUM_QUEUES;
|
||||
i++, qcuOffset += 4, dcuOffset += 5) {
|
||||
if (i == 8) {
|
||||
qcuOffset = 0;
|
||||
qcuBase++;
|
||||
}
|
||||
|
||||
if (i == 6) {
|
||||
dcuOffset = 0;
|
||||
dcuBase++;
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"%2d %2x %1x %2x %2x\n",
|
||||
i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
|
||||
(*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset + 3),
|
||||
val[2] & (0x7 << (i * 3)) >> (i * 3),
|
||||
(*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "\n");
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"qcu_stitch state: %2x qcu_fetch state: %2x\n",
|
||||
(val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"qcu_complete state: %2x dcu_complete state: %2x\n",
|
||||
(val[3] & 0x1c000000) >> 26, (val[6] & 0x3));
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"dcu_arb state: %2x dcu_fp state: %2x\n",
|
||||
(val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"chan_idle_dur: %3d chan_idle_dur_valid: %1d\n",
|
||||
(val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"txfifo_valid_0: %1d txfifo_valid_1: %1d\n",
|
||||
(val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"txfifo_dcu_num_0: %2d txfifo_dcu_num_1: %2d\n",
|
||||
(val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17);
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO, "pcu observe 0x%x \n",
|
||||
REG_READ(ah, AR_OBS_BUS_1));
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
|
||||
"AR_CR 0x%x \n", REG_READ(ah, AR_CR));
|
||||
}
|
||||
|
||||
u32 ath9k_hw_gettxbuf(struct ath_hal *ah, u32 q)
|
||||
{
|
||||
return REG_READ(ah, AR_QTXDP(q));
|
||||
@ -126,7 +54,7 @@ bool ath9k_hw_puttxbuf(struct ath_hal *ah, u32 q, u32 txdp)
|
||||
|
||||
bool ath9k_hw_txstart(struct ath_hal *ah, u32 q)
|
||||
{
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %u\n", __func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "queue %u\n", q);
|
||||
|
||||
REG_WRITE(ah, AR_Q_TXE, 1 << q);
|
||||
|
||||
@ -207,9 +135,8 @@ bool ath9k_hw_stoptxdma(struct ath_hal *ah, u32 q)
|
||||
break;
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
|
||||
"%s: TSF have moved while trying to set "
|
||||
"quiet time TSF: 0x%08x\n",
|
||||
__func__, tsfLow);
|
||||
"TSF have moved while trying to set "
|
||||
"quiet time TSF: 0x%08x\n", tsfLow);
|
||||
}
|
||||
|
||||
REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
|
||||
@ -222,9 +149,8 @@ bool ath9k_hw_stoptxdma(struct ath_hal *ah, u32 q)
|
||||
while (ath9k_hw_numtxpending(ah, q)) {
|
||||
if ((--wait) == 0) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_XMIT,
|
||||
"%s: Failed to stop Tx DMA in 100 "
|
||||
"msec after killing last frame\n",
|
||||
__func__);
|
||||
"Failed to stop Tx DMA in 100 "
|
||||
"msec after killing last frame\n");
|
||||
break;
|
||||
}
|
||||
udelay(100);
|
||||
@ -523,19 +449,17 @@ bool ath9k_hw_set_txq_props(struct ath_hal *ah, int q,
|
||||
struct ath9k_tx_queue_info *qi;
|
||||
|
||||
if (q >= pCap->total_queues) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n",
|
||||
__func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "invalid queue num %u\n", q);
|
||||
return false;
|
||||
}
|
||||
|
||||
qi = &ahp->ah_txq[q];
|
||||
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n",
|
||||
__func__);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "inactive queue\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %p\n", __func__, qi);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "queue %p\n", qi);
|
||||
|
||||
qi->tqi_ver = qinfo->tqi_ver;
|
||||
qi->tqi_subtype = qinfo->tqi_subtype;
|
||||
@ -593,15 +517,13 @@ bool ath9k_hw_get_txq_props(struct ath_hal *ah, int q,
|
||||
struct ath9k_tx_queue_info *qi;
|
||||
|
||||
if (q >= pCap->total_queues) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n",
|
||||
__func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "invalid queue num %u\n", q);
|
||||
return false;
|
||||
}
|
||||
|
||||
qi = &ahp->ah_txq[q];
|
||||
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n",
|
||||
__func__);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "inactive queue\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -651,22 +573,21 @@ int ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type,
|
||||
break;
|
||||
if (q == pCap->total_queues) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
|
||||
"%s: no available tx queue\n", __func__);
|
||||
"no available tx queue\n");
|
||||
return -1;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: bad tx queue type %u\n",
|
||||
__func__, type);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "bad tx queue type %u\n", type);
|
||||
return -1;
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %u\n", __func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "queue %u\n", q);
|
||||
|
||||
qi = &ahp->ah_txq[q];
|
||||
if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
|
||||
"%s: tx queue %u already active\n", __func__, q);
|
||||
"tx queue %u already active\n", q);
|
||||
return -1;
|
||||
}
|
||||
memset(qi, 0, sizeof(struct ath9k_tx_queue_info));
|
||||
@ -697,19 +618,16 @@ bool ath9k_hw_releasetxqueue(struct ath_hal *ah, u32 q)
|
||||
struct ath9k_tx_queue_info *qi;
|
||||
|
||||
if (q >= pCap->total_queues) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n",
|
||||
__func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "invalid queue num %u\n", q);
|
||||
return false;
|
||||
}
|
||||
qi = &ahp->ah_txq[q];
|
||||
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue %u\n",
|
||||
__func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "inactive queue %u\n", q);
|
||||
return false;
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: release queue %u\n",
|
||||
__func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "release queue %u\n", q);
|
||||
|
||||
qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE;
|
||||
ahp->ah_txOkInterruptMask &= ~(1 << q);
|
||||
@ -731,19 +649,17 @@ bool ath9k_hw_resettxqueue(struct ath_hal *ah, u32 q)
|
||||
u32 cwMin, chanCwMin, value;
|
||||
|
||||
if (q >= pCap->total_queues) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n",
|
||||
__func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "invalid queue num %u\n", q);
|
||||
return false;
|
||||
}
|
||||
|
||||
qi = &ahp->ah_txq[q];
|
||||
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue %u\n",
|
||||
__func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "inactive queue %u\n", q);
|
||||
return true;
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: reset queue %u\n", __func__, q);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "reset queue %u\n", q);
|
||||
|
||||
if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) {
|
||||
if (chan && IS_CHAN_B(chan))
|
||||
@ -976,8 +892,7 @@ bool ath9k_hw_setrxabort(struct ath_hal *ah, bool set)
|
||||
|
||||
reg = REG_READ(ah, AR_OBS_BUS_1);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
|
||||
"%s: rx failed to go idle in 10 ms RXSM=0x%x\n",
|
||||
__func__, reg);
|
||||
"rx failed to go idle in 10 ms RXSM=0x%x\n", reg);
|
||||
|
||||
return false;
|
||||
}
|
||||
@ -1022,9 +937,8 @@ bool ath9k_hw_stopdmarecv(struct ath_hal *ah)
|
||||
|
||||
if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
|
||||
"%s: dma failed to stop in 10ms\n"
|
||||
"dma failed to stop in 10ms\n"
|
||||
"AR_CR=0x%08x\nAR_DIAG_SW=0x%08x\n",
|
||||
__func__,
|
||||
REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
|
||||
return false;
|
||||
} else {
|
||||
|
@ -17,6 +17,7 @@
|
||||
#include <linux/nl80211.h>
|
||||
#include "core.h"
|
||||
#include "reg.h"
|
||||
#include "hw.h"
|
||||
|
||||
#define ATH_PCI_VERSION "0.1"
|
||||
|
||||
@ -175,8 +176,8 @@ static void ath_setup_rates(struct ath_softc *sc, enum ieee80211_band band)
|
||||
rate[i].bitrate = rate_table->info[i].ratekbps / 100;
|
||||
rate[i].hw_value = rate_table->info[i].ratecode;
|
||||
sband->n_bitrates++;
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Rate: %2dMbps, ratecode: %2d\n",
|
||||
__func__, rate[i].bitrate / 10, rate[i].hw_value);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Rate: %2dMbps, ratecode: %2d\n",
|
||||
rate[i].bitrate / 10, rate[i].hw_value);
|
||||
}
|
||||
}
|
||||
|
||||
@ -198,9 +199,9 @@ static int ath_setup_channels(struct ath_softc *sc)
|
||||
&nregclass, CTRY_DEFAULT, false, 1)) {
|
||||
u32 rd = ah->ah_currentRD;
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to collect channel list; "
|
||||
"Unable to collect channel list; "
|
||||
"regdomain likely %u country code %u\n",
|
||||
__func__, rd, CTRY_DEFAULT);
|
||||
rd, CTRY_DEFAULT);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -223,9 +224,9 @@ static int ath_setup_channels(struct ath_softc *sc)
|
||||
|
||||
band_2ghz->n_channels = ++a;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: 2MHz channel: %d, "
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "2MHz channel: %d, "
|
||||
"channelFlags: 0x%x\n",
|
||||
__func__, c->channel, c->channelFlags);
|
||||
c->channel, c->channelFlags);
|
||||
} else if (IS_CHAN_5GHZ(c)) {
|
||||
chan_5ghz[b].band = IEEE80211_BAND_5GHZ;
|
||||
chan_5ghz[b].center_freq = c->channel;
|
||||
@ -238,9 +239,9 @@ static int ath_setup_channels(struct ath_softc *sc)
|
||||
|
||||
band_5ghz->n_channels = ++b;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: 5MHz channel: %d, "
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "5MHz channel: %d, "
|
||||
"channelFlags: 0x%x\n",
|
||||
__func__, c->channel, c->channelFlags);
|
||||
c->channel, c->channelFlags);
|
||||
}
|
||||
}
|
||||
|
||||
@ -274,9 +275,9 @@ static int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan)
|
||||
* hardware at the new frequency, and then re-enable
|
||||
* the relevant bits of the h/w.
|
||||
*/
|
||||
ath9k_hw_set_interrupts(ah, 0); /* disable interrupts */
|
||||
ath_draintxq(sc, false); /* clear pending tx frames */
|
||||
stopped = ath_stoprecv(sc); /* turn off frame recv */
|
||||
ath9k_hw_set_interrupts(ah, 0);
|
||||
ath_draintxq(sc, false);
|
||||
stopped = ath_stoprecv(sc);
|
||||
|
||||
/* XXX: do not flush receive queue here. We don't want
|
||||
* to flush data frames already in queue because of
|
||||
@ -286,8 +287,7 @@ static int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan)
|
||||
fastcc = false;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"%s: (%u MHz) -> (%u MHz), cflags:%x, chanwidth: %d\n",
|
||||
__func__,
|
||||
"(%u MHz) -> (%u MHz), cflags:%x, chanwidth: %d\n",
|
||||
sc->sc_ah->ah_curchan->channel,
|
||||
hchan->channel, hchan->channelFlags, sc->tx_chan_width);
|
||||
|
||||
@ -296,8 +296,8 @@ static int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan)
|
||||
sc->sc_tx_chainmask, sc->sc_rx_chainmask,
|
||||
sc->sc_ht_extprotspacing, fastcc, &status)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to reset channel %u (%uMhz) "
|
||||
"flags 0x%x hal status %u\n", __func__,
|
||||
"Unable to reset channel %u (%uMhz) "
|
||||
"flags 0x%x hal status %u\n",
|
||||
ath9k_hw_mhz2ieee(ah, hchan->channel,
|
||||
hchan->channelFlags),
|
||||
hchan->channel, hchan->channelFlags, status);
|
||||
@ -311,7 +311,7 @@ static int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan)
|
||||
|
||||
if (ath_startrecv(sc) != 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to restart recv logic\n", __func__);
|
||||
"Unable to restart recv logic\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
@ -352,8 +352,7 @@ static void ath_ani_calibrate(unsigned long data)
|
||||
/* Long calibration runs independently of short calibration. */
|
||||
if ((timestamp - sc->sc_ani.sc_longcal_timer) >= ATH_LONG_CALINTERVAL) {
|
||||
longcal = true;
|
||||
DPRINTF(sc, ATH_DBG_ANI, "%s: longcal @%lu\n",
|
||||
__func__, jiffies);
|
||||
DPRINTF(sc, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
|
||||
sc->sc_ani.sc_longcal_timer = timestamp;
|
||||
}
|
||||
|
||||
@ -362,8 +361,7 @@ static void ath_ani_calibrate(unsigned long data)
|
||||
if ((timestamp - sc->sc_ani.sc_shortcal_timer) >=
|
||||
ATH_SHORT_CALINTERVAL) {
|
||||
shortcal = true;
|
||||
DPRINTF(sc, ATH_DBG_ANI, "%s: shortcal @%lu\n",
|
||||
__func__, jiffies);
|
||||
DPRINTF(sc, ATH_DBG_ANI, "shortcal @%lu\n", jiffies);
|
||||
sc->sc_ani.sc_shortcal_timer = timestamp;
|
||||
sc->sc_ani.sc_resetcal_timer = timestamp;
|
||||
}
|
||||
@ -404,15 +402,13 @@ static void ath_ani_calibrate(unsigned long data)
|
||||
ah->ah_curchan);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_ANI,
|
||||
"%s: calibrate chan %u/%x nf: %d\n",
|
||||
__func__,
|
||||
"calibrate chan %u/%x nf: %d\n",
|
||||
ah->ah_curchan->channel,
|
||||
ah->ah_curchan->channelFlags,
|
||||
sc->sc_ani.sc_noise_floor);
|
||||
} else {
|
||||
DPRINTF(sc, ATH_DBG_ANY,
|
||||
"%s: calibrate chan %u/%x failed\n",
|
||||
__func__,
|
||||
"calibrate chan %u/%x failed\n",
|
||||
ah->ah_curchan->channel,
|
||||
ah->ah_curchan->channelFlags);
|
||||
}
|
||||
@ -425,8 +421,9 @@ static void ath_ani_calibrate(unsigned long data)
|
||||
* The interval must be the shortest necessary to satisfy ANI,
|
||||
* short calibration and long calibration.
|
||||
*/
|
||||
|
||||
cal_interval = ATH_ANI_POLLINTERVAL;
|
||||
cal_interval = ATH_LONG_CALINTERVAL;
|
||||
if (sc->sc_ah->ah_config.enable_ani)
|
||||
cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
|
||||
if (!sc->sc_ani.sc_caldone)
|
||||
cal_interval = min(cal_interval, (u32)ATH_SHORT_CALINTERVAL);
|
||||
|
||||
@ -449,8 +446,8 @@ static void ath_update_chainmask(struct ath_softc *sc, int is_ht)
|
||||
sc->sc_rx_chainmask = 1;
|
||||
}
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: tx chmask: %d, rx chmask: %d\n",
|
||||
__func__, sc->sc_tx_chainmask, sc->sc_rx_chainmask);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n",
|
||||
sc->sc_tx_chainmask, sc->sc_rx_chainmask);
|
||||
}
|
||||
|
||||
static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
|
||||
@ -622,35 +619,35 @@ static int ath_get_channel(struct ath_softc *sc,
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* ext_chan_offset: (-1, 0, 1) (below, none, above) */
|
||||
|
||||
static u32 ath_get_extchanmode(struct ath_softc *sc,
|
||||
struct ieee80211_channel *chan,
|
||||
struct ieee80211_bss_conf *bss_conf)
|
||||
int ext_chan_offset,
|
||||
enum ath9k_ht_macmode tx_chan_width)
|
||||
{
|
||||
u32 chanmode = 0;
|
||||
u8 ext_chan_offset = bss_conf->ht.secondary_channel_offset;
|
||||
enum ath9k_ht_macmode tx_chan_width = (bss_conf->ht.width_40_ok) ?
|
||||
ATH9K_HT_MACMODE_2040 : ATH9K_HT_MACMODE_20;
|
||||
|
||||
switch (chan->band) {
|
||||
case IEEE80211_BAND_2GHZ:
|
||||
if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
|
||||
if ((ext_chan_offset == 0) &&
|
||||
(tx_chan_width == ATH9K_HT_MACMODE_20))
|
||||
chanmode = CHANNEL_G_HT20;
|
||||
if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
|
||||
if ((ext_chan_offset == 1) &&
|
||||
(tx_chan_width == ATH9K_HT_MACMODE_2040))
|
||||
chanmode = CHANNEL_G_HT40PLUS;
|
||||
if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
|
||||
if ((ext_chan_offset == -1) &&
|
||||
(tx_chan_width == ATH9K_HT_MACMODE_2040))
|
||||
chanmode = CHANNEL_G_HT40MINUS;
|
||||
break;
|
||||
case IEEE80211_BAND_5GHZ:
|
||||
if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
|
||||
if ((ext_chan_offset == 0) &&
|
||||
(tx_chan_width == ATH9K_HT_MACMODE_20))
|
||||
chanmode = CHANNEL_A_HT20;
|
||||
if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
|
||||
if ((ext_chan_offset == 1) &&
|
||||
(tx_chan_width == ATH9K_HT_MACMODE_2040))
|
||||
chanmode = CHANNEL_A_HT40PLUS;
|
||||
if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
|
||||
if ((ext_chan_offset == -1) &&
|
||||
(tx_chan_width == ATH9K_HT_MACMODE_2040))
|
||||
chanmode = CHANNEL_A_HT40MINUS;
|
||||
break;
|
||||
@ -712,7 +709,7 @@ static int ath_setkey_tkip(struct ath_softc *sc,
|
||||
if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
|
||||
/* Txmic entry failed. No need to proceed further */
|
||||
DPRINTF(sc, ATH_DBG_KEYCACHE,
|
||||
"%s Setting TX MIC Key Failed\n", __func__);
|
||||
"Setting TX MIC Key Failed\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -758,13 +755,17 @@ static int ath_key_config(struct ath_softc *sc,
|
||||
|
||||
/*
|
||||
* Strategy:
|
||||
* For _M_STA mc tx, we will not setup a key at all since we never
|
||||
* tx mc.
|
||||
* _M_STA mc rx, we will use the keyID.
|
||||
* for _M_IBSS mc tx, we will use the keyID, and no macaddr.
|
||||
* for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
|
||||
* peer node. BUT we will plumb a cleartext key so that we can do
|
||||
* perSta default key table lookup in software.
|
||||
* For STA mc tx, we will not setup a key at
|
||||
* all since we never tx mc.
|
||||
*
|
||||
* For STA mc rx, we will use the keyID.
|
||||
*
|
||||
* For ADHOC mc tx, we will use the keyID, and no macaddr.
|
||||
*
|
||||
* For ADHOC mc rx, we will alloc a slot and plumb the mac of
|
||||
* the peer node.
|
||||
* BUT we will plumb a cleartext key so that we can do
|
||||
* per-Sta default key table lookup in software.
|
||||
*/
|
||||
if (is_broadcast_ether_addr(addr)) {
|
||||
switch (opmode) {
|
||||
@ -836,11 +837,22 @@ static void ath9k_ht_conf(struct ath_softc *sc,
|
||||
ath9k_hw_set11nmac2040(sc->sc_ah, sc->tx_chan_width);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"%s: BSS Changed HT, chanwidth: %d\n",
|
||||
__func__, sc->tx_chan_width);
|
||||
"BSS Changed HT, chanwidth: %d\n", sc->tx_chan_width);
|
||||
}
|
||||
}
|
||||
|
||||
static inline int ath_sec_offset(u8 ext_offset)
|
||||
{
|
||||
if (ext_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE)
|
||||
return 0;
|
||||
else if (ext_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
|
||||
return 1;
|
||||
else if (ext_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
|
||||
return -1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ath9k_bss_assoc_info(struct ath_softc *sc,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_bss_conf *bss_conf)
|
||||
@ -851,12 +863,10 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc,
|
||||
int pos;
|
||||
|
||||
if (bss_conf->assoc) {
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
|
||||
__func__,
|
||||
bss_conf->aid);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info ASSOC %d\n", bss_conf->aid);
|
||||
|
||||
/* New association, store aid */
|
||||
if (avp->av_opmode == ATH9K_M_STA) {
|
||||
if (avp->av_opmode == NL80211_IFTYPE_STATION) {
|
||||
sc->sc_curaid = bss_conf->aid;
|
||||
ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
|
||||
sc->sc_curaid);
|
||||
@ -876,29 +886,25 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc,
|
||||
ath_update_chainmask(sc, hw->conf.ht.enabled);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"%s: bssid %pM aid 0x%x\n",
|
||||
__func__,
|
||||
"bssid %pM aid 0x%x\n",
|
||||
sc->sc_curbssid, sc->sc_curaid);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
|
||||
__func__,
|
||||
curchan->center_freq);
|
||||
|
||||
pos = ath_get_channel(sc, curchan);
|
||||
if (pos == -1) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: Invalid channel\n", __func__);
|
||||
"Invalid channel: %d\n", curchan->center_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
if (hw->conf.ht.enabled) {
|
||||
sc->sc_ah->ah_channels[pos].chanmode =
|
||||
ath_get_extchanmode(sc, curchan, bss_conf);
|
||||
int offset =
|
||||
ath_sec_offset(bss_conf->ht.secondary_channel_offset);
|
||||
sc->tx_chan_width = (bss_conf->ht.width_40_ok) ?
|
||||
ATH9K_HT_MACMODE_2040 : ATH9K_HT_MACMODE_20;
|
||||
|
||||
if (bss_conf->ht.width_40_ok)
|
||||
sc->tx_chan_width = ATH9K_HT_MACMODE_2040;
|
||||
else
|
||||
sc->tx_chan_width = ATH9K_HT_MACMODE_20;
|
||||
sc->sc_ah->ah_channels[pos].chanmode =
|
||||
ath_get_extchanmode(sc, curchan,
|
||||
offset, sc->tx_chan_width);
|
||||
} else {
|
||||
sc->sc_ah->ah_channels[pos].chanmode =
|
||||
(curchan->band == IEEE80211_BAND_2GHZ) ?
|
||||
@ -907,14 +913,15 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc,
|
||||
|
||||
/* set h/w channel */
|
||||
if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: Unable to set channel\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "Unable to set channel: %d\n",
|
||||
curchan->center_freq);
|
||||
|
||||
/* Start ANI */
|
||||
mod_timer(&sc->sc_ani.timer,
|
||||
jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
|
||||
|
||||
} else {
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info DISSOC\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info DISSOC\n");
|
||||
sc->sc_curaid = 0;
|
||||
}
|
||||
}
|
||||
@ -1053,8 +1060,8 @@ static void ath_radio_enable(struct ath_softc *sc)
|
||||
sc->sc_ht_extprotspacing,
|
||||
false, &status)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to reset channel %u (%uMhz) "
|
||||
"flags 0x%x hal status %u\n", __func__,
|
||||
"Unable to reset channel %u (%uMhz) "
|
||||
"flags 0x%x hal status %u\n",
|
||||
ath9k_hw_mhz2ieee(ah,
|
||||
ah->ah_curchan->channel,
|
||||
ah->ah_curchan->channelFlags),
|
||||
@ -1066,7 +1073,7 @@ static void ath_radio_enable(struct ath_softc *sc)
|
||||
ath_update_txpow(sc);
|
||||
if (ath_startrecv(sc) != 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to restart recv logic\n", __func__);
|
||||
"Unable to restart recv logic\n");
|
||||
return;
|
||||
}
|
||||
|
||||
@ -1111,8 +1118,8 @@ static void ath_radio_disable(struct ath_softc *sc)
|
||||
sc->sc_ht_extprotspacing,
|
||||
false, &status)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to reset channel %u (%uMhz) "
|
||||
"flags 0x%x hal status %u\n", __func__,
|
||||
"Unable to reset channel %u (%uMhz) "
|
||||
"flags 0x%x hal status %u\n",
|
||||
ath9k_hw_mhz2ieee(ah,
|
||||
ah->ah_curchan->channel,
|
||||
ah->ah_curchan->channelFlags),
|
||||
@ -1192,7 +1199,7 @@ static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
|
||||
sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
|
||||
if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
|
||||
"radio as it is disabled by h/w \n");
|
||||
"radio as it is disabled by h/w\n");
|
||||
return -EPERM;
|
||||
}
|
||||
ath_radio_enable(sc);
|
||||
@ -1272,7 +1279,7 @@ static void ath_detach(struct ath_softc *sc)
|
||||
struct ieee80211_hw *hw = sc->hw;
|
||||
int i = 0;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Detach ATH hw\n");
|
||||
|
||||
#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
|
||||
ath_deinit_rfkill(sc);
|
||||
@ -1298,6 +1305,7 @@ static void ath_detach(struct ath_softc *sc)
|
||||
ath_tx_cleanupq(sc, &sc->sc_txq[i]);
|
||||
|
||||
ath9k_hw_detach(sc->sc_ah);
|
||||
ath9k_exit_debug(sc);
|
||||
}
|
||||
|
||||
static int ath_init(u16 devid, struct ath_softc *sc)
|
||||
@ -1309,7 +1317,9 @@ static int ath_init(u16 devid, struct ath_softc *sc)
|
||||
|
||||
/* XXX: hardware will not be ready until ath_open() being called */
|
||||
sc->sc_flags |= SC_OP_INVALID;
|
||||
sc->sc_debug = DBG_DEFAULT;
|
||||
|
||||
if (ath9k_init_debug(sc) < 0)
|
||||
printk(KERN_ERR "Unable to create debugfs files\n");
|
||||
|
||||
spin_lock_init(&sc->sc_resetlock);
|
||||
tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
|
||||
@ -1327,8 +1337,7 @@ static int ath_init(u16 devid, struct ath_softc *sc)
|
||||
ah = ath9k_hw_attach(devid, sc, sc->mem, &status);
|
||||
if (ah == NULL) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to attach hardware; HAL status %u\n",
|
||||
__func__, status);
|
||||
"Unable to attach hardware; HAL status %u\n", status);
|
||||
error = -ENXIO;
|
||||
goto bad;
|
||||
}
|
||||
@ -1338,8 +1347,8 @@ static int ath_init(u16 devid, struct ath_softc *sc)
|
||||
sc->sc_keymax = ah->ah_caps.keycache_size;
|
||||
if (sc->sc_keymax > ATH_KEYMAX) {
|
||||
DPRINTF(sc, ATH_DBG_KEYCACHE,
|
||||
"%s: Warning, using only %u entries in %u key cache\n",
|
||||
__func__, ATH_KEYMAX, sc->sc_keymax);
|
||||
"Warning, using only %u entries in %u key cache\n",
|
||||
ATH_KEYMAX, sc->sc_keymax);
|
||||
sc->sc_keymax = ATH_KEYMAX;
|
||||
}
|
||||
|
||||
@ -1369,7 +1378,8 @@ static int ath_init(u16 devid, struct ath_softc *sc)
|
||||
goto bad;
|
||||
|
||||
/* default to MONITOR mode */
|
||||
sc->sc_ah->ah_opmode = ATH9K_M_MONITOR;
|
||||
sc->sc_ah->ah_opmode = NL80211_IFTYPE_MONITOR;
|
||||
|
||||
|
||||
/* Setup rate tables */
|
||||
|
||||
@ -1386,14 +1396,14 @@ static int ath_init(u16 devid, struct ath_softc *sc)
|
||||
sc->sc_bhalq = ath_beaconq_setup(ah);
|
||||
if (sc->sc_bhalq == -1) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to setup a beacon xmit queue\n", __func__);
|
||||
"Unable to setup a beacon xmit queue\n");
|
||||
error = -EIO;
|
||||
goto bad2;
|
||||
}
|
||||
sc->sc_cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
|
||||
if (sc->sc_cabq == NULL) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to setup CAB xmit queue\n", __func__);
|
||||
"Unable to setup CAB xmit queue\n");
|
||||
error = -EIO;
|
||||
goto bad2;
|
||||
}
|
||||
@ -1408,30 +1418,26 @@ static int ath_init(u16 devid, struct ath_softc *sc)
|
||||
/* NB: ensure BK queue is the lowest priority h/w queue */
|
||||
if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to setup xmit queue for BK traffic\n",
|
||||
__func__);
|
||||
"Unable to setup xmit queue for BK traffic\n");
|
||||
error = -EIO;
|
||||
goto bad2;
|
||||
}
|
||||
|
||||
if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to setup xmit queue for BE traffic\n",
|
||||
__func__);
|
||||
"Unable to setup xmit queue for BE traffic\n");
|
||||
error = -EIO;
|
||||
goto bad2;
|
||||
}
|
||||
if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to setup xmit queue for VI traffic\n",
|
||||
__func__);
|
||||
"Unable to setup xmit queue for VI traffic\n");
|
||||
error = -EIO;
|
||||
goto bad2;
|
||||
}
|
||||
if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to setup xmit queue for VO traffic\n",
|
||||
__func__);
|
||||
"Unable to setup xmit queue for VO traffic\n");
|
||||
error = -EIO;
|
||||
goto bad2;
|
||||
}
|
||||
@ -1543,7 +1549,7 @@ static int ath_attach(u16 devid, struct ath_softc *sc)
|
||||
struct ieee80211_hw *hw = sc->hw;
|
||||
int error = 0;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Attach ATH hw\n");
|
||||
|
||||
error = ath_init(devid, sc);
|
||||
if (error != 0)
|
||||
@ -1574,8 +1580,7 @@ static int ath_attach(u16 devid, struct ath_softc *sc)
|
||||
error = ath_rate_control_register();
|
||||
if (error != 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: Unable to register rate control "
|
||||
"algorithm:%d\n", __func__, error);
|
||||
"Unable to register rate control algorithm: %d\n", error);
|
||||
ath_rate_control_unregister();
|
||||
goto bad;
|
||||
}
|
||||
@ -1643,15 +1648,13 @@ int ath_reset(struct ath_softc *sc, bool retry_tx)
|
||||
sc->sc_tx_chainmask, sc->sc_rx_chainmask,
|
||||
sc->sc_ht_extprotspacing, false, &status)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to reset hardware; hal status %u\n",
|
||||
__func__, status);
|
||||
"Unable to reset hardware; hal status %u\n", status);
|
||||
error = -EIO;
|
||||
}
|
||||
spin_unlock_bh(&sc->sc_resetlock);
|
||||
|
||||
if (ath_startrecv(sc) != 0)
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to start recv logic\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "Unable to start recv logic\n");
|
||||
|
||||
/*
|
||||
* We may be doing a reset in response to a request
|
||||
@ -1699,13 +1702,12 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
|
||||
struct ath_buf *bf;
|
||||
int i, bsize, error;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: %s DMA: %u buffers %u desc/buf\n",
|
||||
__func__, name, nbuf, ndesc);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n",
|
||||
name, nbuf, ndesc);
|
||||
|
||||
/* ath_desc must be a multiple of DWORDs */
|
||||
if ((sizeof(struct ath_desc) % 4) != 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "%s: ath_desc not DWORD aligned\n",
|
||||
__func__);
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "ath_desc not DWORD aligned\n");
|
||||
ASSERT((sizeof(struct ath_desc) % 4) == 0);
|
||||
error = -ENOMEM;
|
||||
goto fail;
|
||||
@ -1741,8 +1743,8 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
|
||||
goto fail;
|
||||
}
|
||||
ds = dd->dd_desc;
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: %s DMA map: %p (%u) -> %llx (%u)\n",
|
||||
__func__, dd->dd_name, ds, (u32) dd->dd_desc_len,
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
|
||||
dd->dd_name, ds, (u32) dd->dd_desc_len,
|
||||
ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
|
||||
|
||||
/* allocate buffers */
|
||||
@ -1864,14 +1866,14 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
||||
struct ath9k_channel *init_channel;
|
||||
int error = 0, pos, status;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
|
||||
"initial channel: %d MHz\n", __func__, curchan->center_freq);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Starting driver with "
|
||||
"initial channel: %d MHz\n", curchan->center_freq);
|
||||
|
||||
/* setup initial channel */
|
||||
|
||||
pos = ath_get_channel(sc, curchan);
|
||||
if (pos == -1) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "Invalid channel: %d\n", curchan->center_freq);
|
||||
error = -EINVAL;
|
||||
goto error;
|
||||
}
|
||||
@ -1897,8 +1899,8 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
||||
sc->sc_tx_chainmask, sc->sc_rx_chainmask,
|
||||
sc->sc_ht_extprotspacing, false, &status)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to reset hardware; hal status %u "
|
||||
"(freq %u flags 0x%x)\n", __func__, status,
|
||||
"Unable to reset hardware; hal status %u "
|
||||
"(freq %u flags 0x%x)\n", status,
|
||||
init_channel->channel, init_channel->channelFlags);
|
||||
error = -EIO;
|
||||
spin_unlock_bh(&sc->sc_resetlock);
|
||||
@ -1921,7 +1923,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
||||
*/
|
||||
if (ath_startrecv(sc) != 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to start recv logic\n", __func__);
|
||||
"Unable to start recv logic\n");
|
||||
error = -EIO;
|
||||
goto error;
|
||||
}
|
||||
@ -1942,8 +1944,8 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
||||
* Note we only do this (at the moment) for station mode.
|
||||
*/
|
||||
if (ath9k_hw_phycounters(sc->sc_ah) &&
|
||||
((sc->sc_ah->ah_opmode == ATH9K_M_STA) ||
|
||||
(sc->sc_ah->ah_opmode == ATH9K_M_IBSS)))
|
||||
((sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION) ||
|
||||
(sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC)))
|
||||
sc->sc_imask |= ATH9K_INT_MIB;
|
||||
/*
|
||||
* Some hardware processes the TIM IE and fires an
|
||||
@ -1952,7 +1954,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
||||
* enable the TIM interrupt when operating as station.
|
||||
*/
|
||||
if ((sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_ENHANCEDPM) &&
|
||||
(sc->sc_ah->ah_opmode == ATH9K_M_STA) &&
|
||||
(sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION) &&
|
||||
!sc->sc_config.swBeaconProcess)
|
||||
sc->sc_imask |= ATH9K_INT_TIM;
|
||||
|
||||
@ -2013,12 +2015,10 @@ static int ath9k_tx(struct ieee80211_hw *hw,
|
||||
if (!txctl.txq)
|
||||
goto exit;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
|
||||
__func__,
|
||||
skb);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
|
||||
|
||||
if (ath_tx_start(sc, skb, &txctl) != 0) {
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "TX failed\n");
|
||||
goto exit;
|
||||
}
|
||||
|
||||
@ -2033,11 +2033,11 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
||||
struct ath_softc *sc = hw->priv;
|
||||
|
||||
if (sc->sc_flags & SC_OP_INVALID) {
|
||||
DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_ANY, "Device not present\n");
|
||||
return;
|
||||
}
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Cleaning up\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Cleaning up\n");
|
||||
|
||||
ieee80211_stop_queues(sc->hw);
|
||||
|
||||
@ -2062,7 +2062,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
||||
|
||||
sc->sc_flags |= SC_OP_INVALID;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Driver halt\n");
|
||||
}
|
||||
|
||||
static int ath9k_add_interface(struct ieee80211_hw *hw,
|
||||
@ -2070,7 +2070,7 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
|
||||
{
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_vap *avp = (void *)conf->vif->drv_priv;
|
||||
int ic_opmode = 0;
|
||||
enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
|
||||
|
||||
/* Support only vap for now */
|
||||
|
||||
@ -2079,30 +2079,27 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
|
||||
|
||||
switch (conf->type) {
|
||||
case NL80211_IFTYPE_STATION:
|
||||
ic_opmode = ATH9K_M_STA;
|
||||
ic_opmode = NL80211_IFTYPE_STATION;
|
||||
break;
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
ic_opmode = ATH9K_M_IBSS;
|
||||
ic_opmode = NL80211_IFTYPE_ADHOC;
|
||||
break;
|
||||
case NL80211_IFTYPE_AP:
|
||||
ic_opmode = ATH9K_M_HOSTAP;
|
||||
ic_opmode = NL80211_IFTYPE_AP;
|
||||
break;
|
||||
default:
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: Interface type %d not yet supported\n",
|
||||
__func__, conf->type);
|
||||
"Interface type %d not yet supported\n", conf->type);
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
|
||||
__func__,
|
||||
ic_opmode);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Attach a VAP of type: %d\n", ic_opmode);
|
||||
|
||||
/* Set the VAP opmode */
|
||||
avp->av_opmode = ic_opmode;
|
||||
avp->av_bslot = -1;
|
||||
|
||||
if (ic_opmode == ATH9K_M_HOSTAP)
|
||||
if (ic_opmode == NL80211_IFTYPE_AP)
|
||||
ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
|
||||
|
||||
sc->sc_vaps[0] = conf->vif;
|
||||
@ -2127,7 +2124,7 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_vap *avp = (void *)conf->vif->drv_priv;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Detach Interface\n");
|
||||
|
||||
#ifdef CONFIG_SLOW_ANT_DIV
|
||||
ath_slow_ant_div_stop(&sc->sc_antdiv);
|
||||
@ -2136,8 +2133,8 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
|
||||
del_timer_sync(&sc->sc_ani.timer);
|
||||
|
||||
/* Reclaim beacon resources */
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
|
||||
sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP ||
|
||||
sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC) {
|
||||
ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
|
||||
ath_beacon_return(sc, avp);
|
||||
}
|
||||
@ -2157,12 +2154,13 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
||||
struct ieee80211_channel *curchan = hw->conf.channel;
|
||||
int pos;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
|
||||
__func__, curchan->center_freq);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
|
||||
curchan->center_freq);
|
||||
|
||||
pos = ath_get_channel(sc, curchan);
|
||||
if (pos == -1) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "Invalid channel: %d\n",
|
||||
curchan->center_freq);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -2171,9 +2169,21 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
||||
(curchan->band == IEEE80211_BAND_2GHZ) ?
|
||||
CHANNEL_G : CHANNEL_A;
|
||||
|
||||
if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: Unable to set channel\n", __func__);
|
||||
if ((sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) &&
|
||||
(conf->ht.enabled)) {
|
||||
sc->tx_chan_width = (!!conf->ht.sec_chan_offset) ?
|
||||
ATH9K_HT_MACMODE_2040 : ATH9K_HT_MACMODE_20;
|
||||
|
||||
sc->sc_ah->ah_channels[pos].chanmode =
|
||||
ath_get_extchanmode(sc, curchan,
|
||||
conf->ht.sec_chan_offset,
|
||||
sc->tx_chan_width);
|
||||
}
|
||||
|
||||
if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "Unable to set channel\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
if (changed & IEEE80211_CONF_CHANGE_HT)
|
||||
@ -2198,8 +2208,8 @@ static int ath9k_config_interface(struct ieee80211_hw *hw,
|
||||
/* TODO: Need to decide which hw opmode to use for multi-interface
|
||||
* cases */
|
||||
if (vif->type == NL80211_IFTYPE_AP &&
|
||||
ah->ah_opmode != ATH9K_M_HOSTAP) {
|
||||
ah->ah_opmode = ATH9K_M_HOSTAP;
|
||||
ah->ah_opmode != NL80211_IFTYPE_AP) {
|
||||
ah->ah_opmode = NL80211_IFTYPE_STATION;
|
||||
ath9k_hw_setopmode(ah);
|
||||
ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
|
||||
/* Request full reset to get hw opmode changed properly */
|
||||
@ -2221,9 +2231,8 @@ static int ath9k_config_interface(struct ieee80211_hw *hw,
|
||||
sc->sc_config.ath_aggr_prot = 0;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"%s: RX filter 0x%x bssid %pM aid 0x%x\n",
|
||||
__func__, rfilt,
|
||||
sc->sc_curbssid, sc->sc_curaid);
|
||||
"RX filter 0x%x bssid %pM aid 0x%x\n",
|
||||
rfilt, sc->sc_curbssid, sc->sc_curaid);
|
||||
|
||||
/* need to reconfigure the beacon */
|
||||
sc->sc_flags &= ~SC_OP_BEACONS ;
|
||||
@ -2255,7 +2264,7 @@ static int ath9k_config_interface(struct ieee80211_hw *hw,
|
||||
}
|
||||
|
||||
/* Check for WLAN_CAPABILITY_PRIVACY ? */
|
||||
if ((avp->av_opmode != ATH9K_M_STA)) {
|
||||
if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
|
||||
for (i = 0; i < IEEE80211_WEP_NKID; i++)
|
||||
if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
|
||||
ath9k_hw_keysetmac(sc->sc_ah,
|
||||
@ -2300,8 +2309,7 @@ static void ath9k_configure_filter(struct ieee80211_hw *hw,
|
||||
ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
|
||||
}
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
|
||||
__func__, sc->rx_filter);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Set HW RX filter: 0x%x\n", sc->rx_filter);
|
||||
}
|
||||
|
||||
static void ath9k_sta_notify(struct ieee80211_hw *hw,
|
||||
@ -2341,20 +2349,14 @@ static int ath9k_conf_tx(struct ieee80211_hw *hw,
|
||||
qnum = ath_get_hal_qnum(queue, sc);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"%s: Configure tx [queue/halq] [%d/%d], "
|
||||
"Configure tx [queue/halq] [%d/%d], "
|
||||
"aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
|
||||
__func__,
|
||||
queue,
|
||||
qnum,
|
||||
params->aifs,
|
||||
params->cw_min,
|
||||
params->cw_max,
|
||||
params->txop);
|
||||
queue, qnum, params->aifs, params->cw_min,
|
||||
params->cw_max, params->txop);
|
||||
|
||||
ret = ath_txq_update(sc, qnum, &qi);
|
||||
if (ret)
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: TXQ Update failed\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "TXQ Update failed\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
@ -2368,7 +2370,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
|
||||
struct ath_softc *sc = hw->priv;
|
||||
int ret = 0;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_KEYCACHE, "Set HW Key\n");
|
||||
|
||||
switch (cmd) {
|
||||
case SET_KEY:
|
||||
@ -2401,8 +2403,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
|
||||
struct ath_softc *sc = hw->priv;
|
||||
|
||||
if (changed & BSS_CHANGED_ERP_PREAMBLE) {
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
|
||||
__func__,
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
|
||||
bss_conf->use_short_preamble);
|
||||
if (bss_conf->use_short_preamble)
|
||||
sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
|
||||
@ -2411,8 +2412,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
|
||||
}
|
||||
|
||||
if (changed & BSS_CHANGED_ERP_CTS_PROT) {
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
|
||||
__func__,
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
|
||||
bss_conf->use_cts_prot);
|
||||
if (bss_conf->use_cts_prot &&
|
||||
hw->conf.channel->band != IEEE80211_BAND_5GHZ)
|
||||
@ -2425,8 +2425,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
|
||||
ath9k_ht_conf(sc, bss_conf);
|
||||
|
||||
if (changed & BSS_CHANGED_ASSOC) {
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
|
||||
__func__,
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
|
||||
bss_conf->assoc);
|
||||
ath9k_bss_assoc_info(sc, vif, bss_conf);
|
||||
}
|
||||
@ -2470,8 +2469,7 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw,
|
||||
ret = ath_tx_aggr_start(sc, sta, tid, ssn);
|
||||
if (ret < 0)
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: Unable to start TX aggregation\n",
|
||||
__func__);
|
||||
"Unable to start TX aggregation\n");
|
||||
else
|
||||
ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
|
||||
break;
|
||||
@ -2479,8 +2477,7 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw,
|
||||
ret = ath_tx_aggr_stop(sc, sta, tid);
|
||||
if (ret < 0)
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: Unable to stop TX aggregation\n",
|
||||
__func__);
|
||||
"Unable to stop TX aggregation\n");
|
||||
|
||||
ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
|
||||
break;
|
||||
@ -2488,8 +2485,7 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw,
|
||||
ath_tx_aggr_resume(sc, sta, tid);
|
||||
break;
|
||||
default:
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: Unknown AMPDU action\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "Unknown AMPDU action\n");
|
||||
}
|
||||
|
||||
return ret;
|
||||
@ -2545,7 +2541,6 @@ static struct {
|
||||
/*
|
||||
* Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
|
||||
*/
|
||||
|
||||
static const char *
|
||||
ath_mac_bb_name(u32 mac_bb_version)
|
||||
{
|
||||
@ -2563,7 +2558,6 @@ ath_mac_bb_name(u32 mac_bb_version)
|
||||
/*
|
||||
* Return the RF name. "????" is returned if the RF is unknown.
|
||||
*/
|
||||
|
||||
static const char *
|
||||
ath_rf_name(u16 rf_version)
|
||||
{
|
||||
@ -2602,7 +2596,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
|
||||
if (ret) {
|
||||
printk(KERN_ERR "ath9k: 32-bit DMA consistent "
|
||||
"DMA enable faled\n");
|
||||
"DMA enable failed\n");
|
||||
goto bad;
|
||||
}
|
||||
|
||||
@ -2812,6 +2806,6 @@ module_init(init_ath_pci);
|
||||
static void __exit exit_ath_pci(void)
|
||||
{
|
||||
pci_unregister_driver(&ath_pci_driver);
|
||||
printk(KERN_INFO "%s: driver unloaded\n", dev_info);
|
||||
printk(KERN_INFO "%s: Driver unloaded\n", dev_info);
|
||||
}
|
||||
module_exit(exit_ath_pci);
|
||||
|
@ -52,8 +52,7 @@ ath9k_hw_set_channel(struct ath_hal *ah, struct ath9k_channel *chan)
|
||||
bModeSynth = 1;
|
||||
} else {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: invalid channel %u MHz\n", __func__,
|
||||
freq);
|
||||
"Invalid channel %u MHz\n", freq);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -86,7 +85,7 @@ ath9k_hw_set_channel(struct ath_hal *ah, struct ath9k_channel *chan)
|
||||
aModeRefSel = ath9k_hw_reverse_bits(1, 2);
|
||||
} else {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
|
||||
"%s: invalid channel %u MHz\n", __func__, freq);
|
||||
"Invalid channel %u MHz\n", freq);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -348,8 +347,7 @@ bool ath9k_hw_init_rf(struct ath_hal *ah, int *status)
|
||||
|| ahp->ah_analogBank6TPCData == NULL
|
||||
|| ahp->ah_analogBank7Data == NULL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
|
||||
"%s: cannot allocate RF banks\n",
|
||||
__func__);
|
||||
"Cannot allocate RF banks\n");
|
||||
*status = -ENOMEM;
|
||||
return false;
|
||||
}
|
||||
@ -360,8 +358,7 @@ bool ath9k_hw_init_rf(struct ath_hal *ah, int *status)
|
||||
ahp->ah_iniAddac.ia_columns), GFP_KERNEL);
|
||||
if (ahp->ah_addac5416_21 == NULL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
|
||||
"%s: cannot allocate ah_addac5416_21\n",
|
||||
__func__);
|
||||
"Cannot allocate ah_addac5416_21\n");
|
||||
*status = -ENOMEM;
|
||||
return false;
|
||||
}
|
||||
@ -371,8 +368,7 @@ bool ath9k_hw_init_rf(struct ath_hal *ah, int *status)
|
||||
ahp->ah_iniBank6.ia_rows), GFP_KERNEL);
|
||||
if (ahp->ah_bank6Temp == NULL) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
|
||||
"%s: cannot allocate ah_bank6Temp\n",
|
||||
__func__);
|
||||
"Cannot allocate ah_bank6Temp\n");
|
||||
*status = -ENOMEM;
|
||||
return false;
|
||||
}
|
||||
|
@ -1304,6 +1304,38 @@ static void ath_rc_tx_status(struct ath_softc *sc,
|
||||
xretries, long_retry);
|
||||
}
|
||||
|
||||
static struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc,
|
||||
enum ieee80211_band band,
|
||||
bool is_ht, bool is_cw_40)
|
||||
{
|
||||
int mode = 0;
|
||||
|
||||
switch(band) {
|
||||
case IEEE80211_BAND_2GHZ:
|
||||
mode = ATH9K_MODE_11G;
|
||||
if (is_ht)
|
||||
mode = ATH9K_MODE_11NG_HT20;
|
||||
if (is_cw_40)
|
||||
mode = ATH9K_MODE_11NG_HT40PLUS;
|
||||
break;
|
||||
case IEEE80211_BAND_5GHZ:
|
||||
mode = ATH9K_MODE_11A;
|
||||
if (is_ht)
|
||||
mode = ATH9K_MODE_11NA_HT20;
|
||||
if (is_cw_40)
|
||||
mode = ATH9K_MODE_11NA_HT40PLUS;
|
||||
break;
|
||||
default:
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Invalid band\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
BUG_ON(mode >= ATH9K_MODE_MAX);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "Choosing rate table for mode: %d\n", mode);
|
||||
return sc->hw_rate_table[mode];
|
||||
}
|
||||
|
||||
static void ath_rc_init(struct ath_softc *sc,
|
||||
struct ath_rate_priv *ath_rc_priv,
|
||||
struct ieee80211_supported_band *sband,
|
||||
@ -1314,16 +1346,25 @@ static void ath_rc_init(struct ath_softc *sc,
|
||||
u8 *ht_mcs = (u8 *)&ath_rc_priv->neg_ht_rates;
|
||||
u8 i, j, k, hi = 0, hthi = 0;
|
||||
|
||||
rate_table = sc->hw_rate_table[sc->sc_curmode];
|
||||
/* FIXME: Adhoc */
|
||||
if ((sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION) ||
|
||||
(sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC)) {
|
||||
bool is_cw_40 = sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40;
|
||||
rate_table = ath_choose_rate_table(sc, sband->band,
|
||||
sta->ht_cap.ht_supported,
|
||||
is_cw_40);
|
||||
} else if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
|
||||
/* sc_curmode would be set on init through config() */
|
||||
rate_table = sc->hw_rate_table[sc->sc_curmode];
|
||||
}
|
||||
|
||||
if (!rate_table) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "Rate table not initialized\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (sta->ht_cap.ht_supported) {
|
||||
if (sband->band == IEEE80211_BAND_2GHZ)
|
||||
rate_table = sc->hw_rate_table[ATH9K_MODE_11NG_HT20];
|
||||
else
|
||||
rate_table = sc->hw_rate_table[ATH9K_MODE_11NA_HT20];
|
||||
|
||||
ath_rc_priv->ht_cap = (WLAN_RC_HT_FLAG | WLAN_RC_DS_FLAG);
|
||||
|
||||
if (sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
|
||||
ath_rc_priv->ht_cap |= WLAN_RC_40_FLAG;
|
||||
}
|
||||
@ -1531,8 +1572,7 @@ static void *ath_rate_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp
|
||||
rate_priv = kzalloc(sizeof(struct ath_rate_priv), gfp);
|
||||
if (!rate_priv) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: Unable to allocate private rc structure\n",
|
||||
__func__);
|
||||
"Unable to allocate private rc structure\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -105,8 +105,7 @@ static struct sk_buff *ath_rxbuf_alloc(struct ath_softc *sc, u32 len)
|
||||
skb_reserve(skb, sc->sc_cachelsz - off);
|
||||
} else {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: skbuff alloc of size %u failed\n",
|
||||
__func__, len);
|
||||
"skbuff alloc of size %u failed\n", len);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@ -166,7 +165,7 @@ static int ath_rx_prepare(struct sk_buff *skb, struct ath_desc *ds,
|
||||
* discard the frame. Enable this if you want to see
|
||||
* error frames in Monitor mode.
|
||||
*/
|
||||
if (sc->sc_ah->ah_opmode != ATH9K_M_MONITOR)
|
||||
if (sc->sc_ah->ah_opmode != NL80211_IFTYPE_MONITOR)
|
||||
goto rx_next;
|
||||
} else if (ds->ds_rxstat.rs_status != 0) {
|
||||
if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC)
|
||||
@ -192,7 +191,7 @@ static int ath_rx_prepare(struct sk_buff *skb, struct ath_desc *ds,
|
||||
* decryption and MIC failures. For monitor mode,
|
||||
* we also ignore the CRC error.
|
||||
*/
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_MONITOR) {
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_MONITOR) {
|
||||
if (ds->ds_rxstat.rs_status &
|
||||
~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
|
||||
ATH9K_RXERR_CRC))
|
||||
@ -263,11 +262,7 @@ static void ath_opmode_init(struct ath_softc *sc)
|
||||
|
||||
/* calculate and install multicast filter */
|
||||
mfilt[0] = mfilt[1] = ~0;
|
||||
|
||||
ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG ,
|
||||
"%s: RX filter 0x%x, MC filter %08x:%08x\n",
|
||||
__func__, rfilt, mfilt[0], mfilt[1]);
|
||||
}
|
||||
|
||||
int ath_rx_init(struct ath_softc *sc, int nbufs)
|
||||
@ -285,8 +280,8 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
|
||||
min(sc->sc_cachelsz,
|
||||
(u16)64));
|
||||
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "%s: cachelsz %u rxbufsize %u\n",
|
||||
__func__, sc->sc_cachelsz, sc->sc_rxbufsize);
|
||||
DPRINTF(sc, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
|
||||
sc->sc_cachelsz, sc->sc_rxbufsize);
|
||||
|
||||
/* Initialize rx descriptors */
|
||||
|
||||
@ -294,8 +289,7 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
|
||||
"rx", nbufs, 1);
|
||||
if (error != 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: failed to allocate rx descriptors: %d\n",
|
||||
__func__, error);
|
||||
"failed to allocate rx descriptors: %d\n", error);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -310,6 +304,15 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
|
||||
bf->bf_buf_addr = pci_map_single(sc->pdev, skb->data,
|
||||
sc->sc_rxbufsize,
|
||||
PCI_DMA_FROMDEVICE);
|
||||
if (unlikely(pci_dma_mapping_error(sc->pdev,
|
||||
bf->bf_buf_addr))) {
|
||||
dev_kfree_skb_any(skb);
|
||||
bf->bf_mpdu = NULL;
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"pci_dma_mapping_error() on RX init\n");
|
||||
error = -ENOMEM;
|
||||
break;
|
||||
}
|
||||
bf->bf_dmacontext = bf->bf_buf_addr;
|
||||
}
|
||||
sc->sc_rxlink = NULL;
|
||||
@ -367,25 +370,25 @@ u32 ath_calcrxfilter(struct ath_softc *sc)
|
||||
| ATH9K_RX_FILTER_MCAST;
|
||||
|
||||
/* If not a STA, enable processing of Probe Requests */
|
||||
if (sc->sc_ah->ah_opmode != ATH9K_M_STA)
|
||||
if (sc->sc_ah->ah_opmode != NL80211_IFTYPE_STATION)
|
||||
rfilt |= ATH9K_RX_FILTER_PROBEREQ;
|
||||
|
||||
/* Can't set HOSTAP into promiscous mode */
|
||||
if (((sc->sc_ah->ah_opmode != ATH9K_M_HOSTAP) &&
|
||||
if (((sc->sc_ah->ah_opmode != NL80211_IFTYPE_AP) &&
|
||||
(sc->rx_filter & FIF_PROMISC_IN_BSS)) ||
|
||||
(sc->sc_ah->ah_opmode == ATH9K_M_MONITOR)) {
|
||||
(sc->sc_ah->ah_opmode == NL80211_IFTYPE_MONITOR)) {
|
||||
rfilt |= ATH9K_RX_FILTER_PROM;
|
||||
/* ??? To prevent from sending ACK */
|
||||
rfilt &= ~ATH9K_RX_FILTER_UCAST;
|
||||
}
|
||||
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_STA ||
|
||||
sc->sc_ah->ah_opmode == ATH9K_M_IBSS)
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION ||
|
||||
sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC)
|
||||
rfilt |= ATH9K_RX_FILTER_BEACON;
|
||||
|
||||
/* If in HOSTAP mode, want to enable reception of PSPOLL frames
|
||||
& beacon frames */
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP)
|
||||
if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP)
|
||||
rfilt |= (ATH9K_RX_FILTER_BEACON | ATH9K_RX_FILTER_PSPOLL);
|
||||
|
||||
return rfilt;
|
||||
@ -595,6 +598,14 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
|
||||
bf->bf_buf_addr = pci_map_single(sc->pdev, requeue_skb->data,
|
||||
sc->sc_rxbufsize,
|
||||
PCI_DMA_FROMDEVICE);
|
||||
if (unlikely(pci_dma_mapping_error(sc->pdev,
|
||||
bf->bf_buf_addr))) {
|
||||
dev_kfree_skb_any(requeue_skb);
|
||||
bf->bf_mpdu = NULL;
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"pci_dma_mapping_error() on RX\n");
|
||||
break;
|
||||
}
|
||||
bf->bf_dmacontext = bf->bf_buf_addr;
|
||||
|
||||
/*
|
||||
|
@ -42,7 +42,7 @@ ath9k_regd_sort(void *a, u32 n, u32 size, ath_hal_cmp_t *cmp)
|
||||
u8 *u = t - size;
|
||||
if (cmp(u, t) <= 0)
|
||||
break;
|
||||
swap(u, t, size);
|
||||
swap_array(u, t, size);
|
||||
}
|
||||
}
|
||||
|
||||
@ -78,8 +78,7 @@ static bool ath9k_regd_is_eeprom_valid(struct ath_hal *ah)
|
||||
return true;
|
||||
}
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: invalid regulatory domain/country code 0x%x\n",
|
||||
__func__, rd);
|
||||
"invalid regulatory domain/country code 0x%x\n", rd);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -107,13 +106,12 @@ static bool ath9k_regd_is_ccode_valid(struct ath_hal *ah,
|
||||
return true;
|
||||
|
||||
rd = ath9k_regd_get_eepromRD(ah);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "%s: EEPROM regdomain 0x%x\n",
|
||||
__func__, rd);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "EEPROM regdomain 0x%x\n", rd);
|
||||
|
||||
if (rd & COUNTRY_ERD_FLAG) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: EEPROM setting is country code %u\n",
|
||||
__func__, rd & ~COUNTRY_ERD_FLAG);
|
||||
"EEPROM setting is country code %u\n",
|
||||
rd & ~COUNTRY_ERD_FLAG);
|
||||
return cc == (rd & ~COUNTRY_ERD_FLAG);
|
||||
}
|
||||
|
||||
@ -290,8 +288,7 @@ ath9k_regd_get_wmode_regdomain(struct ath_hal *ah, int regDmn,
|
||||
}
|
||||
if (!found) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: Failed to find reg domain pair %u\n",
|
||||
__func__, regDmn);
|
||||
"Failed to find reg domain pair %u\n", regDmn);
|
||||
return false;
|
||||
}
|
||||
if (!(channelFlag & CHANNEL_2GHZ)) {
|
||||
@ -307,8 +304,7 @@ ath9k_regd_get_wmode_regdomain(struct ath_hal *ah, int regDmn,
|
||||
found = ath9k_regd_is_valid_reg_domain(regDmn, rd);
|
||||
if (!found) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: Failed to find unitary reg domain %u\n",
|
||||
__func__, regDmn);
|
||||
"Failed to find unitary reg domain %u\n", regDmn);
|
||||
return false;
|
||||
} else {
|
||||
rd->pscan &= regPair->pscanMask;
|
||||
@ -430,30 +426,27 @@ ath9k_regd_add_channel(struct ath_hal *ah,
|
||||
|
||||
if (!(c_lo <= c && c <= c_hi)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: c %u out of range [%u..%u]\n",
|
||||
__func__, c, c_lo, c_hi);
|
||||
"c %u out of range [%u..%u]\n",
|
||||
c, c_lo, c_hi);
|
||||
return false;
|
||||
}
|
||||
if ((fband->channelBW == CHANNEL_HALF_BW) &&
|
||||
!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_HALFRATE)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: Skipping %u half rate channel\n",
|
||||
__func__, c);
|
||||
"Skipping %u half rate channel\n", c);
|
||||
return false;
|
||||
}
|
||||
|
||||
if ((fband->channelBW == CHANNEL_QUARTER_BW) &&
|
||||
!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_QUARTERRATE)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: Skipping %u quarter rate channel\n",
|
||||
__func__, c);
|
||||
"Skipping %u quarter rate channel\n", c);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (((c + fband->channelSep) / 2) > (maxChan + HALF_MAXCHANBW)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: c %u > maxChan %u\n",
|
||||
__func__, c, maxChan);
|
||||
"c %u > maxChan %u\n", c, maxChan);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -463,7 +456,7 @@ ath9k_regd_add_channel(struct ath_hal *ah,
|
||||
return false;
|
||||
}
|
||||
|
||||
if ((rd->flags & NO_HOSTAP) && (ah->ah_opmode == ATH9K_M_HOSTAP)) {
|
||||
if ((rd->flags & NO_HOSTAP) && (ah->ah_opmode == NL80211_IFTYPE_AP)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"Skipping HOSTAP channel\n");
|
||||
return false;
|
||||
@ -606,8 +599,7 @@ static bool ath9k_regd_japan_check(struct ath_hal *ah,
|
||||
}
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: Skipping %d freq band\n",
|
||||
__func__, j_bandcheck[i].freqbandbit);
|
||||
"Skipping %d freq band\n", j_bandcheck[i].freqbandbit);
|
||||
|
||||
return skipband;
|
||||
}
|
||||
@ -632,20 +624,19 @@ ath9k_regd_init_channels(struct ath_hal *ah,
|
||||
unsigned long *modes_avail;
|
||||
DECLARE_BITMAP(modes_allowed, ATH9K_MODE_MAX);
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "%s: cc %u %s %s\n",
|
||||
__func__, cc,
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "cc %u %s %s\n", cc,
|
||||
enableOutdoor ? "Enable outdoor" : "",
|
||||
enableExtendedChannels ? "Enable ecm" : "");
|
||||
|
||||
if (!ath9k_regd_is_ccode_valid(ah, cc)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: invalid country code %d\n", __func__, cc);
|
||||
"Invalid country code %d\n", cc);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!ath9k_regd_is_eeprom_valid(ah)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: invalid EEPROM contents\n", __func__);
|
||||
"Invalid EEPROM contents\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -693,9 +684,9 @@ ath9k_regd_init_channels(struct ath_hal *ah,
|
||||
~CHANNEL_2GHZ,
|
||||
&rd5GHz)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: couldn't find unitary "
|
||||
"Couldn't find unitary "
|
||||
"5GHz reg domain for country %u\n",
|
||||
__func__, ah->ah_countryCode);
|
||||
ah->ah_countryCode);
|
||||
return false;
|
||||
}
|
||||
if (!ath9k_regd_get_wmode_regdomain(ah,
|
||||
@ -703,9 +694,9 @@ ath9k_regd_init_channels(struct ath_hal *ah,
|
||||
CHANNEL_2GHZ,
|
||||
&rd2GHz)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: couldn't find unitary 2GHz "
|
||||
"Couldn't find unitary 2GHz "
|
||||
"reg domain for country %u\n",
|
||||
__func__, ah->ah_countryCode);
|
||||
ah->ah_countryCode);
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -717,9 +708,9 @@ ath9k_regd_init_channels(struct ath_hal *ah,
|
||||
~CHANNEL_2GHZ,
|
||||
&rd5GHz)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: couldn't find unitary 5GHz "
|
||||
"Couldn't find unitary 5GHz "
|
||||
"reg domain for country %u\n",
|
||||
__func__, ah->ah_countryCode);
|
||||
ah->ah_countryCode);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
@ -749,15 +740,14 @@ ath9k_regd_init_channels(struct ath_hal *ah,
|
||||
|
||||
if (!test_bit(cm->mode, modes_avail)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: !avail mode %d flags 0x%x\n",
|
||||
__func__, cm->mode, cm->flags);
|
||||
"!avail mode %d flags 0x%x\n",
|
||||
cm->mode, cm->flags);
|
||||
continue;
|
||||
}
|
||||
if (!ath9k_get_channel_edges(ah, cm->flags, &c_lo, &c_hi)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: channels 0x%x not supported "
|
||||
"by hardware\n",
|
||||
__func__, cm->flags);
|
||||
"channels 0x%x not supported "
|
||||
"by hardware\n", cm->flags);
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -788,8 +778,7 @@ ath9k_regd_init_channels(struct ath_hal *ah,
|
||||
break;
|
||||
default:
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: Unknown HAL mode 0x%x\n", __func__,
|
||||
cm->mode);
|
||||
"Unknown HAL mode 0x%x\n", cm->mode);
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -841,9 +830,8 @@ ath9k_regd_init_channels(struct ath_hal *ah,
|
||||
if (next >= maxchans) {
|
||||
DPRINTF(ah->ah_sc,
|
||||
ATH_DBG_REGULATORY,
|
||||
"%s: too many channels "
|
||||
"for channel table\n",
|
||||
__func__);
|
||||
"too many channels "
|
||||
"for channel table\n");
|
||||
goto done;
|
||||
}
|
||||
if (ath9k_regd_add_channel(ah,
|
||||
@ -869,9 +857,8 @@ done:
|
||||
|
||||
if (next > ARRAY_SIZE(ah->ah_channels)) {
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: too many channels %u; truncating to %u\n",
|
||||
__func__, next,
|
||||
(int) ARRAY_SIZE(ah->ah_channels));
|
||||
"too many channels %u; truncating to %u\n",
|
||||
next, (int) ARRAY_SIZE(ah->ah_channels));
|
||||
next = ARRAY_SIZE(ah->ah_channels);
|
||||
}
|
||||
#ifdef ATH_NF_PER_CHAN
|
||||
@ -919,7 +906,7 @@ ath9k_regd_check_channel(struct ath_hal *ah,
|
||||
int n, lim;
|
||||
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: channel %u/0x%x (0x%x) requested\n", __func__,
|
||||
"channel %u/0x%x (0x%x) requested\n",
|
||||
c->channel, c->channelFlags, flags);
|
||||
|
||||
cc = ah->ah_curchan;
|
||||
@ -950,15 +937,15 @@ ath9k_regd_check_channel(struct ath_hal *ah,
|
||||
d = flags - (cc->channelFlags & CHAN_FLAGS);
|
||||
}
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
|
||||
"%s: channel %u/0x%x d %d\n", __func__,
|
||||
"channel %u/0x%x d %d\n",
|
||||
cc->channel, cc->channelFlags, d);
|
||||
if (d > 0) {
|
||||
base = cc + 1;
|
||||
lim--;
|
||||
}
|
||||
}
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "%s: no match for %u/0x%x\n",
|
||||
__func__, c->channel, c->channelFlags);
|
||||
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, "no match for %u/0x%x\n",
|
||||
c->channel, c->channelFlags);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -125,7 +125,7 @@
|
||||
|
||||
#define CHAN_FLAGS (CHANNEL_ALL|CHANNEL_HALF|CHANNEL_QUARTER)
|
||||
|
||||
#define swap(_a, _b, _size) { \
|
||||
#define swap_array(_a, _b, _size) { \
|
||||
u8 *s = _b; \
|
||||
int i = _size; \
|
||||
do { \
|
||||
|
@ -83,18 +83,16 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
|
||||
txq->axq_linkbuf = list_entry(txq->axq_q.prev, struct ath_buf, list);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_QUEUE,
|
||||
"%s: txq depth = %d\n", __func__, txq->axq_depth);
|
||||
"qnum: %d, txq depth: %d\n", txq->axq_qnum, txq->axq_depth);
|
||||
|
||||
if (txq->axq_link == NULL) {
|
||||
ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
|
||||
DPRINTF(sc, ATH_DBG_XMIT,
|
||||
"%s: TXDP[%u] = %llx (%p)\n",
|
||||
__func__, txq->axq_qnum,
|
||||
ito64(bf->bf_daddr), bf->bf_desc);
|
||||
"TXDP[%u] = %llx (%p)\n",
|
||||
txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc);
|
||||
} else {
|
||||
*txq->axq_link = bf->bf_daddr;
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "%s: link[%u] (%p)=%llx (%p)\n",
|
||||
__func__,
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "link[%u] (%p)=%llx (%p)\n",
|
||||
txq->axq_qnum, txq->axq_link,
|
||||
ito64(bf->bf_daddr), bf->bf_desc);
|
||||
}
|
||||
@ -109,8 +107,7 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
|
||||
struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
|
||||
struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_XMIT,
|
||||
"%s: TX complete: skb: %p\n", __func__, skb);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "TX complete: skb: %p\n", skb);
|
||||
|
||||
if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
|
||||
tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
|
||||
@ -763,7 +760,8 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc,
|
||||
* when perform internal reset in this routine.
|
||||
* Only enable reset in STA mode for now.
|
||||
*/
|
||||
if (sc->sc_ah->ah_opmode == ATH9K_M_STA)
|
||||
if (sc->sc_ah->ah_opmode ==
|
||||
NL80211_IFTYPE_STATION)
|
||||
needreset = 1;
|
||||
}
|
||||
} else {
|
||||
@ -983,8 +981,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
|
||||
int txok, nbad = 0;
|
||||
int status;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_QUEUE,
|
||||
"%s: tx queue %d (%x), link %p\n", __func__,
|
||||
DPRINTF(sc, ATH_DBG_QUEUE, "tx queue %d (%x), link %p\n",
|
||||
txq->axq_qnum, ath9k_hw_gettxbuf(sc->sc_ah, txq->axq_qnum),
|
||||
txq->axq_link);
|
||||
|
||||
@ -1116,9 +1113,9 @@ static void ath_tx_stopdma(struct ath_softc *sc, struct ath_txq *txq)
|
||||
struct ath_hal *ah = sc->sc_ah;
|
||||
|
||||
(void) ath9k_hw_stoptxdma(ah, txq->axq_qnum);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "%s: tx queue [%u] %x, link %p\n",
|
||||
__func__, txq->axq_qnum,
|
||||
ath9k_hw_gettxbuf(ah, txq->axq_qnum), txq->axq_link);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "tx queue [%u] %x, link %p\n",
|
||||
txq->axq_qnum, ath9k_hw_gettxbuf(ah, txq->axq_qnum),
|
||||
txq->axq_link);
|
||||
}
|
||||
|
||||
/* Drain only the data queues */
|
||||
@ -1142,8 +1139,7 @@ static void ath_drain_txdataq(struct ath_softc *sc, bool retry_tx)
|
||||
|
||||
if (npend) {
|
||||
/* TxDMA not stopped, reset the hal */
|
||||
DPRINTF(sc, ATH_DBG_XMIT,
|
||||
"%s: Unable to stop TxDMA. Reset HAL!\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "Unable to stop TxDMA. Reset HAL!\n");
|
||||
|
||||
spin_lock_bh(&sc->sc_resetlock);
|
||||
if (!ath9k_hw_reset(ah,
|
||||
@ -1153,8 +1149,7 @@ static void ath_drain_txdataq(struct ath_softc *sc, bool retry_tx)
|
||||
sc->sc_ht_extprotspacing, true, &status)) {
|
||||
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to reset hardware; hal status %u\n",
|
||||
__func__,
|
||||
"Unable to reset hardware; hal status %u\n",
|
||||
status);
|
||||
}
|
||||
spin_unlock_bh(&sc->sc_resetlock);
|
||||
@ -1194,7 +1189,6 @@ static void ath_tx_addto_baw(struct ath_softc *sc,
|
||||
* Function to send an A-MPDU
|
||||
* NB: must be called with txq lock held
|
||||
*/
|
||||
|
||||
static int ath_tx_send_ampdu(struct ath_softc *sc,
|
||||
struct ath_atx_tid *tid,
|
||||
struct list_head *bf_head,
|
||||
@ -1242,7 +1236,6 @@ static int ath_tx_send_ampdu(struct ath_softc *sc,
|
||||
* looks up the rate
|
||||
* returns aggr limit based on lowest of the rates
|
||||
*/
|
||||
|
||||
static u32 ath_lookup_rate(struct ath_softc *sc,
|
||||
struct ath_buf *bf,
|
||||
struct ath_atx_tid *tid)
|
||||
@ -1310,7 +1303,6 @@ static u32 ath_lookup_rate(struct ath_softc *sc,
|
||||
* meet the minimum required mpdudensity.
|
||||
* caller should make sure that the rate is HT rate .
|
||||
*/
|
||||
|
||||
static int ath_compute_num_delims(struct ath_softc *sc,
|
||||
struct ath_atx_tid *tid,
|
||||
struct ath_buf *bf,
|
||||
@ -1382,7 +1374,6 @@ static int ath_compute_num_delims(struct ath_softc *sc,
|
||||
* For aggregation from software buffer queue.
|
||||
* NB: must be called with txq lock held
|
||||
*/
|
||||
|
||||
static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
|
||||
struct ath_atx_tid *tid,
|
||||
struct list_head *bf_q,
|
||||
@ -1505,7 +1496,6 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
|
||||
* process pending frames possibly doing a-mpdu aggregation
|
||||
* NB: must be called with txq lock held
|
||||
*/
|
||||
|
||||
static void ath_tx_sched_aggr(struct ath_softc *sc,
|
||||
struct ath_txq *txq, struct ath_atx_tid *tid)
|
||||
{
|
||||
@ -1635,7 +1625,6 @@ static void ath_tid_drain(struct ath_softc *sc,
|
||||
* Drain all pending buffers
|
||||
* NB: must be called with txq lock held
|
||||
*/
|
||||
|
||||
static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
|
||||
struct ath_txq *txq)
|
||||
{
|
||||
@ -1653,7 +1642,7 @@ static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
|
||||
}
|
||||
}
|
||||
|
||||
static void ath_tx_setup_buffer(struct ath_softc *sc, struct ath_buf *bf,
|
||||
static int ath_tx_setup_buffer(struct ath_softc *sc, struct ath_buf *bf,
|
||||
struct sk_buff *skb,
|
||||
struct ath_tx_control *txctl)
|
||||
{
|
||||
@ -1663,7 +1652,9 @@ static void ath_tx_setup_buffer(struct ath_softc *sc, struct ath_buf *bf,
|
||||
int hdrlen;
|
||||
__le16 fc;
|
||||
|
||||
tx_info_priv = kzalloc(sizeof(*tx_info_priv), GFP_KERNEL);
|
||||
tx_info_priv = kzalloc(sizeof(*tx_info_priv), GFP_ATOMIC);
|
||||
if (unlikely(!tx_info_priv))
|
||||
return -ENOMEM;
|
||||
tx_info->rate_driver_data[0] = tx_info_priv;
|
||||
hdrlen = ieee80211_get_hdrlen_from_skb(skb);
|
||||
fc = hdr->frame_control;
|
||||
@ -1712,9 +1703,18 @@ static void ath_tx_setup_buffer(struct ath_softc *sc, struct ath_buf *bf,
|
||||
/* DMA setup */
|
||||
|
||||
bf->bf_mpdu = skb;
|
||||
|
||||
bf->bf_dmacontext = pci_map_single(sc->pdev, skb->data,
|
||||
skb->len, PCI_DMA_TODEVICE);
|
||||
if (unlikely(pci_dma_mapping_error(sc->pdev, bf->bf_dmacontext))) {
|
||||
bf->bf_mpdu = NULL;
|
||||
DPRINTF(sc, ATH_DBG_CONFIG,
|
||||
"pci_dma_mapping_error() on TX\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
bf->bf_buf_addr = bf->bf_dmacontext;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* FIXME: tx power */
|
||||
@ -1786,21 +1786,46 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf,
|
||||
spin_unlock_bh(&txctl->txq->axq_lock);
|
||||
}
|
||||
|
||||
/* Upon failure caller should free skb */
|
||||
int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb,
|
||||
struct ath_tx_control *txctl)
|
||||
{
|
||||
struct ath_buf *bf;
|
||||
int r;
|
||||
|
||||
/* Check if a tx buffer is available */
|
||||
|
||||
bf = ath_tx_get_buffer(sc);
|
||||
if (!bf) {
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "%s: TX buffers are full\n",
|
||||
__func__);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "TX buffers are full\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
ath_tx_setup_buffer(sc, bf, skb, txctl);
|
||||
r = ath_tx_setup_buffer(sc, bf, skb, txctl);
|
||||
if (unlikely(r)) {
|
||||
struct ath_txq *txq = txctl->txq;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_FATAL, "TX mem alloc failure\n");
|
||||
|
||||
/* upon ath_tx_processq() this TX queue will be resumed, we
|
||||
* guarantee this will happen by knowing beforehand that
|
||||
* we will at least have to run TX completionon one buffer
|
||||
* on the queue */
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
if (ath_txq_depth(sc, txq->axq_qnum) > 1) {
|
||||
ieee80211_stop_queue(sc->hw,
|
||||
skb_get_queue_mapping(skb));
|
||||
txq->stopped = 1;
|
||||
}
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
|
||||
spin_lock_bh(&sc->sc_txbuflock);
|
||||
list_add_tail(&bf->list, &sc->sc_txbuf);
|
||||
spin_unlock_bh(&sc->sc_txbuflock);
|
||||
|
||||
return r;
|
||||
}
|
||||
|
||||
ath_tx_start_dma(sc, bf, txctl);
|
||||
|
||||
return 0;
|
||||
@ -1820,8 +1845,8 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
|
||||
"tx", nbufs, 1);
|
||||
if (error != 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: failed to allocate tx descriptors: %d\n",
|
||||
__func__, error);
|
||||
"Failed to allocate tx descriptors: %d\n",
|
||||
error);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1830,9 +1855,8 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
|
||||
"beacon", ATH_BCBUF, 1);
|
||||
if (error != 0) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: failed to allocate "
|
||||
"beacon descripotrs: %d\n",
|
||||
__func__, error);
|
||||
"Failed to allocate beacon descriptors: %d\n",
|
||||
error);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1904,8 +1928,8 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
|
||||
}
|
||||
if (qnum >= ARRAY_SIZE(sc->sc_txq)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: hal qnum %u out of range, max %u!\n",
|
||||
__func__, qnum, (unsigned int)ARRAY_SIZE(sc->sc_txq));
|
||||
"qnum %u out of range, max %u!\n",
|
||||
qnum, (unsigned int)ARRAY_SIZE(sc->sc_txq));
|
||||
ath9k_hw_releasetxqueue(ah, qnum);
|
||||
return NULL;
|
||||
}
|
||||
@ -1950,8 +1974,8 @@ int ath_tx_setup(struct ath_softc *sc, int haltype)
|
||||
|
||||
if (haltype >= ARRAY_SIZE(sc->sc_haltype2q)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: HAL AC %u out of range, max %zu!\n",
|
||||
__func__, haltype, ARRAY_SIZE(sc->sc_haltype2q));
|
||||
"HAL AC %u out of range, max %zu!\n",
|
||||
haltype, ARRAY_SIZE(sc->sc_haltype2q));
|
||||
return 0;
|
||||
}
|
||||
txq = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, haltype);
|
||||
@ -1970,8 +1994,7 @@ int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype)
|
||||
case ATH9K_TX_QUEUE_DATA:
|
||||
if (haltype >= ARRAY_SIZE(sc->sc_haltype2q)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: HAL AC %u out of range, max %zu!\n",
|
||||
__func__,
|
||||
"HAL AC %u out of range, max %zu!\n",
|
||||
haltype, ARRAY_SIZE(sc->sc_haltype2q));
|
||||
return -1;
|
||||
}
|
||||
@ -2004,8 +2027,8 @@ struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb)
|
||||
/* Try to avoid running out of descriptors */
|
||||
if (txq->axq_depth >= (ATH_TXBUF - 20)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: TX queue: %d is full, depth: %d\n",
|
||||
__func__, qnum, txq->axq_depth);
|
||||
"TX queue: %d is full, depth: %d\n",
|
||||
qnum, txq->axq_depth);
|
||||
ieee80211_stop_queue(sc->hw, skb_get_queue_mapping(skb));
|
||||
txq->stopped = 1;
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
@ -2047,8 +2070,7 @@ int ath_txq_update(struct ath_softc *sc, int qnum,
|
||||
|
||||
if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) {
|
||||
DPRINTF(sc, ATH_DBG_FATAL,
|
||||
"%s: unable to update hardware queue %u!\n",
|
||||
__func__, qnum);
|
||||
"Unable to update hardware queue %u!\n", qnum);
|
||||
error = -EIO;
|
||||
} else {
|
||||
ath9k_hw_resettxqueue(ah, qnum); /* push to h/w */
|
||||
@ -2167,7 +2189,7 @@ void ath_draintxq(struct ath_softc *sc, bool retry_tx)
|
||||
* we go to INIT state */
|
||||
if (!(sc->sc_flags & SC_OP_INVALID)) {
|
||||
(void) ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "%s: beacon queue %x\n", __func__,
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "beacon queue %x\n",
|
||||
ath9k_hw_gettxbuf(sc->sc_ah, sc->sc_bhalq));
|
||||
}
|
||||
|
||||
@ -2267,8 +2289,6 @@ void ath_tx_aggr_teardown(struct ath_softc *sc, struct ath_node *an, u8 tid)
|
||||
struct list_head bf_head;
|
||||
INIT_LIST_HEAD(&bf_head);
|
||||
|
||||
DPRINTF(sc, ATH_DBG_AGGR, "%s: teardown TX aggregation\n", __func__);
|
||||
|
||||
if (txtid->state & AGGR_CLEANUP) /* cleanup is in progress */
|
||||
return;
|
||||
|
||||
@ -2501,8 +2521,7 @@ void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb)
|
||||
if (hdrlen & 3) {
|
||||
padsize = hdrlen % 4;
|
||||
if (skb_headroom(skb) < padsize) {
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "%s: TX CABQ padding "
|
||||
"failed\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "TX CABQ padding failed\n");
|
||||
dev_kfree_skb_any(skb);
|
||||
return;
|
||||
}
|
||||
@ -2512,12 +2531,10 @@ void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb)
|
||||
|
||||
txctl.txq = sc->sc_cabq;
|
||||
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting CABQ packet, skb: %p\n",
|
||||
__func__,
|
||||
skb);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "transmitting CABQ packet, skb: %p\n", skb);
|
||||
|
||||
if (ath_tx_start(sc, skb, &txctl) != 0) {
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
|
||||
DPRINTF(sc, ATH_DBG_XMIT, "CABQ TX failed\n");
|
||||
goto exit;
|
||||
}
|
||||
|
||||
|
@ -2,6 +2,13 @@ config HOSTAP
|
||||
tristate "IEEE 802.11 for Host AP (Prism2/2.5/3 and WEP/TKIP/CCMP)"
|
||||
depends on WLAN_80211
|
||||
select WIRELESS_EXT
|
||||
select CRYPTO
|
||||
select CRYPTO_ARC4
|
||||
select CRYPTO_ECB
|
||||
select CRYPTO_AES
|
||||
select CRYPTO_MICHAEL_MIC
|
||||
select CRYPTO_ECB
|
||||
select CRC32
|
||||
select LIB80211
|
||||
select LIB80211_CRYPT_WEP
|
||||
select LIB80211_CRYPT_TKIP
|
||||
|
@ -7797,15 +7797,6 @@ static void ipw_handle_data_packet_monitor(struct ipw_priv *priv,
|
||||
memmove(rxb->skb->data + sizeof(struct ipw_rt_hdr),
|
||||
rxb->skb->data + IPW_RX_FRAME_SIZE, len);
|
||||
|
||||
/* Zero the radiotap static buffer ... We only need to zero the bytes NOT
|
||||
* part of our real header, saves a little time.
|
||||
*
|
||||
* No longer necessary since we fill in all our data. Purge before merging
|
||||
* patch officially.
|
||||
* memset(rxb->skb->data + sizeof(struct ipw_rt_hdr), 0,
|
||||
* IEEE80211_RADIOTAP_HDRLEN - sizeof(struct ipw_rt_hdr));
|
||||
*/
|
||||
|
||||
ipw_rt = (struct ipw_rt_hdr *)rxb->skb->data;
|
||||
|
||||
ipw_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
|
||||
@ -8013,15 +8004,6 @@ static void ipw_handle_promiscuous_rx(struct ipw_priv *priv,
|
||||
|
||||
memcpy(ipw_rt->payload, hdr, len);
|
||||
|
||||
/* Zero the radiotap static buffer ... We only need to zero the bytes
|
||||
* NOT part of our real header, saves a little time.
|
||||
*
|
||||
* No longer necessary since we fill in all our data. Purge before
|
||||
* merging patch officially.
|
||||
* memset(rxb->skb->data + sizeof(struct ipw_rt_hdr), 0,
|
||||
* IEEE80211_RADIOTAP_HDRLEN - sizeof(struct ipw_rt_hdr));
|
||||
*/
|
||||
|
||||
ipw_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
|
||||
ipw_rt->rt_hdr.it_pad = 0; /* always good to zero */
|
||||
ipw_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*ipw_rt)); /* total header+data */
|
||||
@ -10409,9 +10391,9 @@ static void ipw_handle_promiscuous_tx(struct ipw_priv *priv,
|
||||
} else
|
||||
len = src->len;
|
||||
|
||||
dst = alloc_skb(
|
||||
len + IEEE80211_RADIOTAP_HDRLEN, GFP_ATOMIC);
|
||||
if (!dst) continue;
|
||||
dst = alloc_skb(len + sizeof(*rt_hdr), GFP_ATOMIC);
|
||||
if (!dst)
|
||||
continue;
|
||||
|
||||
rt_hdr = (void *)skb_put(dst, sizeof(*rt_hdr));
|
||||
|
||||
|
@ -8,7 +8,7 @@ iwlcore-$(CONFIG_IWLWIFI_RFKILL) += iwl-rfkill.o
|
||||
iwlcore-$(CONFIG_IWLAGN_SPECTRUM_MEASUREMENT) += iwl-spectrum.o
|
||||
|
||||
obj-$(CONFIG_IWLAGN) += iwlagn.o
|
||||
iwlagn-objs := iwl-agn.o iwl-agn-rs.o
|
||||
iwlagn-objs := iwl-agn.o iwl-agn-rs.o iwl-agn-hcmd-check.o
|
||||
|
||||
iwlagn-$(CONFIG_IWL4965) += iwl-4965.o
|
||||
iwlagn-$(CONFIG_IWL5000) += iwl-5000.o
|
||||
|
@ -69,6 +69,12 @@
|
||||
#ifndef __iwl_3945_commands_h__
|
||||
#define __iwl_3945_commands_h__
|
||||
|
||||
/* uCode version contains 4 values: Major/Minor/API/Serial */
|
||||
#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
|
||||
#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
|
||||
#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
|
||||
#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
|
||||
|
||||
enum {
|
||||
REPLY_ALIVE = 0x1,
|
||||
REPLY_ERROR = 0x2,
|
||||
@ -220,7 +226,7 @@ struct iwl3945_power_per_rate {
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#define UCODE_VALID_OK __constant_cpu_to_le32(0x1)
|
||||
#define UCODE_VALID_OK cpu_to_le32(0x1)
|
||||
#define INITIALIZE_SUBTYPE (9)
|
||||
|
||||
/*
|
||||
@ -322,42 +328,42 @@ enum {
|
||||
|
||||
/* rx_config flags */
|
||||
/* band & modulation selection */
|
||||
#define RXON_FLG_BAND_24G_MSK __constant_cpu_to_le32(1 << 0)
|
||||
#define RXON_FLG_CCK_MSK __constant_cpu_to_le32(1 << 1)
|
||||
#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
|
||||
#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
|
||||
/* auto detection enable */
|
||||
#define RXON_FLG_AUTO_DETECT_MSK __constant_cpu_to_le32(1 << 2)
|
||||
#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
|
||||
/* TGg protection when tx */
|
||||
#define RXON_FLG_TGG_PROTECT_MSK __constant_cpu_to_le32(1 << 3)
|
||||
#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
|
||||
/* cck short slot & preamble */
|
||||
#define RXON_FLG_SHORT_SLOT_MSK __constant_cpu_to_le32(1 << 4)
|
||||
#define RXON_FLG_SHORT_PREAMBLE_MSK __constant_cpu_to_le32(1 << 5)
|
||||
#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
|
||||
#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
|
||||
/* antenna selection */
|
||||
#define RXON_FLG_DIS_DIV_MSK __constant_cpu_to_le32(1 << 7)
|
||||
#define RXON_FLG_ANT_SEL_MSK __constant_cpu_to_le32(0x0f00)
|
||||
#define RXON_FLG_ANT_A_MSK __constant_cpu_to_le32(1 << 8)
|
||||
#define RXON_FLG_ANT_B_MSK __constant_cpu_to_le32(1 << 9)
|
||||
#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
|
||||
#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
|
||||
#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
|
||||
#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
|
||||
/* radar detection enable */
|
||||
#define RXON_FLG_RADAR_DETECT_MSK __constant_cpu_to_le32(1 << 12)
|
||||
#define RXON_FLG_TGJ_NARROW_BAND_MSK __constant_cpu_to_le32(1 << 13)
|
||||
#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
|
||||
#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
|
||||
/* rx response to host with 8-byte TSF
|
||||
* (according to ON_AIR deassertion) */
|
||||
#define RXON_FLG_TSF2HOST_MSK __constant_cpu_to_le32(1 << 15)
|
||||
#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
|
||||
|
||||
/* rx_config filter flags */
|
||||
/* accept all data frames */
|
||||
#define RXON_FILTER_PROMISC_MSK __constant_cpu_to_le32(1 << 0)
|
||||
#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
|
||||
/* pass control & management to host */
|
||||
#define RXON_FILTER_CTL2HOST_MSK __constant_cpu_to_le32(1 << 1)
|
||||
#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
|
||||
/* accept multi-cast */
|
||||
#define RXON_FILTER_ACCEPT_GRP_MSK __constant_cpu_to_le32(1 << 2)
|
||||
#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
|
||||
/* don't decrypt uni-cast frames */
|
||||
#define RXON_FILTER_DIS_DECRYPT_MSK __constant_cpu_to_le32(1 << 3)
|
||||
#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
|
||||
/* don't decrypt multi-cast frames */
|
||||
#define RXON_FILTER_DIS_GRP_DECRYPT_MSK __constant_cpu_to_le32(1 << 4)
|
||||
#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
|
||||
/* STA is associated */
|
||||
#define RXON_FILTER_ASSOC_MSK __constant_cpu_to_le32(1 << 5)
|
||||
#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
|
||||
/* transfer to host non bssid beacons in associated state */
|
||||
#define RXON_FILTER_BCON_AWARE_MSK __constant_cpu_to_le32(1 << 6)
|
||||
#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
|
||||
|
||||
/**
|
||||
* REPLY_RXON = 0x10 (command, has simple generic response)
|
||||
@ -471,9 +477,9 @@ struct iwl3945_ac_qos {
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* QoS flags defines */
|
||||
#define QOS_PARAM_FLG_UPDATE_EDCA_MSK __constant_cpu_to_le32(0x01)
|
||||
#define QOS_PARAM_FLG_TGN_MSK __constant_cpu_to_le32(0x02)
|
||||
#define QOS_PARAM_FLG_TXOP_TYPE_MSK __constant_cpu_to_le32(0x10)
|
||||
#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
|
||||
#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
|
||||
#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
|
||||
|
||||
/* Number of Access Categories (AC) (EDCA), queues 0..3 */
|
||||
#define AC_NUM 4
|
||||
@ -508,27 +514,27 @@ struct iwl3945_qosparam_cmd {
|
||||
#define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/
|
||||
#define IWL_INVALID_STATION 255
|
||||
|
||||
#define STA_FLG_TX_RATE_MSK __constant_cpu_to_le32(1 << 2);
|
||||
#define STA_FLG_PWR_SAVE_MSK __constant_cpu_to_le32(1 << 8);
|
||||
#define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2);
|
||||
#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8);
|
||||
|
||||
/* Use in mode field. 1: modify existing entry, 0: add new station entry */
|
||||
#define STA_CONTROL_MODIFY_MSK 0x01
|
||||
|
||||
/* key flags __le16*/
|
||||
#define STA_KEY_FLG_ENCRYPT_MSK __constant_cpu_to_le16(0x0007)
|
||||
#define STA_KEY_FLG_NO_ENC __constant_cpu_to_le16(0x0000)
|
||||
#define STA_KEY_FLG_WEP __constant_cpu_to_le16(0x0001)
|
||||
#define STA_KEY_FLG_CCMP __constant_cpu_to_le16(0x0002)
|
||||
#define STA_KEY_FLG_TKIP __constant_cpu_to_le16(0x0003)
|
||||
#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
|
||||
#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
|
||||
#define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
|
||||
#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
|
||||
#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
|
||||
|
||||
#define STA_KEY_FLG_KEYID_POS 8
|
||||
#define STA_KEY_FLG_INVALID __constant_cpu_to_le16(0x0800)
|
||||
#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
|
||||
/* wep key is either from global key (0) or from station info array (1) */
|
||||
#define STA_KEY_FLG_WEP_KEY_MAP_MSK __constant_cpu_to_le16(0x0008)
|
||||
#define STA_KEY_FLG_WEP_KEY_MAP_MSK cpu_to_le16(0x0008)
|
||||
|
||||
/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
|
||||
#define STA_KEY_FLG_KEY_SIZE_MSK __constant_cpu_to_le16(0x1000)
|
||||
#define STA_KEY_MULTICAST_MSK __constant_cpu_to_le16(0x4000)
|
||||
#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
|
||||
#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
|
||||
|
||||
/* Flags indicate whether to modify vs. don't change various station params */
|
||||
#define STA_MODIFY_KEY_MASK 0x01
|
||||
@ -666,14 +672,14 @@ struct iwl3945_rx_frame_hdr {
|
||||
u8 payload[0];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define RX_RES_STATUS_NO_CRC32_ERROR __constant_cpu_to_le32(1 << 0)
|
||||
#define RX_RES_STATUS_NO_RXE_OVERFLOW __constant_cpu_to_le32(1 << 1)
|
||||
#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
|
||||
#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
|
||||
|
||||
#define RX_RES_PHY_FLAGS_BAND_24_MSK __constant_cpu_to_le16(1 << 0)
|
||||
#define RX_RES_PHY_FLAGS_MOD_CCK_MSK __constant_cpu_to_le16(1 << 1)
|
||||
#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK __constant_cpu_to_le16(1 << 2)
|
||||
#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK __constant_cpu_to_le16(1 << 3)
|
||||
#define RX_RES_PHY_FLAGS_ANTENNA_MSK __constant_cpu_to_le16(0xf0)
|
||||
#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
|
||||
#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
|
||||
#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
|
||||
#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
|
||||
#define RX_RES_PHY_FLAGS_ANTENNA_MSK cpu_to_le16(0xf0)
|
||||
|
||||
#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
|
||||
#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
|
||||
@ -733,57 +739,57 @@ struct iwl3945_rx_frame {
|
||||
|
||||
/* 1: Use Request-To-Send protocol before this frame.
|
||||
* Mutually exclusive vs. TX_CMD_FLG_CTS_MSK. */
|
||||
#define TX_CMD_FLG_RTS_MSK __constant_cpu_to_le32(1 << 1)
|
||||
#define TX_CMD_FLG_RTS_MSK cpu_to_le32(1 << 1)
|
||||
|
||||
/* 1: Transmit Clear-To-Send to self before this frame.
|
||||
* Driver should set this for AUTH/DEAUTH/ASSOC-REQ/REASSOC mgmnt frames.
|
||||
* Mutually exclusive vs. TX_CMD_FLG_RTS_MSK. */
|
||||
#define TX_CMD_FLG_CTS_MSK __constant_cpu_to_le32(1 << 2)
|
||||
#define TX_CMD_FLG_CTS_MSK cpu_to_le32(1 << 2)
|
||||
|
||||
/* 1: Expect ACK from receiving station
|
||||
* 0: Don't expect ACK (MAC header's duration field s/b 0)
|
||||
* Set this for unicast frames, but not broadcast/multicast. */
|
||||
#define TX_CMD_FLG_ACK_MSK __constant_cpu_to_le32(1 << 3)
|
||||
#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
|
||||
|
||||
/* 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
|
||||
* Tx command's initial_rate_index indicates first rate to try;
|
||||
* uCode walks through table for additional Tx attempts.
|
||||
* 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
|
||||
* This rate will be used for all Tx attempts; it will not be scaled. */
|
||||
#define TX_CMD_FLG_STA_RATE_MSK __constant_cpu_to_le32(1 << 4)
|
||||
#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
|
||||
|
||||
/* 1: Expect immediate block-ack.
|
||||
* Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
|
||||
#define TX_CMD_FLG_IMM_BA_RSP_MASK __constant_cpu_to_le32(1 << 6)
|
||||
#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
|
||||
|
||||
/* 1: Frame requires full Tx-Op protection.
|
||||
* Set this if either RTS or CTS Tx Flag gets set. */
|
||||
#define TX_CMD_FLG_FULL_TXOP_PROT_MSK __constant_cpu_to_le32(1 << 7)
|
||||
#define TX_CMD_FLG_FULL_TXOP_PROT_MSK cpu_to_le32(1 << 7)
|
||||
|
||||
/* Tx antenna selection field; used only for 3945, reserved (0) for 4965.
|
||||
* Set field to "0" to allow 3945 uCode to select antenna (normal usage). */
|
||||
#define TX_CMD_FLG_ANT_SEL_MSK __constant_cpu_to_le32(0xf00)
|
||||
#define TX_CMD_FLG_ANT_A_MSK __constant_cpu_to_le32(1 << 8)
|
||||
#define TX_CMD_FLG_ANT_B_MSK __constant_cpu_to_le32(1 << 9)
|
||||
#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
|
||||
#define TX_CMD_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
|
||||
#define TX_CMD_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
|
||||
|
||||
/* 1: Ignore Bluetooth priority for this frame.
|
||||
* 0: Delay Tx until Bluetooth device is done (normal usage). */
|
||||
#define TX_CMD_FLG_BT_DIS_MSK __constant_cpu_to_le32(1 << 12)
|
||||
#define TX_CMD_FLG_BT_DIS_MSK cpu_to_le32(1 << 12)
|
||||
|
||||
/* 1: uCode overrides sequence control field in MAC header.
|
||||
* 0: Driver provides sequence control field in MAC header.
|
||||
* Set this for management frames, non-QOS data frames, non-unicast frames,
|
||||
* and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
|
||||
#define TX_CMD_FLG_SEQ_CTL_MSK __constant_cpu_to_le32(1 << 13)
|
||||
#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
|
||||
|
||||
/* 1: This frame is non-last MPDU; more fragments are coming.
|
||||
* 0: Last fragment, or not using fragmentation. */
|
||||
#define TX_CMD_FLG_MORE_FRAG_MSK __constant_cpu_to_le32(1 << 14)
|
||||
#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
|
||||
|
||||
/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
|
||||
* 0: No TSF required in outgoing frame.
|
||||
* Set this for transmitting beacons and probe responses. */
|
||||
#define TX_CMD_FLG_TSF_MSK __constant_cpu_to_le32(1 << 16)
|
||||
#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
|
||||
|
||||
/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
|
||||
* alignment of frame's payload data field.
|
||||
@ -791,10 +797,10 @@ struct iwl3945_rx_frame {
|
||||
* Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
|
||||
* field (but not both). Driver must align frame data (i.e. data following
|
||||
* MAC header) to DWORD boundary. */
|
||||
#define TX_CMD_FLG_MH_PAD_MSK __constant_cpu_to_le32(1 << 20)
|
||||
#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
|
||||
|
||||
/* HCCA-AP - disable duration overwriting. */
|
||||
#define TX_CMD_FLG_DUR_MSK __constant_cpu_to_le32(1 << 25)
|
||||
#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
|
||||
|
||||
/*
|
||||
* TX command security control
|
||||
@ -1158,9 +1164,9 @@ struct iwl3945_spectrum_notification {
|
||||
*/
|
||||
#define IWL_POWER_VEC_SIZE 5
|
||||
|
||||
#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK __constant_cpu_to_le32(1 << 0)
|
||||
#define IWL_POWER_SLEEP_OVER_DTIM_MSK __constant_cpu_to_le32(1 << 2)
|
||||
#define IWL_POWER_PCI_PM_MSK __constant_cpu_to_le32(1 << 3)
|
||||
#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le32(1 << 0)
|
||||
#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le32(1 << 2)
|
||||
#define IWL_POWER_PCI_PM_MSK cpu_to_le32(1 << 3)
|
||||
struct iwl3945_powertable_cmd {
|
||||
__le32 flags;
|
||||
__le32 rx_data_timeout;
|
||||
@ -1278,8 +1284,8 @@ struct iwl3945_ssid_ie {
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define PROBE_OPTION_MAX 0x4
|
||||
#define TX_CMD_LIFE_TIME_INFINITE __constant_cpu_to_le32(0xFFFFFFFF)
|
||||
#define IWL_GOOD_CRC_TH __constant_cpu_to_le16(1)
|
||||
#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
|
||||
#define IWL_GOOD_CRC_TH cpu_to_le16(1)
|
||||
#define IWL_MAX_SCAN_SIZE 1024
|
||||
|
||||
/*
|
||||
@ -1379,7 +1385,7 @@ struct iwl3945_scan_cmd {
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* Can abort will notify by complete notification with abort status. */
|
||||
#define CAN_ABORT_STATUS __constant_cpu_to_le32(0x1)
|
||||
#define CAN_ABORT_STATUS cpu_to_le32(0x1)
|
||||
/* complete notification statuses */
|
||||
#define ABORT_STATUS 0x2
|
||||
|
||||
@ -1572,8 +1578,8 @@ struct statistics_general {
|
||||
* STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
|
||||
* does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
|
||||
*/
|
||||
#define IWL_STATS_CONF_CLEAR_STATS __constant_cpu_to_le32(0x1) /* see above */
|
||||
#define IWL_STATS_CONF_DISABLE_NOTIF __constant_cpu_to_le32(0x2)/* see above */
|
||||
#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
|
||||
#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
|
||||
struct iwl3945_statistics_cmd {
|
||||
__le32 configuration_flags; /* IWL_STATS_CONF_* */
|
||||
} __attribute__ ((packed));
|
||||
@ -1593,8 +1599,8 @@ struct iwl3945_statistics_cmd {
|
||||
* appropriately so that each notification contains statistics for only the
|
||||
* one channel that has just been scanned.
|
||||
*/
|
||||
#define STATISTICS_REPLY_FLG_BAND_24G_MSK __constant_cpu_to_le32(0x2)
|
||||
#define STATISTICS_REPLY_FLG_FAT_MODE_MSK __constant_cpu_to_le32(0x8)
|
||||
#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
|
||||
#define STATISTICS_REPLY_FLG_FAT_MODE_MSK cpu_to_le32(0x8)
|
||||
struct iwl3945_notif_statistics {
|
||||
__le32 flag;
|
||||
struct statistics_rx rx;
|
||||
|
@ -71,9 +71,33 @@
|
||||
#define IWL_SKU_G 0x1
|
||||
#define IWL_SKU_A 0x2
|
||||
|
||||
/**
|
||||
* struct iwl_3945_cfg
|
||||
* @fw_name_pre: Firmware filename prefix. The api version and extension
|
||||
* (.ucode) will be added to filename before loading from disk. The
|
||||
* filename is constructed as fw_name_pre<api>.ucode.
|
||||
* @ucode_api_max: Highest version of uCode API supported by driver.
|
||||
* @ucode_api_min: Lowest version of uCode API supported by driver.
|
||||
*
|
||||
* We enable the driver to be backward compatible wrt API version. The
|
||||
* driver specifies which APIs it supports (with @ucode_api_max being the
|
||||
* highest and @ucode_api_min the lowest). Firmware will only be loaded if
|
||||
* it has a supported API version. The firmware's API version will be
|
||||
* stored in @iwl_priv, enabling the driver to make runtime changes based
|
||||
* on firmware version used.
|
||||
*
|
||||
* For example,
|
||||
* if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
|
||||
* Driver interacts with Firmware API version >= 2.
|
||||
* } else {
|
||||
* Driver interacts with Firmware API version 1.
|
||||
* }
|
||||
*/
|
||||
struct iwl_3945_cfg {
|
||||
const char *name;
|
||||
const char *fw_name;
|
||||
const char *fw_name_pre;
|
||||
const unsigned int ucode_api_max;
|
||||
const unsigned int ucode_api_min;
|
||||
unsigned int sku;
|
||||
};
|
||||
|
||||
|
@ -63,6 +63,9 @@ struct iwl3945_rs_sta {
|
||||
u8 ibss_sta_added;
|
||||
struct timer_list rate_scale_flush;
|
||||
struct iwl3945_rate_scale_data win[IWL_RATE_COUNT];
|
||||
#ifdef CONFIG_MAC80211_DEBUGFS
|
||||
struct dentry *rs_sta_dbgfs_stats_table_file;
|
||||
#endif
|
||||
|
||||
/* used to be in sta_info */
|
||||
int last_txrate_idx;
|
||||
@ -114,9 +117,11 @@ static struct iwl3945_tpt_entry iwl3945_tpt_table_g[] = {
|
||||
};
|
||||
|
||||
#define IWL_RATE_MAX_WINDOW 62
|
||||
#define IWL_RATE_FLUSH (3*HZ/10)
|
||||
#define IWL_RATE_FLUSH (3*HZ)
|
||||
#define IWL_RATE_WIN_FLUSH (HZ/2)
|
||||
#define IWL_RATE_HIGH_TH 11520
|
||||
#define IWL_SUCCESS_UP_TH 8960
|
||||
#define IWL_SUCCESS_DOWN_TH 10880
|
||||
#define IWL_RATE_MIN_FAILURE_TH 8
|
||||
#define IWL_RATE_MIN_SUCCESS_TH 8
|
||||
#define IWL_RATE_DECREASE_TH 1920
|
||||
@ -203,6 +208,7 @@ static int iwl3945_rate_scale_flush_windows(struct iwl3945_rs_sta *rs_sta)
|
||||
|
||||
#define IWL_RATE_FLUSH_MAX 5000 /* msec */
|
||||
#define IWL_RATE_FLUSH_MIN 50 /* msec */
|
||||
#define IWL_AVERAGE_PACKETS 1500
|
||||
|
||||
static void iwl3945_bg_rate_scale_flush(unsigned long data)
|
||||
{
|
||||
@ -217,8 +223,6 @@ static void iwl3945_bg_rate_scale_flush(unsigned long data)
|
||||
|
||||
spin_lock_irqsave(&rs_sta->lock, flags);
|
||||
|
||||
rs_sta->flush_pending = 0;
|
||||
|
||||
/* Number of packets Rx'd since last time this timer ran */
|
||||
packet_count = (rs_sta->tx_packets - rs_sta->last_tx_packets) + 1;
|
||||
|
||||
@ -227,7 +231,6 @@ static void iwl3945_bg_rate_scale_flush(unsigned long data)
|
||||
if (unflushed) {
|
||||
duration =
|
||||
jiffies_to_msecs(jiffies - rs_sta->last_partial_flush);
|
||||
/* duration = jiffies_to_msecs(rs_sta->flush_time); */
|
||||
|
||||
IWL_DEBUG_RATE("Tx'd %d packets in %dms\n",
|
||||
packet_count, duration);
|
||||
@ -239,9 +242,11 @@ static void iwl3945_bg_rate_scale_flush(unsigned long data)
|
||||
pps = 0;
|
||||
|
||||
if (pps) {
|
||||
duration = IWL_RATE_FLUSH_MAX / pps;
|
||||
duration = (IWL_AVERAGE_PACKETS * 1000) / pps;
|
||||
if (duration < IWL_RATE_FLUSH_MIN)
|
||||
duration = IWL_RATE_FLUSH_MIN;
|
||||
else if (duration > IWL_RATE_FLUSH_MAX)
|
||||
duration = IWL_RATE_FLUSH_MAX;
|
||||
} else
|
||||
duration = IWL_RATE_FLUSH_MAX;
|
||||
|
||||
@ -254,8 +259,10 @@ static void iwl3945_bg_rate_scale_flush(unsigned long data)
|
||||
rs_sta->flush_time);
|
||||
|
||||
rs_sta->last_partial_flush = jiffies;
|
||||
} else {
|
||||
rs_sta->flush_time = IWL_RATE_FLUSH;
|
||||
rs_sta->flush_pending = 0;
|
||||
}
|
||||
|
||||
/* If there weren't any unflushed entries, we don't schedule the timer
|
||||
* to run again */
|
||||
|
||||
@ -275,17 +282,18 @@ static void iwl3945_bg_rate_scale_flush(unsigned long data)
|
||||
*/
|
||||
static void iwl3945_collect_tx_data(struct iwl3945_rs_sta *rs_sta,
|
||||
struct iwl3945_rate_scale_data *window,
|
||||
int success, int retries)
|
||||
int success, int retries, int index)
|
||||
{
|
||||
unsigned long flags;
|
||||
s32 fail_count;
|
||||
|
||||
if (!retries) {
|
||||
IWL_DEBUG_RATE("leave: retries == 0 -- should be at least 1\n");
|
||||
return;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&rs_sta->lock, flags);
|
||||
while (retries--) {
|
||||
spin_lock_irqsave(&rs_sta->lock, flags);
|
||||
|
||||
/* If we have filled up the window then subtract one from the
|
||||
* success counter if the high-bit is counting toward
|
||||
@ -313,8 +321,18 @@ static void iwl3945_collect_tx_data(struct iwl3945_rs_sta *rs_sta,
|
||||
/* Tag this window as having been updated */
|
||||
window->stamp = jiffies;
|
||||
|
||||
spin_unlock_irqrestore(&rs_sta->lock, flags);
|
||||
}
|
||||
|
||||
fail_count = window->counter - window->success_counter;
|
||||
if ((fail_count >= IWL_RATE_MIN_FAILURE_TH) ||
|
||||
(window->success_counter >= IWL_RATE_MIN_SUCCESS_TH))
|
||||
window->average_tpt = ((window->success_ratio *
|
||||
rs_sta->expected_tpt[index] + 64) / 128);
|
||||
else
|
||||
window->average_tpt = IWL_INV_TPT;
|
||||
|
||||
spin_unlock_irqrestore(&rs_sta->lock, flags);
|
||||
|
||||
}
|
||||
|
||||
static void rs_rate_init(void *priv, struct ieee80211_supported_band *sband,
|
||||
@ -426,19 +444,16 @@ static void rs_tx_status(void *priv_rate, struct ieee80211_supported_band *sband
|
||||
struct ieee80211_sta *sta, void *priv_sta,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
u8 retries = 0, current_count;
|
||||
s8 retries = 0, current_count;
|
||||
int scale_rate_index, first_index, last_index;
|
||||
unsigned long flags;
|
||||
struct iwl3945_priv *priv = (struct iwl3945_priv *)priv_rate;
|
||||
struct iwl3945_rs_sta *rs_sta = priv_sta;
|
||||
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
||||
int i;
|
||||
|
||||
IWL_DEBUG_RATE("enter\n");
|
||||
|
||||
for (i = 0; i < IEEE80211_TX_MAX_RATES; i++)
|
||||
retries += info->status.rates[i].count;
|
||||
retries--;
|
||||
retries = info->status.rates[0].count;
|
||||
|
||||
first_index = sband->bitrates[info->status.rates[0].idx].hw_value;
|
||||
if ((first_index < 0) || (first_index >= IWL_RATE_COUNT)) {
|
||||
@ -466,9 +481,9 @@ static void rs_tx_status(void *priv_rate, struct ieee80211_supported_band *sband
|
||||
* at which the frame was finally transmitted (or failed if no
|
||||
* ACK)
|
||||
*/
|
||||
while (retries > 0) {
|
||||
if (retries < priv->retry_rate) {
|
||||
current_count = retries;
|
||||
while (retries > 1) {
|
||||
if ((retries - 1) < priv->retry_rate) {
|
||||
current_count = (retries - 1);
|
||||
last_index = scale_rate_index;
|
||||
} else {
|
||||
current_count = priv->retry_rate;
|
||||
@ -480,15 +495,13 @@ static void rs_tx_status(void *priv_rate, struct ieee80211_supported_band *sband
|
||||
* as was used for it (per current_count) */
|
||||
iwl3945_collect_tx_data(rs_sta,
|
||||
&rs_sta->win[scale_rate_index],
|
||||
0, current_count);
|
||||
0, current_count, scale_rate_index);
|
||||
IWL_DEBUG_RATE("Update rate %d for %d retries.\n",
|
||||
scale_rate_index, current_count);
|
||||
|
||||
retries -= current_count;
|
||||
|
||||
if (retries)
|
||||
scale_rate_index =
|
||||
iwl3945_rs_next_rate(priv, scale_rate_index);
|
||||
scale_rate_index = last_index;
|
||||
}
|
||||
|
||||
|
||||
@ -499,7 +512,7 @@ static void rs_tx_status(void *priv_rate, struct ieee80211_supported_band *sband
|
||||
"success" : "failure");
|
||||
iwl3945_collect_tx_data(rs_sta,
|
||||
&rs_sta->win[last_index],
|
||||
info->flags & IEEE80211_TX_STAT_ACK, 1);
|
||||
info->flags & IEEE80211_TX_STAT_ACK, 1, last_index);
|
||||
|
||||
/* We updated the rate scale window -- if its been more than
|
||||
* flush_time since the last run, schedule the flush
|
||||
@ -507,9 +520,10 @@ static void rs_tx_status(void *priv_rate, struct ieee80211_supported_band *sband
|
||||
spin_lock_irqsave(&rs_sta->lock, flags);
|
||||
|
||||
if (!rs_sta->flush_pending &&
|
||||
time_after(jiffies, rs_sta->last_partial_flush +
|
||||
time_after(jiffies, rs_sta->last_flush +
|
||||
rs_sta->flush_time)) {
|
||||
|
||||
rs_sta->last_partial_flush = jiffies;
|
||||
rs_sta->flush_pending = 1;
|
||||
mod_timer(&rs_sta->rate_scale_flush,
|
||||
jiffies + rs_sta->flush_time);
|
||||
@ -657,8 +671,13 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
|
||||
|
||||
spin_lock_irqsave(&rs_sta->lock, flags);
|
||||
|
||||
/* for recent assoc, choose best rate regarding
|
||||
* to rssi value
|
||||
*/
|
||||
if (rs_sta->start_rate != IWL_RATE_INVALID) {
|
||||
index = rs_sta->start_rate;
|
||||
if (rs_sta->start_rate < index &&
|
||||
(rate_mask & (1 << rs_sta->start_rate)))
|
||||
index = rs_sta->start_rate;
|
||||
rs_sta->start_rate = IWL_RATE_INVALID;
|
||||
}
|
||||
|
||||
@ -668,7 +687,6 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
|
||||
|
||||
if (((fail_count <= IWL_RATE_MIN_FAILURE_TH) &&
|
||||
(window->success_counter < IWL_RATE_MIN_SUCCESS_TH))) {
|
||||
window->average_tpt = IWL_INV_TPT;
|
||||
spin_unlock_irqrestore(&rs_sta->lock, flags);
|
||||
|
||||
IWL_DEBUG_RATE("Invalid average_tpt on rate %d: "
|
||||
@ -682,8 +700,6 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
|
||||
|
||||
}
|
||||
|
||||
window->average_tpt = ((window->success_ratio *
|
||||
rs_sta->expected_tpt[index] + 64) / 128);
|
||||
current_tpt = window->average_tpt;
|
||||
|
||||
high_low = iwl3945_get_adjacent_rate(rs_sta, index, rate_mask,
|
||||
@ -731,13 +747,15 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
|
||||
}
|
||||
}
|
||||
|
||||
if ((window->success_ratio > IWL_RATE_HIGH_TH) ||
|
||||
(current_tpt > window->average_tpt)) {
|
||||
IWL_DEBUG_RATE("No action -- success_ratio [%d] > HIGH_TH or "
|
||||
"current_tpt [%d] > average_tpt [%d]\n",
|
||||
window->success_ratio,
|
||||
current_tpt, window->average_tpt);
|
||||
scale_action = 0;
|
||||
if (scale_action == -1) {
|
||||
if (window->success_ratio > IWL_SUCCESS_DOWN_TH)
|
||||
scale_action = 0;
|
||||
} else if (scale_action == 1) {
|
||||
if (window->success_ratio < IWL_SUCCESS_UP_TH) {
|
||||
IWL_DEBUG_RATE("No action -- success_ratio [%d] < "
|
||||
"SUCCESS UP\n", window->success_ratio);
|
||||
scale_action = 0;
|
||||
}
|
||||
}
|
||||
|
||||
switch (scale_action) {
|
||||
@ -772,6 +790,60 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
|
||||
IWL_DEBUG_RATE("leave: %d\n", index);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MAC80211_DEBUGFS
|
||||
static int iwl3945_open_file_generic(struct inode *inode, struct file *file)
|
||||
{
|
||||
file->private_data = inode->i_private;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static ssize_t iwl3945_sta_dbgfs_stats_table_read(struct file *file,
|
||||
char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
char buff[1024];
|
||||
int desc = 0;
|
||||
int j;
|
||||
struct iwl3945_rs_sta *lq_sta = file->private_data;
|
||||
|
||||
desc += sprintf(buff + desc, "tx packets=%d last rate index=%d\n"
|
||||
"rate=0x%X flush time %d\n",
|
||||
lq_sta->tx_packets,
|
||||
lq_sta->last_txrate_idx,
|
||||
lq_sta->start_rate, jiffies_to_msecs(lq_sta->flush_time));
|
||||
for (j = 0; j < IWL_RATE_COUNT; j++) {
|
||||
desc += sprintf(buff+desc,
|
||||
"counter=%d success=%d %%=%d\n",
|
||||
lq_sta->win[j].counter,
|
||||
lq_sta->win[j].success_counter,
|
||||
lq_sta->win[j].success_ratio);
|
||||
}
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buff, desc);
|
||||
}
|
||||
|
||||
static const struct file_operations rs_sta_dbgfs_stats_table_ops = {
|
||||
.read = iwl3945_sta_dbgfs_stats_table_read,
|
||||
.open = iwl3945_open_file_generic,
|
||||
};
|
||||
|
||||
static void iwl3945_add_debugfs(void *priv, void *priv_sta,
|
||||
struct dentry *dir)
|
||||
{
|
||||
struct iwl3945_rs_sta *lq_sta = priv_sta;
|
||||
|
||||
lq_sta->rs_sta_dbgfs_stats_table_file =
|
||||
debugfs_create_file("rate_stats_table", 0600, dir,
|
||||
lq_sta, &rs_sta_dbgfs_stats_table_ops);
|
||||
|
||||
}
|
||||
|
||||
static void iwl3945_remove_debugfs(void *priv, void *priv_sta)
|
||||
{
|
||||
struct iwl3945_rs_sta *lq_sta = priv_sta;
|
||||
debugfs_remove(lq_sta->rs_sta_dbgfs_stats_table_file);
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct rate_control_ops rs_ops = {
|
||||
.module = NULL,
|
||||
.name = RS_NAME,
|
||||
@ -782,6 +854,11 @@ static struct rate_control_ops rs_ops = {
|
||||
.free = rs_free,
|
||||
.alloc_sta = rs_alloc_sta,
|
||||
.free_sta = rs_free_sta,
|
||||
#ifdef CONFIG_MAC80211_DEBUGFS
|
||||
.add_sta_debugfs = iwl3945_add_debugfs,
|
||||
.remove_sta_debugfs = iwl3945_remove_debugfs,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id)
|
||||
|
@ -337,7 +337,7 @@ static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
|
||||
struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
|
||||
u32 status = le32_to_cpu(tx_resp->status);
|
||||
int rate_idx;
|
||||
int fail, i;
|
||||
int fail;
|
||||
|
||||
if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
|
||||
IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
|
||||
@ -356,27 +356,9 @@ static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
|
||||
rate_idx -= IWL_FIRST_OFDM_RATE;
|
||||
|
||||
fail = tx_resp->failure_frame;
|
||||
for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
|
||||
int next = iwl3945_rs_next_rate(priv, rate_idx);
|
||||
|
||||
info->status.rates[i].idx = rate_idx;
|
||||
|
||||
/*
|
||||
* Put remaining into the last count as best approximation
|
||||
* of saying exactly what the hardware would have done...
|
||||
*/
|
||||
if ((rate_idx == next) || (i == IEEE80211_TX_MAX_RATES - 1)) {
|
||||
info->status.rates[i].count = fail;
|
||||
break;
|
||||
}
|
||||
|
||||
info->status.rates[i].count = priv->retry_rate;
|
||||
fail -= priv->retry_rate;
|
||||
rate_idx = next;
|
||||
if (fail <= 0)
|
||||
break;
|
||||
}
|
||||
info->status.rates[i].count++; /* add final attempt */
|
||||
info->status.rates[0].idx = rate_idx;
|
||||
info->status.rates[0].count = fail + 1; /* add final attempt */
|
||||
|
||||
/* tx_status->rts_retry_count = tx_resp->failure_rts; */
|
||||
info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
|
||||
@ -809,12 +791,19 @@ int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *
|
||||
|
||||
u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
|
||||
{
|
||||
int i;
|
||||
int i, start = IWL_AP_ID;
|
||||
int ret = IWL_INVALID_STATION;
|
||||
unsigned long flags;
|
||||
|
||||
if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) ||
|
||||
(priv->iw_mode == NL80211_IFTYPE_AP))
|
||||
start = IWL_STA_ID;
|
||||
|
||||
if (is_broadcast_ether_addr(addr))
|
||||
return priv->hw_setting.bcast_sta_id;
|
||||
|
||||
spin_lock_irqsave(&priv->sta_lock, flags);
|
||||
for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
|
||||
for (i = start; i < priv->hw_setting.max_stations; i++)
|
||||
if ((priv->stations[i].used) &&
|
||||
(!compare_ether_addr
|
||||
(priv->stations[i].sta.sta.addr, addr))) {
|
||||
@ -2519,13 +2508,17 @@ void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
|
||||
|
||||
static struct iwl_3945_cfg iwl3945_bg_cfg = {
|
||||
.name = "3945BG",
|
||||
.fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
|
||||
.fw_name_pre = IWL3945_FW_PRE,
|
||||
.ucode_api_max = IWL3945_UCODE_API_MAX,
|
||||
.ucode_api_min = IWL3945_UCODE_API_MIN,
|
||||
.sku = IWL_SKU_G,
|
||||
};
|
||||
|
||||
static struct iwl_3945_cfg iwl3945_abg_cfg = {
|
||||
.name = "3945ABG",
|
||||
.fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
|
||||
.fw_name_pre = IWL3945_FW_PRE,
|
||||
.ucode_api_max = IWL3945_UCODE_API_MAX,
|
||||
.ucode_api_min = IWL3945_UCODE_API_MIN,
|
||||
.sku = IWL_SKU_A|IWL_SKU_G,
|
||||
};
|
||||
|
||||
|
@ -50,11 +50,15 @@ extern struct pci_device_id iwl3945_hw_card_ids[];
|
||||
#include "iwl-3945-debug.h"
|
||||
#include "iwl-3945-led.h"
|
||||
|
||||
/* Change firmware file name, using "-" and incrementing number,
|
||||
* *only* when uCode interface or architecture changes so that it
|
||||
* is not compatible with earlier drivers.
|
||||
* This number will also appear in << 8 position of 1st dword of uCode file */
|
||||
#define IWL3945_UCODE_API "-1"
|
||||
/* Highest firmware API version supported */
|
||||
#define IWL3945_UCODE_API_MAX 2
|
||||
|
||||
/* Lowest firmware API version supported */
|
||||
#define IWL3945_UCODE_API_MIN 1
|
||||
|
||||
#define IWL3945_FW_PRE "iwlwifi-3945-"
|
||||
#define _IWL3945_MODULE_FIRMWARE(api) IWL3945_FW_PRE #api ".ucode"
|
||||
#define IWL3945_MODULE_FIRMWARE(api) _IWL3945_MODULE_FIRMWARE(api)
|
||||
|
||||
/* Default noise level to report when noise measurement is not available.
|
||||
* This may be because we're:
|
||||
@ -505,7 +509,7 @@ struct fw_desc {
|
||||
|
||||
/* uCode file layout */
|
||||
struct iwl3945_ucode {
|
||||
__le32 ver; /* major/minor/subminor */
|
||||
__le32 ver; /* major/minor/API/serial */
|
||||
__le32 inst_size; /* bytes of runtime instructions */
|
||||
__le32 data_size; /* bytes of runtime data */
|
||||
__le32 init_size; /* bytes of initialization instructions */
|
||||
@ -762,6 +766,8 @@ struct iwl3945_priv {
|
||||
void __iomem *hw_base;
|
||||
|
||||
/* uCode images, save to reload in case of failure */
|
||||
u32 ucode_ver; /* ucode version, copy of
|
||||
iwl3945_ucode.ver */
|
||||
struct fw_desc ucode_code; /* runtime inst */
|
||||
struct fw_desc ucode_data; /* runtime data original */
|
||||
struct fw_desc ucode_data_backup; /* runtime data save/restore */
|
||||
|
@ -48,12 +48,15 @@
|
||||
static int iwl4965_send_tx_power(struct iwl_priv *priv);
|
||||
static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
|
||||
|
||||
/* Change firmware file name, using "-" and incrementing number,
|
||||
* *only* when uCode interface or architecture changes so that it
|
||||
* is not compatible with earlier drivers.
|
||||
* This number will also appear in << 8 position of 1st dword of uCode file */
|
||||
#define IWL4965_UCODE_API "-2"
|
||||
#define IWL4965_MODULE_FIRMWARE "iwlwifi-4965" IWL4965_UCODE_API ".ucode"
|
||||
/* Highest firmware API version supported */
|
||||
#define IWL4965_UCODE_API_MAX 2
|
||||
|
||||
/* Lowest firmware API version supported */
|
||||
#define IWL4965_UCODE_API_MIN 2
|
||||
|
||||
#define IWL4965_FW_PRE "iwlwifi-4965-"
|
||||
#define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
|
||||
#define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
|
||||
|
||||
|
||||
/* module parameters */
|
||||
@ -523,7 +526,7 @@ static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
|
||||
struct iwl_calib_diff_gain_cmd cmd;
|
||||
|
||||
memset(&cmd, 0, sizeof(cmd));
|
||||
cmd.opCode = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
|
||||
cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
|
||||
cmd.diff_gain_a = 0;
|
||||
cmd.diff_gain_b = 0;
|
||||
cmd.diff_gain_c = 0;
|
||||
@ -574,7 +577,7 @@ static void iwl4965_gain_computation(struct iwl_priv *priv,
|
||||
data->radio_write = 1;
|
||||
|
||||
memset(&cmd, 0, sizeof(cmd));
|
||||
cmd.opCode = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
|
||||
cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
|
||||
cmd.diff_gain_a = data->delta_gain_code[0];
|
||||
cmd.diff_gain_b = data->delta_gain_code[1];
|
||||
cmd.diff_gain_c = data->delta_gain_code[2];
|
||||
@ -816,6 +819,7 @@ static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
|
||||
}
|
||||
|
||||
priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
|
||||
priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
|
||||
priv->hw_params.scd_bc_tbls_size =
|
||||
IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
|
||||
priv->hw_params.max_stations = IWL4965_STATION_COUNT;
|
||||
@ -2335,7 +2339,9 @@ static struct iwl_ops iwl4965_ops = {
|
||||
|
||||
struct iwl_cfg iwl4965_agn_cfg = {
|
||||
.name = "4965AGN",
|
||||
.fw_name = IWL4965_MODULE_FIRMWARE,
|
||||
.fw_name_pre = IWL4965_FW_PRE,
|
||||
.ucode_api_max = IWL4965_UCODE_API_MAX,
|
||||
.ucode_api_min = IWL4965_UCODE_API_MIN,
|
||||
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
|
||||
.eeprom_size = IWL4965_EEPROM_IMG_SIZE,
|
||||
.eeprom_ver = EEPROM_4965_EEPROM_VERSION,
|
||||
@ -2345,7 +2351,7 @@ struct iwl_cfg iwl4965_agn_cfg = {
|
||||
};
|
||||
|
||||
/* Module firmware */
|
||||
MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE);
|
||||
MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
|
||||
|
||||
module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
|
||||
MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
|
||||
|
@ -44,9 +44,21 @@
|
||||
#include "iwl-helpers.h"
|
||||
#include "iwl-5000-hw.h"
|
||||
|
||||
#define IWL5000_UCODE_API "-1"
|
||||
/* Highest firmware API version supported */
|
||||
#define IWL5000_UCODE_API_MAX 1
|
||||
#define IWL5150_UCODE_API_MAX 1
|
||||
|
||||
#define IWL5000_MODULE_FIRMWARE "iwlwifi-5000" IWL5000_UCODE_API ".ucode"
|
||||
/* Lowest firmware API version supported */
|
||||
#define IWL5000_UCODE_API_MIN 1
|
||||
#define IWL5150_UCODE_API_MIN 1
|
||||
|
||||
#define IWL5000_FW_PRE "iwlwifi-5000-"
|
||||
#define _IWL5000_MODULE_FIRMWARE(api) IWL5000_FW_PRE #api ".ucode"
|
||||
#define IWL5000_MODULE_FIRMWARE(api) _IWL5000_MODULE_FIRMWARE(api)
|
||||
|
||||
#define IWL5150_FW_PRE "iwlwifi-5150-"
|
||||
#define _IWL5150_MODULE_FIRMWARE(api) IWL5150_FW_PRE #api ".ucode"
|
||||
#define IWL5150_MODULE_FIRMWARE(api) _IWL5150_MODULE_FIRMWARE(api)
|
||||
|
||||
static const u16 iwl5000_default_queue_to_tx_fifo[] = {
|
||||
IWL_TX_FIFO_AC3,
|
||||
@ -338,9 +350,13 @@ static void iwl5000_gain_computation(struct iwl_priv *priv,
|
||||
|
||||
if (!data->radio_write) {
|
||||
struct iwl_calib_chain_noise_gain_cmd cmd;
|
||||
|
||||
memset(&cmd, 0, sizeof(cmd));
|
||||
|
||||
cmd.op_code = IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD;
|
||||
cmd.hdr.op_code = IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD;
|
||||
cmd.hdr.first_group = 0;
|
||||
cmd.hdr.groups_num = 1;
|
||||
cmd.hdr.data_valid = 1;
|
||||
cmd.delta_gain_1 = data->delta_gain_code[1];
|
||||
cmd.delta_gain_2 = data->delta_gain_code[2];
|
||||
iwl_send_cmd_pdu_async(priv, REPLY_PHY_CALIBRATION_CMD,
|
||||
@ -362,14 +378,19 @@ static void iwl5000_gain_computation(struct iwl_priv *priv,
|
||||
static void iwl5000_chain_noise_reset(struct iwl_priv *priv)
|
||||
{
|
||||
struct iwl_chain_noise_data *data = &priv->chain_noise_data;
|
||||
int ret;
|
||||
|
||||
if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
|
||||
struct iwl_calib_chain_noise_reset_cmd cmd;
|
||||
|
||||
memset(&cmd, 0, sizeof(cmd));
|
||||
cmd.op_code = IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD;
|
||||
if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
|
||||
sizeof(cmd), &cmd))
|
||||
|
||||
cmd.hdr.op_code = IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD;
|
||||
cmd.hdr.first_group = 0;
|
||||
cmd.hdr.groups_num = 1;
|
||||
cmd.hdr.data_valid = 1;
|
||||
ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
|
||||
sizeof(cmd), &cmd);
|
||||
if (ret)
|
||||
IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
|
||||
data->state = IWL_CHAIN_NOISE_ACCUMULATE;
|
||||
IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
|
||||
@ -415,22 +436,33 @@ static const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
|
||||
return &priv->eeprom[address];
|
||||
}
|
||||
|
||||
static s32 iwl5150_get_ct_threshold(struct iwl_priv *priv)
|
||||
{
|
||||
const s32 volt2temp_coef = -5;
|
||||
u16 *temp_calib = (u16 *)iwl_eeprom_query_addr(priv,
|
||||
EEPROM_5000_TEMPERATURE);
|
||||
/* offset = temperate - voltage / coef */
|
||||
s32 offset = temp_calib[0] - temp_calib[1] / volt2temp_coef;
|
||||
s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD) - offset;
|
||||
return threshold * volt2temp_coef;
|
||||
}
|
||||
|
||||
/*
|
||||
* Calibration
|
||||
*/
|
||||
static int iwl5000_set_Xtal_calib(struct iwl_priv *priv)
|
||||
{
|
||||
u8 data[sizeof(struct iwl_calib_hdr) +
|
||||
sizeof(struct iwl_cal_xtal_freq)];
|
||||
struct iwl_calib_cmd *cmd = (struct iwl_calib_cmd *)data;
|
||||
struct iwl_cal_xtal_freq *xtal = (struct iwl_cal_xtal_freq *)cmd->data;
|
||||
struct iwl_calib_xtal_freq_cmd cmd;
|
||||
u16 *xtal_calib = (u16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_XTAL);
|
||||
|
||||
cmd->hdr.op_code = IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD;
|
||||
xtal->cap_pin1 = (u8)xtal_calib[0];
|
||||
xtal->cap_pin2 = (u8)xtal_calib[1];
|
||||
cmd.hdr.op_code = IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD;
|
||||
cmd.hdr.first_group = 0;
|
||||
cmd.hdr.groups_num = 1;
|
||||
cmd.hdr.data_valid = 1;
|
||||
cmd.cap_pin1 = (u8)xtal_calib[0];
|
||||
cmd.cap_pin2 = (u8)xtal_calib[1];
|
||||
return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
|
||||
data, sizeof(data));
|
||||
(u8 *)&cmd, sizeof(cmd));
|
||||
}
|
||||
|
||||
static int iwl5000_send_calib_cfg(struct iwl_priv *priv)
|
||||
@ -466,6 +498,9 @@ static void iwl5000_rx_calib_result(struct iwl_priv *priv,
|
||||
* uCode. iwl_send_calib_results sends them in a row according to their
|
||||
* index. We sort them here */
|
||||
switch (hdr->op_code) {
|
||||
case IWL_PHY_CALIBRATE_DC_CMD:
|
||||
index = IWL_CALIB_DC;
|
||||
break;
|
||||
case IWL_PHY_CALIBRATE_LO_CMD:
|
||||
index = IWL_CALIB_LO;
|
||||
break;
|
||||
@ -802,6 +837,7 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
|
||||
}
|
||||
|
||||
priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
|
||||
priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
|
||||
priv->hw_params.scd_bc_tbls_size =
|
||||
IWL50_NUM_QUEUES * sizeof(struct iwl5000_scd_bc_tbl);
|
||||
priv->hw_params.max_stations = IWL5000_STATION_COUNT;
|
||||
@ -845,7 +881,7 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
|
||||
case CSR_HW_REV_TYPE_5150:
|
||||
/* 5150 wants in Kelvin */
|
||||
priv->hw_params.ct_kill_threshold =
|
||||
CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
|
||||
iwl5150_get_ct_threshold(priv);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -862,7 +898,12 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
|
||||
BIT(IWL_CALIB_BASE_BAND);
|
||||
break;
|
||||
case CSR_HW_REV_TYPE_5150:
|
||||
priv->hw_params.calib_init_cfg = 0;
|
||||
priv->hw_params.calib_init_cfg =
|
||||
BIT(IWL_CALIB_DC) |
|
||||
BIT(IWL_CALIB_LO) |
|
||||
BIT(IWL_CALIB_TX_IQ) |
|
||||
BIT(IWL_CALIB_BASE_BAND);
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1501,7 +1542,9 @@ static struct iwl_mod_params iwl50_mod_params = {
|
||||
|
||||
struct iwl_cfg iwl5300_agn_cfg = {
|
||||
.name = "5300AGN",
|
||||
.fw_name = IWL5000_MODULE_FIRMWARE,
|
||||
.fw_name_pre = IWL5000_FW_PRE,
|
||||
.ucode_api_max = IWL5000_UCODE_API_MAX,
|
||||
.ucode_api_min = IWL5000_UCODE_API_MIN,
|
||||
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
|
||||
.ops = &iwl5000_ops,
|
||||
.eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
|
||||
@ -1512,7 +1555,9 @@ struct iwl_cfg iwl5300_agn_cfg = {
|
||||
|
||||
struct iwl_cfg iwl5100_bg_cfg = {
|
||||
.name = "5100BG",
|
||||
.fw_name = IWL5000_MODULE_FIRMWARE,
|
||||
.fw_name_pre = IWL5000_FW_PRE,
|
||||
.ucode_api_max = IWL5000_UCODE_API_MAX,
|
||||
.ucode_api_min = IWL5000_UCODE_API_MIN,
|
||||
.sku = IWL_SKU_G,
|
||||
.ops = &iwl5000_ops,
|
||||
.eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
|
||||
@ -1523,7 +1568,9 @@ struct iwl_cfg iwl5100_bg_cfg = {
|
||||
|
||||
struct iwl_cfg iwl5100_abg_cfg = {
|
||||
.name = "5100ABG",
|
||||
.fw_name = IWL5000_MODULE_FIRMWARE,
|
||||
.fw_name_pre = IWL5000_FW_PRE,
|
||||
.ucode_api_max = IWL5000_UCODE_API_MAX,
|
||||
.ucode_api_min = IWL5000_UCODE_API_MIN,
|
||||
.sku = IWL_SKU_A|IWL_SKU_G,
|
||||
.ops = &iwl5000_ops,
|
||||
.eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
|
||||
@ -1534,7 +1581,9 @@ struct iwl_cfg iwl5100_abg_cfg = {
|
||||
|
||||
struct iwl_cfg iwl5100_agn_cfg = {
|
||||
.name = "5100AGN",
|
||||
.fw_name = IWL5000_MODULE_FIRMWARE,
|
||||
.fw_name_pre = IWL5000_FW_PRE,
|
||||
.ucode_api_max = IWL5000_UCODE_API_MAX,
|
||||
.ucode_api_min = IWL5000_UCODE_API_MIN,
|
||||
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
|
||||
.ops = &iwl5000_ops,
|
||||
.eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
|
||||
@ -1545,7 +1594,9 @@ struct iwl_cfg iwl5100_agn_cfg = {
|
||||
|
||||
struct iwl_cfg iwl5350_agn_cfg = {
|
||||
.name = "5350AGN",
|
||||
.fw_name = IWL5000_MODULE_FIRMWARE,
|
||||
.fw_name_pre = IWL5000_FW_PRE,
|
||||
.ucode_api_max = IWL5000_UCODE_API_MAX,
|
||||
.ucode_api_min = IWL5000_UCODE_API_MIN,
|
||||
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
|
||||
.ops = &iwl5000_ops,
|
||||
.eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
|
||||
@ -1554,7 +1605,21 @@ struct iwl_cfg iwl5350_agn_cfg = {
|
||||
.mod_params = &iwl50_mod_params,
|
||||
};
|
||||
|
||||
MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE);
|
||||
struct iwl_cfg iwl5150_agn_cfg = {
|
||||
.name = "5150AGN",
|
||||
.fw_name_pre = IWL5150_FW_PRE,
|
||||
.ucode_api_max = IWL5150_UCODE_API_MAX,
|
||||
.ucode_api_min = IWL5150_UCODE_API_MIN,
|
||||
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
|
||||
.ops = &iwl5000_ops,
|
||||
.eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
|
||||
.eeprom_ver = EEPROM_5050_EEPROM_VERSION,
|
||||
.eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
|
||||
.mod_params = &iwl50_mod_params,
|
||||
};
|
||||
|
||||
MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));
|
||||
MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX));
|
||||
|
||||
module_param_named(disable50, iwl50_mod_params.disable, int, 0444);
|
||||
MODULE_PARM_DESC(disable50,
|
||||
|
108
drivers/net/wireless/iwlwifi/iwl-agn-hcmd-check.c
Normal file
108
drivers/net/wireless/iwlwifi/iwl-agn-hcmd-check.c
Normal file
@ -0,0 +1,108 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
|
||||
* USA
|
||||
*
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* Contact Information:
|
||||
* Tomas Winkler <tomas.winkler@intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <net/mac80211.h>
|
||||
#include "iwl-dev.h"
|
||||
#include "iwl-debug.h"
|
||||
#include "iwl-commands.h"
|
||||
|
||||
|
||||
/**
|
||||
* iwl_check_rxon_cmd - validate RXON structure is valid
|
||||
*
|
||||
* NOTE: This is really only useful during development and can eventually
|
||||
* be #ifdef'd out once the driver is stable and folks aren't actively
|
||||
* making changes
|
||||
*/
|
||||
int iwl_agn_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
|
||||
{
|
||||
int error = 0;
|
||||
int counter = 1;
|
||||
|
||||
if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
|
||||
error |= le32_to_cpu(rxon->flags &
|
||||
(RXON_FLG_TGJ_NARROW_BAND_MSK |
|
||||
RXON_FLG_RADAR_DETECT_MSK));
|
||||
if (error)
|
||||
IWL_WARNING("check 24G fields %d | %d\n",
|
||||
counter++, error);
|
||||
} else {
|
||||
error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
|
||||
0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
|
||||
if (error)
|
||||
IWL_WARNING("check 52 fields %d | %d\n",
|
||||
counter++, error);
|
||||
error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
|
||||
if (error)
|
||||
IWL_WARNING("check 52 CCK %d | %d\n",
|
||||
counter++, error);
|
||||
}
|
||||
error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
|
||||
if (error)
|
||||
IWL_WARNING("check mac addr %d | %d\n", counter++, error);
|
||||
|
||||
/* make sure basic rates 6Mbps and 1Mbps are supported */
|
||||
error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
|
||||
((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
|
||||
if (error)
|
||||
IWL_WARNING("check basic rate %d | %d\n", counter++, error);
|
||||
|
||||
error |= (le16_to_cpu(rxon->assoc_id) > 2007);
|
||||
if (error)
|
||||
IWL_WARNING("check assoc id %d | %d\n", counter++, error);
|
||||
|
||||
error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
|
||||
== (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
|
||||
if (error)
|
||||
IWL_WARNING("check CCK and short slot %d | %d\n",
|
||||
counter++, error);
|
||||
|
||||
error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
|
||||
== (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
|
||||
if (error)
|
||||
IWL_WARNING("check CCK & auto detect %d | %d\n",
|
||||
counter++, error);
|
||||
|
||||
error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
|
||||
RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
|
||||
if (error)
|
||||
IWL_WARNING("check TGG and auto detect %d | %d\n",
|
||||
counter++, error);
|
||||
|
||||
if (error)
|
||||
IWL_WARNING("Tuning to channel %d\n",
|
||||
le16_to_cpu(rxon->channel));
|
||||
|
||||
if (error) {
|
||||
IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
@ -107,79 +107,6 @@ static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* iwl_check_rxon_cmd - validate RXON structure is valid
|
||||
*
|
||||
* NOTE: This is really only useful during development and can eventually
|
||||
* be #ifdef'd out once the driver is stable and folks aren't actively
|
||||
* making changes
|
||||
*/
|
||||
static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
|
||||
{
|
||||
int error = 0;
|
||||
int counter = 1;
|
||||
|
||||
if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
|
||||
error |= le32_to_cpu(rxon->flags &
|
||||
(RXON_FLG_TGJ_NARROW_BAND_MSK |
|
||||
RXON_FLG_RADAR_DETECT_MSK));
|
||||
if (error)
|
||||
IWL_WARNING("check 24G fields %d | %d\n",
|
||||
counter++, error);
|
||||
} else {
|
||||
error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
|
||||
0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
|
||||
if (error)
|
||||
IWL_WARNING("check 52 fields %d | %d\n",
|
||||
counter++, error);
|
||||
error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
|
||||
if (error)
|
||||
IWL_WARNING("check 52 CCK %d | %d\n",
|
||||
counter++, error);
|
||||
}
|
||||
error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
|
||||
if (error)
|
||||
IWL_WARNING("check mac addr %d | %d\n", counter++, error);
|
||||
|
||||
/* make sure basic rates 6Mbps and 1Mbps are supported */
|
||||
error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
|
||||
((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
|
||||
if (error)
|
||||
IWL_WARNING("check basic rate %d | %d\n", counter++, error);
|
||||
|
||||
error |= (le16_to_cpu(rxon->assoc_id) > 2007);
|
||||
if (error)
|
||||
IWL_WARNING("check assoc id %d | %d\n", counter++, error);
|
||||
|
||||
error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
|
||||
== (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
|
||||
if (error)
|
||||
IWL_WARNING("check CCK and short slot %d | %d\n",
|
||||
counter++, error);
|
||||
|
||||
error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
|
||||
== (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
|
||||
if (error)
|
||||
IWL_WARNING("check CCK & auto detect %d | %d\n",
|
||||
counter++, error);
|
||||
|
||||
error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
|
||||
RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
|
||||
if (error)
|
||||
IWL_WARNING("check TGG and auto detect %d | %d\n",
|
||||
counter++, error);
|
||||
|
||||
if (error)
|
||||
IWL_WARNING("Tuning to channel %d\n",
|
||||
le16_to_cpu(rxon->channel));
|
||||
|
||||
if (error) {
|
||||
IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
|
||||
* @priv: staging_rxon is compared to active_rxon
|
||||
@ -252,7 +179,7 @@ static int iwl_commit_rxon(struct iwl_priv *priv)
|
||||
* 5000, but will not damage 4965 */
|
||||
priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
|
||||
|
||||
ret = iwl_check_rxon_cmd(&priv->staging_rxon);
|
||||
ret = iwl_agn_check_rxon_cmd(&priv->staging_rxon);
|
||||
if (ret) {
|
||||
IWL_ERROR("Invalid RXON configuration. Not committing.\n");
|
||||
return -EINVAL;
|
||||
@ -1328,13 +1255,6 @@ static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
|
||||
}
|
||||
#endif
|
||||
|
||||
static void iwl_enable_interrupts(struct iwl_priv *priv)
|
||||
{
|
||||
IWL_DEBUG_ISR("Enabling interrupts\n");
|
||||
set_bit(STATUS_INT_ENABLED, &priv->status);
|
||||
iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
|
||||
}
|
||||
|
||||
/* call this function to flush any scheduled tasklet */
|
||||
static inline void iwl_synchronize_irq(struct iwl_priv *priv)
|
||||
{
|
||||
@ -1343,21 +1263,6 @@ static inline void iwl_synchronize_irq(struct iwl_priv *priv)
|
||||
tasklet_kill(&priv->irq_tasklet);
|
||||
}
|
||||
|
||||
static inline void iwl_disable_interrupts(struct iwl_priv *priv)
|
||||
{
|
||||
clear_bit(STATUS_INT_ENABLED, &priv->status);
|
||||
|
||||
/* disable interrupts from uCode/NIC to host */
|
||||
iwl_write32(priv, CSR_INT_MASK, 0x00000000);
|
||||
|
||||
/* acknowledge/clear/reset any interrupts still pending
|
||||
* from uCode or flow handler (Rx/Tx DMA) */
|
||||
iwl_write32(priv, CSR_INT, 0xffffffff);
|
||||
iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
|
||||
IWL_DEBUG_ISR("Disabled interrupts\n");
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* iwl_irq_handle_error - called for HW or SW error interrupt from card
|
||||
*/
|
||||
@ -1608,7 +1513,7 @@ static irqreturn_t iwl_isr(int irq, void *data)
|
||||
if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
|
||||
/* Hardware disappeared. It might have already raised
|
||||
* an interrupt */
|
||||
IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
|
||||
IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta);
|
||||
goto unplugged;
|
||||
}
|
||||
|
||||
@ -1665,24 +1570,40 @@ static void iwl_nic_start(struct iwl_priv *priv)
|
||||
static int iwl_read_ucode(struct iwl_priv *priv)
|
||||
{
|
||||
struct iwl_ucode *ucode;
|
||||
int ret;
|
||||
int ret = -EINVAL, index;
|
||||
const struct firmware *ucode_raw;
|
||||
const char *name = priv->cfg->fw_name;
|
||||
const char *name_pre = priv->cfg->fw_name_pre;
|
||||
const unsigned int api_max = priv->cfg->ucode_api_max;
|
||||
const unsigned int api_min = priv->cfg->ucode_api_min;
|
||||
char buf[25];
|
||||
u8 *src;
|
||||
size_t len;
|
||||
u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
|
||||
u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
|
||||
|
||||
/* Ask kernel firmware_class module to get the boot firmware off disk.
|
||||
* request_firmware() is synchronous, file is in memory on return. */
|
||||
ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
|
||||
if (ret < 0) {
|
||||
IWL_ERROR("%s firmware file req failed: Reason %d\n",
|
||||
name, ret);
|
||||
goto error;
|
||||
for (index = api_max; index >= api_min; index--) {
|
||||
sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
|
||||
ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
|
||||
if (ret < 0) {
|
||||
IWL_ERROR("%s firmware file req failed: Reason %d\n",
|
||||
buf, ret);
|
||||
if (ret == -ENOENT)
|
||||
continue;
|
||||
else
|
||||
goto error;
|
||||
} else {
|
||||
if (index < api_max)
|
||||
IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
|
||||
buf, api_max);
|
||||
IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
|
||||
buf, ucode_raw->size);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
|
||||
name, ucode_raw->size);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
|
||||
/* Make sure that we got at least our header! */
|
||||
if (ucode_raw->size < sizeof(*ucode)) {
|
||||
@ -1694,14 +1615,40 @@ static int iwl_read_ucode(struct iwl_priv *priv)
|
||||
/* Data from ucode file: header followed by uCode images */
|
||||
ucode = (void *)ucode_raw->data;
|
||||
|
||||
ver = le32_to_cpu(ucode->ver);
|
||||
priv->ucode_ver = le32_to_cpu(ucode->ver);
|
||||
api_ver = IWL_UCODE_API(priv->ucode_ver);
|
||||
inst_size = le32_to_cpu(ucode->inst_size);
|
||||
data_size = le32_to_cpu(ucode->data_size);
|
||||
init_size = le32_to_cpu(ucode->init_size);
|
||||
init_data_size = le32_to_cpu(ucode->init_data_size);
|
||||
boot_size = le32_to_cpu(ucode->boot_size);
|
||||
|
||||
IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
|
||||
/* api_ver should match the api version forming part of the
|
||||
* firmware filename ... but we don't check for that and only rely
|
||||
* on the API version read from firware header from here on forward */
|
||||
|
||||
if (api_ver < api_min || api_ver > api_max) {
|
||||
IWL_ERROR("Driver unable to support your firmware API. "
|
||||
"Driver supports v%u, firmware is v%u.\n",
|
||||
api_max, api_ver);
|
||||
priv->ucode_ver = 0;
|
||||
ret = -EINVAL;
|
||||
goto err_release;
|
||||
}
|
||||
if (api_ver != api_max)
|
||||
IWL_ERROR("Firmware has old API version. Expected v%u, "
|
||||
"got v%u. New firmware can be obtained "
|
||||
"from http://www.intellinuxwireless.org.\n",
|
||||
api_max, api_ver);
|
||||
|
||||
printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n",
|
||||
IWL_UCODE_MAJOR(priv->ucode_ver),
|
||||
IWL_UCODE_MINOR(priv->ucode_ver),
|
||||
IWL_UCODE_API(priv->ucode_ver),
|
||||
IWL_UCODE_SERIAL(priv->ucode_ver));
|
||||
|
||||
IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
|
||||
priv->ucode_ver);
|
||||
IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
|
||||
inst_size);
|
||||
IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
|
||||
@ -3675,68 +3622,6 @@ static ssize_t show_power_level(struct device *d,
|
||||
static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
|
||||
store_power_level);
|
||||
|
||||
static ssize_t show_channels(struct device *d,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
|
||||
struct iwl_priv *priv = dev_get_drvdata(d);
|
||||
struct ieee80211_channel *channels = NULL;
|
||||
const struct ieee80211_supported_band *supp_band = NULL;
|
||||
int len = 0, i;
|
||||
int count = 0;
|
||||
|
||||
if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
|
||||
return -EAGAIN;
|
||||
|
||||
supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
|
||||
channels = supp_band->channels;
|
||||
count = supp_band->n_channels;
|
||||
|
||||
len += sprintf(&buf[len],
|
||||
"Displaying %d channels in 2.4GHz band "
|
||||
"(802.11bg):\n", count);
|
||||
|
||||
for (i = 0; i < count; i++)
|
||||
len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
|
||||
ieee80211_frequency_to_channel(
|
||||
channels[i].center_freq),
|
||||
channels[i].max_power,
|
||||
channels[i].flags & IEEE80211_CHAN_RADAR ?
|
||||
" (IEEE 802.11h required)" : "",
|
||||
(!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
|
||||
|| (channels[i].flags &
|
||||
IEEE80211_CHAN_RADAR)) ? "" :
|
||||
", IBSS",
|
||||
channels[i].flags &
|
||||
IEEE80211_CHAN_PASSIVE_SCAN ?
|
||||
"passive only" : "active/passive");
|
||||
|
||||
supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
|
||||
channels = supp_band->channels;
|
||||
count = supp_band->n_channels;
|
||||
|
||||
len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
|
||||
"(802.11a):\n", count);
|
||||
|
||||
for (i = 0; i < count; i++)
|
||||
len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
|
||||
ieee80211_frequency_to_channel(
|
||||
channels[i].center_freq),
|
||||
channels[i].max_power,
|
||||
channels[i].flags & IEEE80211_CHAN_RADAR ?
|
||||
" (IEEE 802.11h required)" : "",
|
||||
((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
|
||||
|| (channels[i].flags &
|
||||
IEEE80211_CHAN_RADAR)) ? "" :
|
||||
", IBSS",
|
||||
channels[i].flags &
|
||||
IEEE80211_CHAN_PASSIVE_SCAN ?
|
||||
"passive only" : "active/passive");
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
|
||||
|
||||
static ssize_t show_statistics(struct device *d,
|
||||
struct device_attribute *attr, char *buf)
|
||||
@ -3836,7 +3721,6 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv)
|
||||
}
|
||||
|
||||
static struct attribute *iwl_sysfs_entries[] = {
|
||||
&dev_attr_channels.attr,
|
||||
&dev_attr_flags.attr,
|
||||
&dev_attr_filter_flags.attr,
|
||||
&dev_attr_power_level.attr,
|
||||
@ -4210,7 +4094,11 @@ static struct pci_device_id iwl_hw_card_ids[] = {
|
||||
{IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
|
||||
{IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
|
||||
{IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
|
||||
/* 5150 Wifi/WiMax */
|
||||
{IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
|
||||
{IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
|
||||
#endif /* CONFIG_IWL5000 */
|
||||
|
||||
{0}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
|
||||
|
@ -69,6 +69,12 @@
|
||||
#ifndef __iwl_commands_h__
|
||||
#define __iwl_commands_h__
|
||||
|
||||
/* uCode version contains 4 values: Major/Minor/API/Serial */
|
||||
#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
|
||||
#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
|
||||
#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
|
||||
#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
|
||||
|
||||
enum {
|
||||
REPLY_ALIVE = 0x1,
|
||||
REPLY_ERROR = 0x2,
|
||||
@ -172,8 +178,8 @@ enum {
|
||||
#define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8)
|
||||
#define SEQ_TO_INDEX(s) ((s) & 0xff)
|
||||
#define INDEX_TO_SEQ(i) ((i) & 0xff)
|
||||
#define SEQ_HUGE_FRAME __constant_cpu_to_le16(0x4000)
|
||||
#define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000)
|
||||
#define SEQ_HUGE_FRAME cpu_to_le16(0x4000)
|
||||
#define SEQ_RX_FRAME cpu_to_le16(0x8000)
|
||||
|
||||
/**
|
||||
* struct iwl_cmd_header
|
||||
@ -368,7 +374,7 @@ struct iwl5000_tx_power_dbm_cmd {
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#define UCODE_VALID_OK __constant_cpu_to_le32(0x1)
|
||||
#define UCODE_VALID_OK cpu_to_le32(0x1)
|
||||
#define INITIALIZE_SUBTYPE (9)
|
||||
|
||||
/*
|
||||
@ -517,75 +523,75 @@ enum {
|
||||
};
|
||||
|
||||
|
||||
#define RXON_RX_CHAIN_DRIVER_FORCE_MSK __constant_cpu_to_le16(0x1 << 0)
|
||||
#define RXON_RX_CHAIN_VALID_MSK __constant_cpu_to_le16(0x7 << 1)
|
||||
#define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
|
||||
#define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
|
||||
#define RXON_RX_CHAIN_VALID_POS (1)
|
||||
#define RXON_RX_CHAIN_FORCE_SEL_MSK __constant_cpu_to_le16(0x7 << 4)
|
||||
#define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
|
||||
#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
|
||||
#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK __constant_cpu_to_le16(0x7 << 7)
|
||||
#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
|
||||
#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
|
||||
#define RXON_RX_CHAIN_CNT_MSK __constant_cpu_to_le16(0x3 << 10)
|
||||
#define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
|
||||
#define RXON_RX_CHAIN_CNT_POS (10)
|
||||
#define RXON_RX_CHAIN_MIMO_CNT_MSK __constant_cpu_to_le16(0x3 << 12)
|
||||
#define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
|
||||
#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
|
||||
#define RXON_RX_CHAIN_MIMO_FORCE_MSK __constant_cpu_to_le16(0x1 << 14)
|
||||
#define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
|
||||
#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
|
||||
|
||||
/* rx_config flags */
|
||||
/* band & modulation selection */
|
||||
#define RXON_FLG_BAND_24G_MSK __constant_cpu_to_le32(1 << 0)
|
||||
#define RXON_FLG_CCK_MSK __constant_cpu_to_le32(1 << 1)
|
||||
#define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
|
||||
#define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
|
||||
/* auto detection enable */
|
||||
#define RXON_FLG_AUTO_DETECT_MSK __constant_cpu_to_le32(1 << 2)
|
||||
#define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
|
||||
/* TGg protection when tx */
|
||||
#define RXON_FLG_TGG_PROTECT_MSK __constant_cpu_to_le32(1 << 3)
|
||||
#define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
|
||||
/* cck short slot & preamble */
|
||||
#define RXON_FLG_SHORT_SLOT_MSK __constant_cpu_to_le32(1 << 4)
|
||||
#define RXON_FLG_SHORT_PREAMBLE_MSK __constant_cpu_to_le32(1 << 5)
|
||||
#define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
|
||||
#define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
|
||||
/* antenna selection */
|
||||
#define RXON_FLG_DIS_DIV_MSK __constant_cpu_to_le32(1 << 7)
|
||||
#define RXON_FLG_ANT_SEL_MSK __constant_cpu_to_le32(0x0f00)
|
||||
#define RXON_FLG_ANT_A_MSK __constant_cpu_to_le32(1 << 8)
|
||||
#define RXON_FLG_ANT_B_MSK __constant_cpu_to_le32(1 << 9)
|
||||
#define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
|
||||
#define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
|
||||
#define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
|
||||
#define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
|
||||
/* radar detection enable */
|
||||
#define RXON_FLG_RADAR_DETECT_MSK __constant_cpu_to_le32(1 << 12)
|
||||
#define RXON_FLG_TGJ_NARROW_BAND_MSK __constant_cpu_to_le32(1 << 13)
|
||||
#define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
|
||||
#define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
|
||||
/* rx response to host with 8-byte TSF
|
||||
* (according to ON_AIR deassertion) */
|
||||
#define RXON_FLG_TSF2HOST_MSK __constant_cpu_to_le32(1 << 15)
|
||||
#define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
|
||||
|
||||
|
||||
/* HT flags */
|
||||
#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
|
||||
#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK __constant_cpu_to_le32(0x1 << 22)
|
||||
#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
|
||||
|
||||
#define RXON_FLG_HT_OPERATING_MODE_POS (23)
|
||||
|
||||
#define RXON_FLG_HT_PROT_MSK __constant_cpu_to_le32(0x1 << 23)
|
||||
#define RXON_FLG_FAT_PROT_MSK __constant_cpu_to_le32(0x2 << 23)
|
||||
#define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
|
||||
#define RXON_FLG_FAT_PROT_MSK cpu_to_le32(0x2 << 23)
|
||||
|
||||
#define RXON_FLG_CHANNEL_MODE_POS (25)
|
||||
#define RXON_FLG_CHANNEL_MODE_MSK __constant_cpu_to_le32(0x3 << 25)
|
||||
#define RXON_FLG_CHANNEL_MODE_PURE_40_MSK __constant_cpu_to_le32(0x1 << 25)
|
||||
#define RXON_FLG_CHANNEL_MODE_MIXED_MSK __constant_cpu_to_le32(0x2 << 25)
|
||||
#define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
|
||||
#define RXON_FLG_CHANNEL_MODE_PURE_40_MSK cpu_to_le32(0x1 << 25)
|
||||
#define RXON_FLG_CHANNEL_MODE_MIXED_MSK cpu_to_le32(0x2 << 25)
|
||||
/* CTS to self (if spec allows) flag */
|
||||
#define RXON_FLG_SELF_CTS_EN __constant_cpu_to_le32(0x1<<30)
|
||||
#define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
|
||||
|
||||
/* rx_config filter flags */
|
||||
/* accept all data frames */
|
||||
#define RXON_FILTER_PROMISC_MSK __constant_cpu_to_le32(1 << 0)
|
||||
#define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
|
||||
/* pass control & management to host */
|
||||
#define RXON_FILTER_CTL2HOST_MSK __constant_cpu_to_le32(1 << 1)
|
||||
#define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
|
||||
/* accept multi-cast */
|
||||
#define RXON_FILTER_ACCEPT_GRP_MSK __constant_cpu_to_le32(1 << 2)
|
||||
#define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
|
||||
/* don't decrypt uni-cast frames */
|
||||
#define RXON_FILTER_DIS_DECRYPT_MSK __constant_cpu_to_le32(1 << 3)
|
||||
#define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
|
||||
/* don't decrypt multi-cast frames */
|
||||
#define RXON_FILTER_DIS_GRP_DECRYPT_MSK __constant_cpu_to_le32(1 << 4)
|
||||
#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
|
||||
/* STA is associated */
|
||||
#define RXON_FILTER_ASSOC_MSK __constant_cpu_to_le32(1 << 5)
|
||||
#define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
|
||||
/* transfer to host non bssid beacons in associated state */
|
||||
#define RXON_FILTER_BCON_AWARE_MSK __constant_cpu_to_le32(1 << 6)
|
||||
#define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
|
||||
|
||||
/**
|
||||
* REPLY_RXON = 0x10 (command, has simple generic response)
|
||||
@ -745,9 +751,9 @@ struct iwl_ac_qos {
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* QoS flags defines */
|
||||
#define QOS_PARAM_FLG_UPDATE_EDCA_MSK __constant_cpu_to_le32(0x01)
|
||||
#define QOS_PARAM_FLG_TGN_MSK __constant_cpu_to_le32(0x02)
|
||||
#define QOS_PARAM_FLG_TXOP_TYPE_MSK __constant_cpu_to_le32(0x10)
|
||||
#define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
|
||||
#define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
|
||||
#define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
|
||||
|
||||
/* Number of Access Categories (AC) (EDCA), queues 0..3 */
|
||||
#define AC_NUM 4
|
||||
@ -784,34 +790,34 @@ struct iwl_qosparam_cmd {
|
||||
#define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/
|
||||
#define IWL_INVALID_STATION 255
|
||||
|
||||
#define STA_FLG_PWR_SAVE_MSK __constant_cpu_to_le32(1 << 8);
|
||||
#define STA_FLG_RTS_MIMO_PROT_MSK __constant_cpu_to_le32(1 << 17)
|
||||
#define STA_FLG_AGG_MPDU_8US_MSK __constant_cpu_to_le32(1 << 18)
|
||||
#define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8);
|
||||
#define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
|
||||
#define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
|
||||
#define STA_FLG_MAX_AGG_SIZE_POS (19)
|
||||
#define STA_FLG_MAX_AGG_SIZE_MSK __constant_cpu_to_le32(3 << 19)
|
||||
#define STA_FLG_FAT_EN_MSK __constant_cpu_to_le32(1 << 21)
|
||||
#define STA_FLG_MIMO_DIS_MSK __constant_cpu_to_le32(1 << 22)
|
||||
#define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
|
||||
#define STA_FLG_FAT_EN_MSK cpu_to_le32(1 << 21)
|
||||
#define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
|
||||
#define STA_FLG_AGG_MPDU_DENSITY_POS (23)
|
||||
#define STA_FLG_AGG_MPDU_DENSITY_MSK __constant_cpu_to_le32(7 << 23)
|
||||
#define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
|
||||
|
||||
/* Use in mode field. 1: modify existing entry, 0: add new station entry */
|
||||
#define STA_CONTROL_MODIFY_MSK 0x01
|
||||
|
||||
/* key flags __le16*/
|
||||
#define STA_KEY_FLG_ENCRYPT_MSK __constant_cpu_to_le16(0x0007)
|
||||
#define STA_KEY_FLG_NO_ENC __constant_cpu_to_le16(0x0000)
|
||||
#define STA_KEY_FLG_WEP __constant_cpu_to_le16(0x0001)
|
||||
#define STA_KEY_FLG_CCMP __constant_cpu_to_le16(0x0002)
|
||||
#define STA_KEY_FLG_TKIP __constant_cpu_to_le16(0x0003)
|
||||
#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
|
||||
#define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
|
||||
#define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
|
||||
#define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
|
||||
#define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
|
||||
|
||||
#define STA_KEY_FLG_KEYID_POS 8
|
||||
#define STA_KEY_FLG_INVALID __constant_cpu_to_le16(0x0800)
|
||||
#define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
|
||||
/* wep key is either from global key (0) or from station info array (1) */
|
||||
#define STA_KEY_FLG_MAP_KEY_MSK __constant_cpu_to_le16(0x0008)
|
||||
#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
|
||||
|
||||
/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
|
||||
#define STA_KEY_FLG_KEY_SIZE_MSK __constant_cpu_to_le16(0x1000)
|
||||
#define STA_KEY_MULTICAST_MSK __constant_cpu_to_le16(0x4000)
|
||||
#define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
|
||||
#define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
|
||||
#define STA_KEY_MAX_NUM 8
|
||||
|
||||
/* Flags indicate whether to modify vs. don't change various station params */
|
||||
@ -1036,14 +1042,14 @@ struct iwl4965_rx_frame_hdr {
|
||||
u8 payload[0];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define RX_RES_STATUS_NO_CRC32_ERROR __constant_cpu_to_le32(1 << 0)
|
||||
#define RX_RES_STATUS_NO_RXE_OVERFLOW __constant_cpu_to_le32(1 << 1)
|
||||
#define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
|
||||
#define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
|
||||
|
||||
#define RX_RES_PHY_FLAGS_BAND_24_MSK __constant_cpu_to_le16(1 << 0)
|
||||
#define RX_RES_PHY_FLAGS_MOD_CCK_MSK __constant_cpu_to_le16(1 << 1)
|
||||
#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK __constant_cpu_to_le16(1 << 2)
|
||||
#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK __constant_cpu_to_le16(1 << 3)
|
||||
#define RX_RES_PHY_FLAGS_ANTENNA_MSK __constant_cpu_to_le16(0xf0)
|
||||
#define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
|
||||
#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
|
||||
#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
|
||||
#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
|
||||
#define RX_RES_PHY_FLAGS_ANTENNA_MSK cpu_to_le16(0xf0)
|
||||
|
||||
#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
|
||||
#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
|
||||
@ -1174,21 +1180,21 @@ struct iwl4965_rx_mpdu_res_start {
|
||||
/* 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
|
||||
* before this frame. if CTS-to-self required check
|
||||
* RXON_FLG_SELF_CTS_EN status. */
|
||||
#define TX_CMD_FLG_RTS_CTS_MSK __constant_cpu_to_le32(1 << 0)
|
||||
#define TX_CMD_FLG_RTS_CTS_MSK cpu_to_le32(1 << 0)
|
||||
|
||||
/* 1: Use Request-To-Send protocol before this frame.
|
||||
* Mutually exclusive vs. TX_CMD_FLG_CTS_MSK. */
|
||||
#define TX_CMD_FLG_RTS_MSK __constant_cpu_to_le32(1 << 1)
|
||||
#define TX_CMD_FLG_RTS_MSK cpu_to_le32(1 << 1)
|
||||
|
||||
/* 1: Transmit Clear-To-Send to self before this frame.
|
||||
* Driver should set this for AUTH/DEAUTH/ASSOC-REQ/REASSOC mgmnt frames.
|
||||
* Mutually exclusive vs. TX_CMD_FLG_RTS_MSK. */
|
||||
#define TX_CMD_FLG_CTS_MSK __constant_cpu_to_le32(1 << 2)
|
||||
#define TX_CMD_FLG_CTS_MSK cpu_to_le32(1 << 2)
|
||||
|
||||
/* 1: Expect ACK from receiving station
|
||||
* 0: Don't expect ACK (MAC header's duration field s/b 0)
|
||||
* Set this for unicast frames, but not broadcast/multicast. */
|
||||
#define TX_CMD_FLG_ACK_MSK __constant_cpu_to_le32(1 << 3)
|
||||
#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
|
||||
|
||||
/* For 4965:
|
||||
* 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
|
||||
@ -1196,40 +1202,40 @@ struct iwl4965_rx_mpdu_res_start {
|
||||
* uCode walks through table for additional Tx attempts.
|
||||
* 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
|
||||
* This rate will be used for all Tx attempts; it will not be scaled. */
|
||||
#define TX_CMD_FLG_STA_RATE_MSK __constant_cpu_to_le32(1 << 4)
|
||||
#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
|
||||
|
||||
/* 1: Expect immediate block-ack.
|
||||
* Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
|
||||
#define TX_CMD_FLG_IMM_BA_RSP_MASK __constant_cpu_to_le32(1 << 6)
|
||||
#define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
|
||||
|
||||
/* 1: Frame requires full Tx-Op protection.
|
||||
* Set this if either RTS or CTS Tx Flag gets set. */
|
||||
#define TX_CMD_FLG_FULL_TXOP_PROT_MSK __constant_cpu_to_le32(1 << 7)
|
||||
#define TX_CMD_FLG_FULL_TXOP_PROT_MSK cpu_to_le32(1 << 7)
|
||||
|
||||
/* Tx antenna selection field; used only for 3945, reserved (0) for 4965.
|
||||
* Set field to "0" to allow 3945 uCode to select antenna (normal usage). */
|
||||
#define TX_CMD_FLG_ANT_SEL_MSK __constant_cpu_to_le32(0xf00)
|
||||
#define TX_CMD_FLG_ANT_A_MSK __constant_cpu_to_le32(1 << 8)
|
||||
#define TX_CMD_FLG_ANT_B_MSK __constant_cpu_to_le32(1 << 9)
|
||||
#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
|
||||
#define TX_CMD_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
|
||||
#define TX_CMD_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
|
||||
|
||||
/* 1: Ignore Bluetooth priority for this frame.
|
||||
* 0: Delay Tx until Bluetooth device is done (normal usage). */
|
||||
#define TX_CMD_FLG_BT_DIS_MSK __constant_cpu_to_le32(1 << 12)
|
||||
#define TX_CMD_FLG_BT_DIS_MSK cpu_to_le32(1 << 12)
|
||||
|
||||
/* 1: uCode overrides sequence control field in MAC header.
|
||||
* 0: Driver provides sequence control field in MAC header.
|
||||
* Set this for management frames, non-QOS data frames, non-unicast frames,
|
||||
* and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
|
||||
#define TX_CMD_FLG_SEQ_CTL_MSK __constant_cpu_to_le32(1 << 13)
|
||||
#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
|
||||
|
||||
/* 1: This frame is non-last MPDU; more fragments are coming.
|
||||
* 0: Last fragment, or not using fragmentation. */
|
||||
#define TX_CMD_FLG_MORE_FRAG_MSK __constant_cpu_to_le32(1 << 14)
|
||||
#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
|
||||
|
||||
/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
|
||||
* 0: No TSF required in outgoing frame.
|
||||
* Set this for transmitting beacons and probe responses. */
|
||||
#define TX_CMD_FLG_TSF_MSK __constant_cpu_to_le32(1 << 16)
|
||||
#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
|
||||
|
||||
/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
|
||||
* alignment of frame's payload data field.
|
||||
@ -1237,14 +1243,14 @@ struct iwl4965_rx_mpdu_res_start {
|
||||
* Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
|
||||
* field (but not both). Driver must align frame data (i.e. data following
|
||||
* MAC header) to DWORD boundary. */
|
||||
#define TX_CMD_FLG_MH_PAD_MSK __constant_cpu_to_le32(1 << 20)
|
||||
#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
|
||||
|
||||
/* accelerate aggregation support
|
||||
* 0 - no CCMP encryption; 1 - CCMP encryption */
|
||||
#define TX_CMD_FLG_AGG_CCMP_MSK __constant_cpu_to_le32(1 << 22)
|
||||
#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
|
||||
|
||||
/* HCCA-AP - disable duration overwriting. */
|
||||
#define TX_CMD_FLG_DUR_MSK __constant_cpu_to_le32(1 << 25)
|
||||
#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
|
||||
|
||||
|
||||
/*
|
||||
@ -2076,10 +2082,10 @@ struct iwl4965_spectrum_notification {
|
||||
*/
|
||||
#define IWL_POWER_VEC_SIZE 5
|
||||
|
||||
#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK __constant_cpu_to_le16(1 << 0)
|
||||
#define IWL_POWER_SLEEP_OVER_DTIM_MSK __constant_cpu_to_le16(1 << 2)
|
||||
#define IWL_POWER_PCI_PM_MSK __constant_cpu_to_le16(1 << 3)
|
||||
#define IWL_POWER_FAST_PD __constant_cpu_to_le16(1 << 4)
|
||||
#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(1 << 0)
|
||||
#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(1 << 2)
|
||||
#define IWL_POWER_PCI_PM_MSK cpu_to_le16(1 << 3)
|
||||
#define IWL_POWER_FAST_PD cpu_to_le16(1 << 4)
|
||||
|
||||
struct iwl_powertable_cmd {
|
||||
__le16 flags;
|
||||
@ -2153,8 +2159,8 @@ struct iwl_ct_kill_config {
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#define SCAN_CHANNEL_TYPE_PASSIVE __constant_cpu_to_le32(0)
|
||||
#define SCAN_CHANNEL_TYPE_ACTIVE __constant_cpu_to_le32(1)
|
||||
#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
|
||||
#define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
|
||||
|
||||
/**
|
||||
* struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
|
||||
@ -2205,8 +2211,8 @@ struct iwl_ssid_ie {
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define PROBE_OPTION_MAX 0x14
|
||||
#define TX_CMD_LIFE_TIME_INFINITE __constant_cpu_to_le32(0xFFFFFFFF)
|
||||
#define IWL_GOOD_CRC_TH __constant_cpu_to_le16(1)
|
||||
#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
|
||||
#define IWL_GOOD_CRC_TH cpu_to_le16(1)
|
||||
#define IWL_MAX_SCAN_SIZE 1024
|
||||
|
||||
/*
|
||||
@ -2306,7 +2312,7 @@ struct iwl_scan_cmd {
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* Can abort will notify by complete notification with abort status. */
|
||||
#define CAN_ABORT_STATUS __constant_cpu_to_le32(0x1)
|
||||
#define CAN_ABORT_STATUS cpu_to_le32(0x1)
|
||||
/* complete notification statuses */
|
||||
#define ABORT_STATUS 0x2
|
||||
|
||||
@ -2568,8 +2574,8 @@ struct statistics_general {
|
||||
* STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
|
||||
* does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
|
||||
*/
|
||||
#define IWL_STATS_CONF_CLEAR_STATS __constant_cpu_to_le32(0x1) /* see above */
|
||||
#define IWL_STATS_CONF_DISABLE_NOTIF __constant_cpu_to_le32(0x2)/* see above */
|
||||
#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
|
||||
#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
|
||||
struct iwl_statistics_cmd {
|
||||
__le32 configuration_flags; /* IWL_STATS_CONF_* */
|
||||
} __attribute__ ((packed));
|
||||
@ -2589,8 +2595,8 @@ struct iwl_statistics_cmd {
|
||||
* appropriately so that each notification contains statistics for only the
|
||||
* one channel that has just been scanned.
|
||||
*/
|
||||
#define STATISTICS_REPLY_FLG_BAND_24G_MSK __constant_cpu_to_le32(0x2)
|
||||
#define STATISTICS_REPLY_FLG_FAT_MODE_MSK __constant_cpu_to_le32(0x8)
|
||||
#define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
|
||||
#define STATISTICS_REPLY_FLG_FAT_MODE_MSK cpu_to_le32(0x8)
|
||||
struct iwl_notif_statistics {
|
||||
__le32 flag;
|
||||
struct statistics_rx rx;
|
||||
@ -2806,8 +2812,8 @@ struct iwl4965_missed_beacon_notif {
|
||||
#define HD_OFDM_ENERGY_TH_IN_INDEX (10)
|
||||
|
||||
/* Control field in struct iwl_sensitivity_cmd */
|
||||
#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE __constant_cpu_to_le16(0)
|
||||
#define SENSITIVITY_CMD_CONTROL_WORK_TABLE __constant_cpu_to_le16(1)
|
||||
#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
|
||||
#define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
|
||||
|
||||
/**
|
||||
* struct iwl_sensitivity_cmd
|
||||
@ -2896,12 +2902,7 @@ enum {
|
||||
};
|
||||
|
||||
|
||||
struct iwl_cal_xtal_freq {
|
||||
u8 cap_pin1;
|
||||
u8 cap_pin2;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define IWL_CALIB_INIT_CFG_ALL __constant_cpu_to_le32(0xffffffff)
|
||||
#define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(0xffffffff)
|
||||
|
||||
struct iwl_calib_cfg_elmnt_s {
|
||||
__le32 is_enable;
|
||||
@ -2935,31 +2936,34 @@ struct iwl_calib_cmd {
|
||||
u8 data[0];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* "Differential Gain" opcode used in REPLY_PHY_CALIBRATION_CMD. */
|
||||
|
||||
/* IWL_PHY_CALIBRATE_DIFF_GAIN_CMD (7) */
|
||||
struct iwl_calib_diff_gain_cmd {
|
||||
u8 opCode; /* IWL_PHY_CALIBRATE_DIFF_GAIN_CMD (7) */
|
||||
u8 flags; /* not used */
|
||||
__le16 reserved;
|
||||
struct iwl_calib_hdr hdr;
|
||||
s8 diff_gain_a; /* see above */
|
||||
s8 diff_gain_b;
|
||||
s8 diff_gain_c;
|
||||
u8 reserved1;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
struct iwl_calib_chain_noise_reset_cmd {
|
||||
u8 op_code; /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
|
||||
u8 flags; /* not used */
|
||||
__le16 reserved;
|
||||
struct iwl_calib_xtal_freq_cmd {
|
||||
struct iwl_calib_hdr hdr;
|
||||
u8 cap_pin1;
|
||||
u8 cap_pin2;
|
||||
u8 pad[2];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
|
||||
struct iwl_calib_chain_noise_reset_cmd {
|
||||
struct iwl_calib_hdr hdr;
|
||||
u8 data[0];
|
||||
};
|
||||
|
||||
/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
|
||||
struct iwl_calib_chain_noise_gain_cmd {
|
||||
u8 op_code; /* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
|
||||
u8 flags; /* not used */
|
||||
__le16 reserved;
|
||||
struct iwl_calib_hdr hdr;
|
||||
u8 delta_gain_1;
|
||||
u8 delta_gain_2;
|
||||
__le16 reserved1;
|
||||
u8 pad[2];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
/******************************************************************************
|
||||
@ -3066,4 +3070,6 @@ struct iwl_rx_packet {
|
||||
|
||||
#define IWL_RX_FRAME_SIZE (4 + sizeof(struct iwl4965_rx_frame))
|
||||
|
||||
int iwl_agn_check_rxon_cmd(struct iwl_rxon_cmd *rxon);
|
||||
|
||||
#endif /* __iwl_commands_h__ */
|
||||
|
@ -808,7 +808,6 @@ int iwl_setup_mac(struct iwl_priv *priv)
|
||||
IEEE80211_HW_NOISE_DBM |
|
||||
IEEE80211_HW_AMPDU_AGGREGATION;
|
||||
hw->wiphy->interface_modes =
|
||||
BIT(NL80211_IFTYPE_AP) |
|
||||
BIT(NL80211_IFTYPE_STATION) |
|
||||
BIT(NL80211_IFTYPE_ADHOC);
|
||||
|
||||
@ -962,6 +961,30 @@ void iwl_uninit_drv(struct iwl_priv *priv)
|
||||
}
|
||||
EXPORT_SYMBOL(iwl_uninit_drv);
|
||||
|
||||
|
||||
void iwl_disable_interrupts(struct iwl_priv *priv)
|
||||
{
|
||||
clear_bit(STATUS_INT_ENABLED, &priv->status);
|
||||
|
||||
/* disable interrupts from uCode/NIC to host */
|
||||
iwl_write32(priv, CSR_INT_MASK, 0x00000000);
|
||||
|
||||
/* acknowledge/clear/reset any interrupts still pending
|
||||
* from uCode or flow handler (Rx/Tx DMA) */
|
||||
iwl_write32(priv, CSR_INT, 0xffffffff);
|
||||
iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
|
||||
IWL_DEBUG_ISR("Disabled interrupts\n");
|
||||
}
|
||||
EXPORT_SYMBOL(iwl_disable_interrupts);
|
||||
|
||||
void iwl_enable_interrupts(struct iwl_priv *priv)
|
||||
{
|
||||
IWL_DEBUG_ISR("Enabling interrupts\n");
|
||||
set_bit(STATUS_INT_ENABLED, &priv->status);
|
||||
iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
|
||||
}
|
||||
EXPORT_SYMBOL(iwl_enable_interrupts);
|
||||
|
||||
int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
|
||||
{
|
||||
u32 stat_flags = 0;
|
||||
@ -1337,6 +1360,7 @@ void iwl_rf_kill_ct_config(struct iwl_priv *priv)
|
||||
}
|
||||
EXPORT_SYMBOL(iwl_rf_kill_ct_config);
|
||||
|
||||
|
||||
/*
|
||||
* CARD_STATE_CMD
|
||||
*
|
||||
|
@ -164,9 +164,39 @@ struct iwl_mod_params {
|
||||
int restart_fw; /* def: 1 = restart firmware */
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_cfg
|
||||
* @fw_name_pre: Firmware filename prefix. The api version and extension
|
||||
* (.ucode) will be added to filename before loading from disk. The
|
||||
* filename is constructed as fw_name_pre<api>.ucode.
|
||||
* @ucode_api_max: Highest version of uCode API supported by driver.
|
||||
* @ucode_api_min: Lowest version of uCode API supported by driver.
|
||||
*
|
||||
* We enable the driver to be backward compatible wrt API version. The
|
||||
* driver specifies which APIs it supports (with @ucode_api_max being the
|
||||
* highest and @ucode_api_min the lowest). Firmware will only be loaded if
|
||||
* it has a supported API version. The firmware's API version will be
|
||||
* stored in @iwl_priv, enabling the driver to make runtime changes based
|
||||
* on firmware version used.
|
||||
*
|
||||
* For example,
|
||||
* if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
|
||||
* Driver interacts with Firmware API version >= 2.
|
||||
* } else {
|
||||
* Driver interacts with Firmware API version 1.
|
||||
* }
|
||||
*
|
||||
* The ideal usage of this infrastructure is to treat a new ucode API
|
||||
* release as a new hardware revision. That is, through utilizing the
|
||||
* iwl_hcmd_utils_ops etc. we accommodate different command structures
|
||||
* and flows between hardware versions (4965/5000) as well as their API
|
||||
* versions.
|
||||
*/
|
||||
struct iwl_cfg {
|
||||
const char *name;
|
||||
const char *fw_name;
|
||||
const char *fw_name_pre;
|
||||
const unsigned int ucode_api_max;
|
||||
const unsigned int ucode_api_min;
|
||||
unsigned int sku;
|
||||
int eeprom_size;
|
||||
u16 eeprom_ver;
|
||||
@ -312,6 +342,12 @@ int iwl_send_cmd_pdu_async(struct iwl_priv *priv, u8 id, u16 len,
|
||||
|
||||
int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd);
|
||||
|
||||
/*****************************************************
|
||||
* PCI *
|
||||
*****************************************************/
|
||||
void iwl_disable_interrupts(struct iwl_priv *priv);
|
||||
void iwl_enable_interrupts(struct iwl_priv *priv);
|
||||
|
||||
/*****************************************************
|
||||
* Error Handling Debugging
|
||||
******************************************************/
|
||||
|
@ -60,6 +60,7 @@ struct iwl_debugfs {
|
||||
struct dentry *file_rx_statistics;
|
||||
struct dentry *file_tx_statistics;
|
||||
struct dentry *file_log_event;
|
||||
struct dentry *file_channels;
|
||||
} dbgfs_data_files;
|
||||
struct dir_rf_files {
|
||||
struct dentry *file_disable_sensitivity;
|
||||
|
@ -348,12 +348,86 @@ static ssize_t iwl_dbgfs_log_event_write(struct file *file,
|
||||
return count;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static ssize_t iwl_dbgfs_channels_read(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct iwl_priv *priv = (struct iwl_priv *)file->private_data;
|
||||
struct ieee80211_channel *channels = NULL;
|
||||
const struct ieee80211_supported_band *supp_band = NULL;
|
||||
int pos = 0, i, bufsz = PAGE_SIZE;
|
||||
char *buf;
|
||||
ssize_t ret;
|
||||
|
||||
if (!test_bit(STATUS_GEO_CONFIGURED, &priv->status))
|
||||
return -EAGAIN;
|
||||
|
||||
buf = kzalloc(bufsz, GFP_KERNEL);
|
||||
if (!buf) {
|
||||
IWL_ERROR("Can not allocate Buffer\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);
|
||||
channels = supp_band->channels;
|
||||
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
"Displaying %d channels in 2.4GHz band 802.11bg):\n",
|
||||
supp_band->n_channels);
|
||||
|
||||
for (i = 0; i < supp_band->n_channels; i++)
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
"%d: %ddBm: BSS%s%s, %s.\n",
|
||||
ieee80211_frequency_to_channel(
|
||||
channels[i].center_freq),
|
||||
channels[i].max_power,
|
||||
channels[i].flags & IEEE80211_CHAN_RADAR ?
|
||||
" (IEEE 802.11h required)" : "",
|
||||
(!(channels[i].flags & IEEE80211_CHAN_NO_IBSS)
|
||||
|| (channels[i].flags &
|
||||
IEEE80211_CHAN_RADAR)) ? "" :
|
||||
", IBSS",
|
||||
channels[i].flags &
|
||||
IEEE80211_CHAN_PASSIVE_SCAN ?
|
||||
"passive only" : "active/passive");
|
||||
|
||||
supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
|
||||
channels = supp_band->channels;
|
||||
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
"Displaying %d channels in 5.2GHz band (802.11a)\n",
|
||||
supp_band->n_channels);
|
||||
|
||||
for (i = 0; i < supp_band->n_channels; i++)
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
"%d: %ddBm: BSS%s%s, %s.\n",
|
||||
ieee80211_frequency_to_channel(
|
||||
channels[i].center_freq),
|
||||
channels[i].max_power,
|
||||
channels[i].flags & IEEE80211_CHAN_RADAR ?
|
||||
" (IEEE 802.11h required)" : "",
|
||||
((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
|
||||
|| (channels[i].flags &
|
||||
IEEE80211_CHAN_RADAR)) ? "" :
|
||||
", IBSS",
|
||||
channels[i].flags &
|
||||
IEEE80211_CHAN_PASSIVE_SCAN ?
|
||||
"passive only" : "active/passive");
|
||||
|
||||
ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
|
||||
kfree(buf);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
DEBUGFS_READ_WRITE_FILE_OPS(sram);
|
||||
DEBUGFS_WRITE_FILE_OPS(log_event);
|
||||
DEBUGFS_READ_FILE_OPS(eeprom);
|
||||
DEBUGFS_READ_FILE_OPS(stations);
|
||||
DEBUGFS_READ_FILE_OPS(rx_statistics);
|
||||
DEBUGFS_READ_FILE_OPS(tx_statistics);
|
||||
DEBUGFS_READ_FILE_OPS(channels);
|
||||
|
||||
/*
|
||||
* Create the debugfs files and directories
|
||||
@ -387,6 +461,7 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
|
||||
DEBUGFS_ADD_FILE(stations, data);
|
||||
DEBUGFS_ADD_FILE(rx_statistics, data);
|
||||
DEBUGFS_ADD_FILE(tx_statistics, data);
|
||||
DEBUGFS_ADD_FILE(channels, data);
|
||||
DEBUGFS_ADD_BOOL(disable_sensitivity, rf, &priv->disable_sens_cal);
|
||||
DEBUGFS_ADD_BOOL(disable_chain_noise, rf,
|
||||
&priv->disable_chain_noise_cal);
|
||||
@ -415,6 +490,7 @@ void iwl_dbgfs_unregister(struct iwl_priv *priv)
|
||||
DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_sram);
|
||||
DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_log_event);
|
||||
DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_stations);
|
||||
DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_channels);
|
||||
DEBUGFS_REMOVE(priv->dbgfs->dir_data);
|
||||
DEBUGFS_REMOVE(priv->dbgfs->dbgfs_rf_files.file_disable_sensitivity);
|
||||
DEBUGFS_REMOVE(priv->dbgfs->dbgfs_rf_files.file_disable_chain_noise);
|
||||
|
@ -54,6 +54,7 @@ extern struct iwl_cfg iwl5100_agn_cfg;
|
||||
extern struct iwl_cfg iwl5350_agn_cfg;
|
||||
extern struct iwl_cfg iwl5100_bg_cfg;
|
||||
extern struct iwl_cfg iwl5100_abg_cfg;
|
||||
extern struct iwl_cfg iwl5150_agn_cfg;
|
||||
|
||||
/* CT-KILL constants */
|
||||
#define CT_KILL_THRESHOLD 110 /* in Celsius */
|
||||
@ -461,7 +462,7 @@ struct fw_desc {
|
||||
|
||||
/* uCode file layout */
|
||||
struct iwl_ucode {
|
||||
__le32 ver; /* major/minor/subminor */
|
||||
__le32 ver; /* major/minor/API/serial */
|
||||
__le32 inst_size; /* bytes of runtime instructions */
|
||||
__le32 data_size; /* bytes of runtime data */
|
||||
__le32 init_size; /* bytes of initialization instructions */
|
||||
@ -507,6 +508,7 @@ struct iwl_sensitivity_ranges {
|
||||
/**
|
||||
* struct iwl_hw_params
|
||||
* @max_txq_num: Max # Tx queues supported
|
||||
* @dma_chnl_num: Number of Tx DMA/FIFO channels
|
||||
* @scd_bc_tbls_size: size of scheduler byte count tables
|
||||
* @tx/rx_chains_num: Number of TX/RX chains
|
||||
* @valid_tx/rx_ant: usable antennas
|
||||
@ -524,7 +526,8 @@ struct iwl_sensitivity_ranges {
|
||||
* @struct iwl_sensitivity_ranges: range of sensitivity values
|
||||
*/
|
||||
struct iwl_hw_params {
|
||||
u16 max_txq_num;
|
||||
u8 max_txq_num;
|
||||
u8 dma_chnl_num;
|
||||
u16 scd_bc_tbls_size;
|
||||
u8 tx_chains_num;
|
||||
u8 rx_chains_num;
|
||||
@ -692,6 +695,7 @@ struct statistics_general_data {
|
||||
*/
|
||||
enum iwl_calib {
|
||||
IWL_CALIB_XTAL,
|
||||
IWL_CALIB_DC,
|
||||
IWL_CALIB_LO,
|
||||
IWL_CALIB_TX_IQ,
|
||||
IWL_CALIB_TX_IQ_PERD,
|
||||
@ -839,6 +843,8 @@ struct iwl_priv {
|
||||
u8 rev_id;
|
||||
|
||||
/* uCode images, save to reload in case of failure */
|
||||
u32 ucode_ver; /* version of ucode, copy of
|
||||
iwl_ucode.ver */
|
||||
struct fw_desc ucode_code; /* runtime inst */
|
||||
struct fw_desc ucode_data; /* runtime data original */
|
||||
struct fw_desc ucode_data_backup; /* runtime data save/restore */
|
||||
@ -1084,9 +1090,4 @@ static inline int is_channel_ibss(const struct iwl_channel_info *ch)
|
||||
return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
|
||||
}
|
||||
|
||||
extern const struct iwl_channel_info *iwl_get_channel_info(
|
||||
const struct iwl_priv *priv, enum ieee80211_band band, u16 channel);
|
||||
|
||||
/* Requires full declaration of iwl_priv before including */
|
||||
|
||||
#endif /* __iwl_dev_h__ */
|
||||
|
@ -147,6 +147,7 @@ struct iwl_eeprom_channel {
|
||||
/*5000 calibrations */
|
||||
#define EEPROM_5000_CALIB_ALL (INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
|
||||
#define EEPROM_5000_XTAL ((2*0x128) | EEPROM_5000_CALIB_ALL)
|
||||
#define EEPROM_5000_TEMPERATURE ((2*0x12A) | EEPROM_5000_CALIB_ALL)
|
||||
|
||||
/* 5000 links */
|
||||
#define EEPROM_5000_LINK_HOST (2*0x64)
|
||||
|
@ -611,7 +611,7 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv)
|
||||
*/
|
||||
void iwl_txq_ctx_stop(struct iwl_priv *priv)
|
||||
{
|
||||
int txq_id;
|
||||
int ch;
|
||||
unsigned long flags;
|
||||
|
||||
/* Turn off all Tx DMA fifos */
|
||||
@ -624,12 +624,11 @@ void iwl_txq_ctx_stop(struct iwl_priv *priv)
|
||||
priv->cfg->ops->lib->txq_set_sched(priv, 0);
|
||||
|
||||
/* Stop each Tx DMA channel, and wait for it to be idle */
|
||||
for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
|
||||
iwl_write_direct32(priv,
|
||||
FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
|
||||
for (ch = 0; ch < priv->hw_params.dma_chnl_num; ch++) {
|
||||
iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
|
||||
iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
|
||||
FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
|
||||
(txq_id), 200);
|
||||
FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
|
||||
200);
|
||||
}
|
||||
iwl_release_nic_access(priv);
|
||||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
@ -4311,35 +4311,6 @@ static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
|
||||
/* Safely ignore these bits for debug checks below */
|
||||
inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
|
||||
|
||||
/* HW RF KILL switch toggled (4965 only) */
|
||||
if (inta & CSR_INT_BIT_RF_KILL) {
|
||||
int hw_rf_kill = 0;
|
||||
if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
|
||||
CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
|
||||
hw_rf_kill = 1;
|
||||
|
||||
IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
|
||||
"RF_KILL bit toggled to %s.\n",
|
||||
hw_rf_kill ? "disable radio" : "enable radio");
|
||||
|
||||
/* Queue restart only if RF_KILL switch was set to "kill"
|
||||
* when we loaded driver, and is now set to "enable".
|
||||
* After we're Alive, RF_KILL gets handled by
|
||||
* iwl3945_rx_card_state_notif() */
|
||||
if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
|
||||
clear_bit(STATUS_RF_KILL_HW, &priv->status);
|
||||
queue_work(priv->workqueue, &priv->restart);
|
||||
}
|
||||
|
||||
handled |= CSR_INT_BIT_RF_KILL;
|
||||
}
|
||||
|
||||
/* Chip got too hot and stopped itself (4965 only) */
|
||||
if (inta & CSR_INT_BIT_CT_KILL) {
|
||||
IWL_ERROR("Microcode CT kill error detected.\n");
|
||||
handled |= CSR_INT_BIT_CT_KILL;
|
||||
}
|
||||
|
||||
/* Error detected by uCode */
|
||||
if (inta & CSR_INT_BIT_SW_ERR) {
|
||||
IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
|
||||
@ -4440,7 +4411,7 @@ static irqreturn_t iwl3945_isr(int irq, void *data)
|
||||
|
||||
if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
|
||||
/* Hardware disappeared */
|
||||
IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
|
||||
IWL_WARNING("HARDWARE GONE?? INTA == 0x%08x\n", inta);
|
||||
goto unplugged;
|
||||
}
|
||||
|
||||
@ -4814,17 +4785,33 @@ static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
|
||||
continue;
|
||||
}
|
||||
|
||||
if (!is_active || is_channel_passive(ch_info) ||
|
||||
(channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
|
||||
scan_ch->type = 0; /* passive */
|
||||
else
|
||||
scan_ch->type = 1; /* active */
|
||||
|
||||
if ((scan_ch->type & 1) && n_probes)
|
||||
scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
|
||||
|
||||
scan_ch->active_dwell = cpu_to_le16(active_dwell);
|
||||
scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
|
||||
/* If passive , set up for auto-switch
|
||||
* and use long active_dwell time.
|
||||
*/
|
||||
if (!is_active || is_channel_passive(ch_info) ||
|
||||
(channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
|
||||
scan_ch->type = 0; /* passive */
|
||||
if (IWL_UCODE_API(priv->ucode_ver) == 1)
|
||||
scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
|
||||
} else {
|
||||
scan_ch->type = 1; /* active */
|
||||
}
|
||||
|
||||
/* Set direct probe bits. These may be used both for active
|
||||
* scan channels (probes gets sent right away),
|
||||
* or for passive channels (probes get se sent only after
|
||||
* hearing clear Rx packet).*/
|
||||
if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
|
||||
if (n_probes)
|
||||
scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
|
||||
} else {
|
||||
/* uCode v1 does not allow setting direct probe bits on
|
||||
* passive channel. */
|
||||
if ((scan_ch->type & 1) && n_probes)
|
||||
scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
|
||||
}
|
||||
|
||||
/* Set txpower levels to defaults */
|
||||
scan_ch->tpc.dsp_atten = 110;
|
||||
@ -5325,25 +5312,41 @@ static void iwl3945_nic_start(struct iwl3945_priv *priv)
|
||||
static int iwl3945_read_ucode(struct iwl3945_priv *priv)
|
||||
{
|
||||
struct iwl3945_ucode *ucode;
|
||||
int ret = 0;
|
||||
int ret = -EINVAL, index;
|
||||
const struct firmware *ucode_raw;
|
||||
/* firmware file name contains uCode/driver compatibility version */
|
||||
const char *name = priv->cfg->fw_name;
|
||||
const char *name_pre = priv->cfg->fw_name_pre;
|
||||
const unsigned int api_max = priv->cfg->ucode_api_max;
|
||||
const unsigned int api_min = priv->cfg->ucode_api_min;
|
||||
char buf[25];
|
||||
u8 *src;
|
||||
size_t len;
|
||||
u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
|
||||
u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
|
||||
|
||||
/* Ask kernel firmware_class module to get the boot firmware off disk.
|
||||
* request_firmware() is synchronous, file is in memory on return. */
|
||||
ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
|
||||
if (ret < 0) {
|
||||
IWL_ERROR("%s firmware file req failed: Reason %d\n",
|
||||
name, ret);
|
||||
goto error;
|
||||
for (index = api_max; index >= api_min; index--) {
|
||||
sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
|
||||
ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
|
||||
if (ret < 0) {
|
||||
IWL_ERROR("%s firmware file req failed: Reason %d\n",
|
||||
buf, ret);
|
||||
if (ret == -ENOENT)
|
||||
continue;
|
||||
else
|
||||
goto error;
|
||||
} else {
|
||||
if (index < api_max)
|
||||
IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
|
||||
buf, api_max);
|
||||
IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
|
||||
buf, ucode_raw->size);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
|
||||
name, ucode_raw->size);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
|
||||
/* Make sure that we got at least our header! */
|
||||
if (ucode_raw->size < sizeof(*ucode)) {
|
||||
@ -5355,20 +5358,46 @@ static int iwl3945_read_ucode(struct iwl3945_priv *priv)
|
||||
/* Data from ucode file: header followed by uCode images */
|
||||
ucode = (void *)ucode_raw->data;
|
||||
|
||||
ver = le32_to_cpu(ucode->ver);
|
||||
priv->ucode_ver = le32_to_cpu(ucode->ver);
|
||||
api_ver = IWL_UCODE_API(priv->ucode_ver);
|
||||
inst_size = le32_to_cpu(ucode->inst_size);
|
||||
data_size = le32_to_cpu(ucode->data_size);
|
||||
init_size = le32_to_cpu(ucode->init_size);
|
||||
init_data_size = le32_to_cpu(ucode->init_data_size);
|
||||
boot_size = le32_to_cpu(ucode->boot_size);
|
||||
|
||||
IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
|
||||
/* api_ver should match the api version forming part of the
|
||||
* firmware filename ... but we don't check for that and only rely
|
||||
* on the API version read from firware header from here on forward */
|
||||
|
||||
if (api_ver < api_min || api_ver > api_max) {
|
||||
IWL_ERROR("Driver unable to support your firmware API. "
|
||||
"Driver supports v%u, firmware is v%u.\n",
|
||||
api_max, api_ver);
|
||||
priv->ucode_ver = 0;
|
||||
ret = -EINVAL;
|
||||
goto err_release;
|
||||
}
|
||||
if (api_ver != api_max)
|
||||
IWL_ERROR("Firmware has old API version. Expected %u, "
|
||||
"got %u. New firmware can be obtained "
|
||||
"from http://www.intellinuxwireless.org.\n",
|
||||
api_max, api_ver);
|
||||
|
||||
printk(KERN_INFO DRV_NAME " loaded firmware version %u.%u.%u.%u\n",
|
||||
IWL_UCODE_MAJOR(priv->ucode_ver),
|
||||
IWL_UCODE_MINOR(priv->ucode_ver),
|
||||
IWL_UCODE_API(priv->ucode_ver),
|
||||
IWL_UCODE_SERIAL(priv->ucode_ver));
|
||||
IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
|
||||
priv->ucode_ver);
|
||||
IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
|
||||
IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
|
||||
IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
|
||||
IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
|
||||
IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
|
||||
|
||||
|
||||
/* Verify size of file vs. image size info in file's header */
|
||||
if (ucode_raw->size < sizeof(*ucode) +
|
||||
inst_size + data_size + init_size +
|
||||
@ -7843,7 +7872,6 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
|
||||
IEEE80211_HW_NOISE_DBM;
|
||||
|
||||
hw->wiphy->interface_modes =
|
||||
BIT(NL80211_IFTYPE_AP) |
|
||||
BIT(NL80211_IFTYPE_STATION) |
|
||||
BIT(NL80211_IFTYPE_ADHOC);
|
||||
|
||||
@ -8328,7 +8356,7 @@ static void __exit iwl3945_exit(void)
|
||||
iwl3945_rate_control_unregister();
|
||||
}
|
||||
|
||||
MODULE_FIRMWARE("iwlwifi-3945" IWL3945_UCODE_API ".ucode");
|
||||
MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
|
||||
|
||||
module_param_named(antenna, iwl3945_param_antenna, int, 0444);
|
||||
MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
|
||||
|
@ -6,9 +6,6 @@ struct tx_radiotap_hdr {
|
||||
u8 txpower;
|
||||
u8 rts_retries;
|
||||
u8 data_retries;
|
||||
#if 0
|
||||
u8 pad[IEEE80211_RADIOTAP_HDRLEN - 12];
|
||||
#endif
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define TX_RADIOTAP_PRESENT ( \
|
||||
|
@ -85,7 +85,6 @@ struct p54_common {
|
||||
struct mutex conf_mutex;
|
||||
u8 mac_addr[ETH_ALEN];
|
||||
u8 bssid[ETH_ALEN];
|
||||
u16 mac_mode;
|
||||
struct pda_iq_autocal_entry *iq_autocal;
|
||||
unsigned int iq_autocal_len;
|
||||
struct pda_channel_output_limit *output_limit;
|
||||
@ -95,7 +94,6 @@ struct p54_common {
|
||||
bool use_short_slot;
|
||||
u16 rxhw;
|
||||
u8 version;
|
||||
u8 rx_antenna;
|
||||
unsigned int tx_hdr_len;
|
||||
unsigned int fw_var;
|
||||
unsigned int fw_interface;
|
||||
@ -115,6 +113,8 @@ struct p54_common {
|
||||
int noise;
|
||||
void *eeprom;
|
||||
struct completion eeprom_comp;
|
||||
u8 privacy_caps;
|
||||
u8 rx_keycache_size;
|
||||
};
|
||||
|
||||
int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb);
|
||||
|
@ -25,6 +25,9 @@
|
||||
#include "p54.h"
|
||||
#include "p54common.h"
|
||||
|
||||
static int modparam_nohwcrypt;
|
||||
module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
|
||||
MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
|
||||
MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
|
||||
MODULE_DESCRIPTION("Softmac Prism54 common code");
|
||||
MODULE_LICENSE("GPL");
|
||||
@ -155,21 +158,21 @@ int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
|
||||
priv->fw_interface = be32_to_cpup((__be32 *)
|
||||
bootrec->data);
|
||||
switch (priv->fw_interface) {
|
||||
case FW_FMAC:
|
||||
printk(KERN_INFO "p54: FreeMAC firmware\n");
|
||||
break;
|
||||
case FW_LM20:
|
||||
printk(KERN_INFO "p54: LM20 firmware\n");
|
||||
break;
|
||||
case FW_LM86:
|
||||
printk(KERN_INFO "p54: LM86 firmware\n");
|
||||
break;
|
||||
case FW_LM87:
|
||||
printk(KERN_INFO "p54: LM87 firmware\n");
|
||||
case FW_LM20:
|
||||
case FW_LM87: {
|
||||
char *iftype = (char *)bootrec->data;
|
||||
printk(KERN_INFO "%s: p54 detected a LM%c%c "
|
||||
"firmware\n",
|
||||
wiphy_name(dev->wiphy),
|
||||
iftype[2], iftype[3]);
|
||||
break;
|
||||
}
|
||||
case FW_FMAC:
|
||||
default:
|
||||
printk(KERN_INFO "p54: unknown firmware\n");
|
||||
break;
|
||||
printk(KERN_ERR "%s: unsupported firmware\n",
|
||||
wiphy_name(dev->wiphy));
|
||||
return -ENODEV;
|
||||
}
|
||||
break;
|
||||
case BR_CODE_COMPONENT_VERSION:
|
||||
@ -185,6 +188,8 @@ int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
|
||||
priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
|
||||
priv->headroom = desc->headroom;
|
||||
priv->tailroom = desc->tailroom;
|
||||
priv->privacy_caps = desc->privacy_caps;
|
||||
priv->rx_keycache_size = desc->rx_keycache_size;
|
||||
if (le32_to_cpu(bootrec->len) == 11)
|
||||
priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
|
||||
else
|
||||
@ -211,13 +216,15 @@ int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
|
||||
}
|
||||
|
||||
if (fw_version)
|
||||
printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
|
||||
fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
|
||||
printk(KERN_INFO "%s: FW rev %s - Softmac protocol %x.%x\n",
|
||||
wiphy_name(dev->wiphy), fw_version,
|
||||
priv->fw_var >> 8, priv->fw_var & 0xff);
|
||||
|
||||
if (priv->fw_var < 0x500)
|
||||
printk(KERN_INFO "p54: you are using an obsolete firmware. "
|
||||
printk(KERN_INFO "%s: you are using an obsolete firmware. "
|
||||
"visit http://wireless.kernel.org/en/users/Drivers/p54 "
|
||||
"and grab one for \"kernel >= 2.6.28\"!\n");
|
||||
"and grab one for \"kernel >= 2.6.28\"!\n",
|
||||
wiphy_name(dev->wiphy));
|
||||
|
||||
if (priv->fw_var >= 0x300) {
|
||||
/* Firmware supports QoS, use it! */
|
||||
@ -228,6 +235,16 @@ int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
|
||||
dev->queues = 4;
|
||||
}
|
||||
|
||||
if (!modparam_nohwcrypt)
|
||||
printk(KERN_INFO "%s: cryptographic accelerator "
|
||||
"WEP:%s, TKIP:%s, CCMP:%s\n",
|
||||
wiphy_name(dev->wiphy),
|
||||
(priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" :
|
||||
"no", (priv->privacy_caps & (BR_DESC_PRIV_CAP_TKIP |
|
||||
BR_DESC_PRIV_CAP_MICHAEL)) ? "YES" : "no",
|
||||
(priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP) ?
|
||||
"YES" : "no");
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(p54_parse_firmware);
|
||||
@ -384,8 +401,9 @@ static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
|
||||
err = p54_convert_rev1(dev, curve_data);
|
||||
break;
|
||||
default:
|
||||
printk(KERN_ERR "p54: unknown curve data "
|
||||
printk(KERN_ERR "%s: unknown curve data "
|
||||
"revision %d\n",
|
||||
wiphy_name(dev->wiphy),
|
||||
curve_data->cal_method_rev);
|
||||
err = -ENODEV;
|
||||
break;
|
||||
@ -445,7 +463,8 @@ static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
|
||||
case PDR_PER_CHANNEL_BASEBAND_REGISTERS:
|
||||
break;
|
||||
default:
|
||||
printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
|
||||
printk(KERN_INFO "%s: unknown eeprom code : 0x%x\n",
|
||||
wiphy_name(dev->wiphy),
|
||||
le16_to_cpu(entry->code));
|
||||
break;
|
||||
}
|
||||
@ -455,7 +474,8 @@ static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
|
||||
|
||||
if (!synth || !priv->iq_autocal || !priv->output_limit ||
|
||||
!priv->curve_data) {
|
||||
printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
|
||||
printk(KERN_ERR "%s: not all required entries found in eeprom!\n",
|
||||
wiphy_name(dev->wiphy));
|
||||
err = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
@ -500,7 +520,8 @@ static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
|
||||
priv->curve_data = NULL;
|
||||
}
|
||||
|
||||
printk(KERN_ERR "p54: eeprom parse failed!\n");
|
||||
printk(KERN_ERR "%s: eeprom parse failed!\n",
|
||||
wiphy_name(dev->wiphy));
|
||||
return err;
|
||||
}
|
||||
|
||||
@ -526,6 +547,12 @@ static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (hdr->decrypt_status == P54_DECRYPT_OK)
|
||||
rx_status.flag |= RX_FLAG_DECRYPTED;
|
||||
if ((hdr->decrypt_status == P54_DECRYPT_FAIL_MICHAEL) ||
|
||||
(hdr->decrypt_status == P54_DECRYPT_FAIL_TKIP))
|
||||
rx_status.flag |= RX_FLAG_MMIC_ERROR;
|
||||
|
||||
rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
|
||||
rx_status.noise = priv->noise;
|
||||
/* XX correct? */
|
||||
@ -652,6 +679,10 @@ static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
__skb_unlink(entry, &priv->tx_queue);
|
||||
spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
|
||||
|
||||
entry_hdr = (struct p54_hdr *) entry->data;
|
||||
entry_data = (struct p54_tx_data *) entry_hdr->data;
|
||||
priv->tx_stats[entry_data->hw_queue].len--;
|
||||
|
||||
if (unlikely(entry == priv->cached_beacon)) {
|
||||
kfree_skb(entry);
|
||||
priv->cached_beacon = NULL;
|
||||
@ -668,8 +699,6 @@ static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
|
||||
status.ampdu_ack_len) != 23);
|
||||
|
||||
entry_hdr = (struct p54_hdr *) entry->data;
|
||||
entry_data = (struct p54_tx_data *) entry_hdr->data;
|
||||
if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
|
||||
pad = entry_data->align[0];
|
||||
|
||||
@ -687,7 +716,6 @@ static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
}
|
||||
}
|
||||
|
||||
priv->tx_stats[entry_data->hw_queue].len--;
|
||||
if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
|
||||
(!payload->status))
|
||||
info->flags |= IEEE80211_TX_STAT_ACK;
|
||||
@ -717,7 +745,13 @@ static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
|
||||
if (!priv->eeprom)
|
||||
return ;
|
||||
|
||||
memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
|
||||
if (priv->fw_var >= 0x509) {
|
||||
memcpy(priv->eeprom, eeprom->v2.data,
|
||||
le16_to_cpu(eeprom->v2.len));
|
||||
} else {
|
||||
memcpy(priv->eeprom, eeprom->v1.data,
|
||||
le16_to_cpu(eeprom->v1.len));
|
||||
}
|
||||
|
||||
complete(&priv->eeprom_comp);
|
||||
}
|
||||
@ -918,12 +952,18 @@ int p54_read_eeprom(struct ieee80211_hw *dev)
|
||||
struct p54_hdr *hdr = NULL;
|
||||
struct p54_eeprom_lm86 *eeprom_hdr;
|
||||
struct sk_buff *skb;
|
||||
size_t eeprom_size = 0x2020, offset = 0, blocksize;
|
||||
size_t eeprom_size = 0x2020, offset = 0, blocksize, maxblocksize;
|
||||
int ret = -ENOMEM;
|
||||
void *eeprom = NULL;
|
||||
|
||||
skb = p54_alloc_skb(dev, 0x8000, sizeof(*hdr) + sizeof(*eeprom_hdr) +
|
||||
EEPROM_READBACK_LEN,
|
||||
maxblocksize = EEPROM_READBACK_LEN;
|
||||
if (priv->fw_var >= 0x509)
|
||||
maxblocksize -= 0xc;
|
||||
else
|
||||
maxblocksize -= 0x4;
|
||||
|
||||
skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL, sizeof(*hdr) +
|
||||
sizeof(*eeprom_hdr) + maxblocksize,
|
||||
P54_CONTROL_TYPE_EEPROM_READBACK, GFP_KERNEL);
|
||||
if (!skb)
|
||||
goto free;
|
||||
@ -935,12 +975,19 @@ int p54_read_eeprom(struct ieee80211_hw *dev)
|
||||
goto free;
|
||||
|
||||
eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
|
||||
sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN);
|
||||
sizeof(*eeprom_hdr) + maxblocksize);
|
||||
|
||||
while (eeprom_size) {
|
||||
blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
|
||||
eeprom_hdr->offset = cpu_to_le16(offset);
|
||||
eeprom_hdr->len = cpu_to_le16(blocksize);
|
||||
blocksize = min(eeprom_size, maxblocksize);
|
||||
if (priv->fw_var < 0x509) {
|
||||
eeprom_hdr->v1.offset = cpu_to_le16(offset);
|
||||
eeprom_hdr->v1.len = cpu_to_le16(blocksize);
|
||||
} else {
|
||||
eeprom_hdr->v2.offset = cpu_to_le32(offset);
|
||||
eeprom_hdr->v2.len = cpu_to_le16(blocksize);
|
||||
eeprom_hdr->v2.magic2 = 0xf;
|
||||
memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4);
|
||||
}
|
||||
priv->tx(dev, skb, 0);
|
||||
|
||||
if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
|
||||
@ -1004,6 +1051,38 @@ static int p54_sta_unlock(struct ieee80211_hw *dev, u8 *addr)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void p54_sta_notify_ps(struct ieee80211_hw *dev,
|
||||
enum sta_notify_ps_cmd notify_cmd,
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
switch (notify_cmd) {
|
||||
case STA_NOTIFY_AWAKE:
|
||||
p54_sta_unlock(dev, sta->addr);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void p54_sta_notify(struct ieee80211_hw *dev, struct ieee80211_vif *vif,
|
||||
enum sta_notify_cmd notify_cmd,
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
switch (notify_cmd) {
|
||||
case STA_NOTIFY_ADD:
|
||||
case STA_NOTIFY_REMOVE:
|
||||
/*
|
||||
* Notify the firmware that we don't want or we don't
|
||||
* need to buffer frames for this station anymore.
|
||||
*/
|
||||
|
||||
p54_sta_unlock(dev, sta->addr);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static int p54_tx_cancel(struct ieee80211_hw *dev, struct sk_buff *entry)
|
||||
{
|
||||
struct p54_common *priv = dev->priv;
|
||||
@ -1069,11 +1148,25 @@ static int p54_tx_fill(struct ieee80211_hw *dev, struct sk_buff *skb,
|
||||
if (info->control.sta)
|
||||
*aid = info->control.sta->aid;
|
||||
else
|
||||
*flags = P54_HDR_FLAG_DATA_OUT_NOCANCEL;
|
||||
*flags |= P54_HDR_FLAG_DATA_OUT_NOCANCEL;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static u8 p54_convert_algo(enum ieee80211_key_alg alg)
|
||||
{
|
||||
switch (alg) {
|
||||
case ALG_WEP:
|
||||
return P54_CRYPTO_WEP;
|
||||
case ALG_TKIP:
|
||||
return P54_CRYPTO_TKIPMICHAEL;
|
||||
case ALG_CCMP:
|
||||
return P54_CRYPTO_AESCCMP;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
{
|
||||
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
||||
@ -1082,9 +1175,9 @@ static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
struct p54_hdr *hdr;
|
||||
struct p54_tx_data *txhdr;
|
||||
size_t padding, len, tim_len = 0;
|
||||
int i, j, ridx;
|
||||
int i, j, ridx, ret;
|
||||
u16 hdr_flags = 0, aid = 0;
|
||||
u8 rate, queue;
|
||||
u8 rate, queue, crypt_offset = 0;
|
||||
u8 cts_rate = 0x20;
|
||||
u8 rc_flags;
|
||||
u8 calculated_tries[4];
|
||||
@ -1092,28 +1185,30 @@ static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
|
||||
queue = skb_get_queue_mapping(skb);
|
||||
|
||||
if (p54_tx_fill(dev, skb, info, &queue, &tim_len, &hdr_flags, &aid)) {
|
||||
current_queue = &priv->tx_stats[queue];
|
||||
if (unlikely(current_queue->len > current_queue->limit))
|
||||
return NETDEV_TX_BUSY;
|
||||
current_queue->len++;
|
||||
current_queue->count++;
|
||||
if (current_queue->len == current_queue->limit)
|
||||
ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
|
||||
}
|
||||
ret = p54_tx_fill(dev, skb, info, &queue, &tim_len, &hdr_flags, &aid);
|
||||
current_queue = &priv->tx_stats[queue];
|
||||
if (unlikely((current_queue->len > current_queue->limit) && ret))
|
||||
return NETDEV_TX_BUSY;
|
||||
current_queue->len++;
|
||||
current_queue->count++;
|
||||
if ((current_queue->len == current_queue->limit) && ret)
|
||||
ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
|
||||
|
||||
padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
|
||||
len = skb->len;
|
||||
|
||||
if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT) {
|
||||
if (info->control.sta)
|
||||
if (p54_sta_unlock(dev, info->control.sta->addr)) {
|
||||
if (current_queue) {
|
||||
current_queue->len--;
|
||||
current_queue->count--;
|
||||
}
|
||||
return NETDEV_TX_BUSY;
|
||||
}
|
||||
if (info->control.hw_key) {
|
||||
crypt_offset = ieee80211_get_hdrlen_from_skb(skb);
|
||||
if (info->control.hw_key->alg == ALG_TKIP) {
|
||||
u8 *iv = (u8 *)(skb->data + crypt_offset);
|
||||
/*
|
||||
* The firmware excepts that the IV has to have
|
||||
* this special format
|
||||
*/
|
||||
iv[1] = iv[0];
|
||||
iv[0] = iv[2];
|
||||
iv[2] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
txhdr = (struct p54_tx_data *) skb_push(skb, sizeof(*txhdr) + padding);
|
||||
@ -1121,7 +1216,6 @@ static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
|
||||
if (padding)
|
||||
hdr_flags |= P54_HDR_FLAG_DATA_ALIGN;
|
||||
hdr->len = cpu_to_le16(len);
|
||||
hdr->type = cpu_to_le16(aid);
|
||||
hdr->rts_tries = info->control.rates[0].count;
|
||||
|
||||
@ -1196,10 +1290,27 @@ static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
/* TODO: enable bursting */
|
||||
hdr->flags = cpu_to_le16(hdr_flags);
|
||||
hdr->tries = ridx;
|
||||
txhdr->crypt_offset = 0;
|
||||
txhdr->rts_rate_idx = 0;
|
||||
txhdr->key_type = 0;
|
||||
txhdr->key_len = 0;
|
||||
if (info->control.hw_key) {
|
||||
crypt_offset += info->control.hw_key->iv_len;
|
||||
txhdr->key_type = p54_convert_algo(info->control.hw_key->alg);
|
||||
txhdr->key_len = min((u8)16, info->control.hw_key->keylen);
|
||||
memcpy(txhdr->key, info->control.hw_key->key, txhdr->key_len);
|
||||
if (info->control.hw_key->alg == ALG_TKIP) {
|
||||
if (unlikely(skb_tailroom(skb) < 12))
|
||||
goto err;
|
||||
/* reserve space for the MIC key */
|
||||
len += 8;
|
||||
memcpy(skb_put(skb, 8), &(info->control.hw_key->key
|
||||
[NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY]), 8);
|
||||
}
|
||||
/* reserve some space for ICV */
|
||||
len += info->control.hw_key->icv_len;
|
||||
} else {
|
||||
txhdr->key_type = 0;
|
||||
txhdr->key_len = 0;
|
||||
}
|
||||
txhdr->crypt_offset = crypt_offset;
|
||||
txhdr->hw_queue = queue;
|
||||
if (current_queue)
|
||||
txhdr->backlog = current_queue->len;
|
||||
@ -1213,24 +1324,28 @@ static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
if (padding)
|
||||
txhdr->align[0] = padding;
|
||||
|
||||
hdr->len = cpu_to_le16(len);
|
||||
/* modifies skb->cb and with it info, so must be last! */
|
||||
if (unlikely(p54_assign_address(dev, skb, hdr, skb->len + tim_len))) {
|
||||
skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
|
||||
if (current_queue) {
|
||||
current_queue->len--;
|
||||
current_queue->count--;
|
||||
}
|
||||
return NETDEV_TX_BUSY;
|
||||
}
|
||||
if (unlikely(p54_assign_address(dev, skb, hdr, skb->len + tim_len)))
|
||||
goto err;
|
||||
priv->tx(dev, skb, 0);
|
||||
return 0;
|
||||
|
||||
err:
|
||||
skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
|
||||
if (current_queue) {
|
||||
current_queue->len--;
|
||||
current_queue->count--;
|
||||
}
|
||||
return NETDEV_TX_BUSY;
|
||||
}
|
||||
|
||||
static int p54_setup_mac(struct ieee80211_hw *dev, u16 mode, const u8 *bssid)
|
||||
static int p54_setup_mac(struct ieee80211_hw *dev)
|
||||
{
|
||||
struct p54_common *priv = dev->priv;
|
||||
struct sk_buff *skb;
|
||||
struct p54_setup_mac *setup;
|
||||
u16 mode;
|
||||
|
||||
skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup) +
|
||||
sizeof(struct p54_hdr), P54_CONTROL_TYPE_SETUP,
|
||||
@ -1239,14 +1354,31 @@ static int p54_setup_mac(struct ieee80211_hw *dev, u16 mode, const u8 *bssid)
|
||||
return -ENOMEM;
|
||||
|
||||
setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
|
||||
priv->mac_mode = mode;
|
||||
if (dev->conf.radio_enabled) {
|
||||
switch (priv->mode) {
|
||||
case NL80211_IFTYPE_STATION:
|
||||
mode = P54_FILTER_TYPE_STATION;
|
||||
break;
|
||||
case NL80211_IFTYPE_AP:
|
||||
mode = P54_FILTER_TYPE_AP;
|
||||
break;
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
case NL80211_IFTYPE_MESH_POINT:
|
||||
mode = P54_FILTER_TYPE_IBSS;
|
||||
break;
|
||||
default:
|
||||
mode = P54_FILTER_TYPE_NONE;
|
||||
break;
|
||||
}
|
||||
if (priv->filter_flags & FIF_PROMISC_IN_BSS)
|
||||
mode |= P54_FILTER_TYPE_TRANSPARENT;
|
||||
} else
|
||||
mode = P54_FILTER_TYPE_RX_DISABLED;
|
||||
|
||||
setup->mac_mode = cpu_to_le16(mode);
|
||||
memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
|
||||
if (!bssid)
|
||||
memset(setup->bssid, ~0, ETH_ALEN);
|
||||
else
|
||||
memcpy(setup->bssid, bssid, ETH_ALEN);
|
||||
setup->rx_antenna = priv->rx_antenna;
|
||||
memcpy(setup->bssid, priv->bssid, ETH_ALEN);
|
||||
setup->rx_antenna = 2; /* automatic */
|
||||
setup->rx_align = 0;
|
||||
if (priv->fw_var < 0x500) {
|
||||
setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
|
||||
@ -1275,7 +1407,8 @@ static int p54_setup_mac(struct ieee80211_hw *dev, u16 mode, const u8 *bssid)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int p54_set_freq(struct ieee80211_hw *dev, u16 frequency)
|
||||
static int p54_scan(struct ieee80211_hw *dev, u16 mode, u16 dwell,
|
||||
u16 frequency)
|
||||
{
|
||||
struct p54_common *priv = dev->priv;
|
||||
struct sk_buff *skb;
|
||||
@ -1292,8 +1425,8 @@ static int p54_set_freq(struct ieee80211_hw *dev, u16 frequency)
|
||||
|
||||
chan = (struct p54_scan *) skb_put(skb, sizeof(*chan));
|
||||
memset(chan->padding1, 0, sizeof(chan->padding1));
|
||||
chan->mode = cpu_to_le16(P54_SCAN_EXIT);
|
||||
chan->dwell = cpu_to_le16(0x0);
|
||||
chan->mode = cpu_to_le16(mode);
|
||||
chan->dwell = cpu_to_le16(dwell);
|
||||
|
||||
for (i = 0; i < priv->iq_autocal_len; i++) {
|
||||
if (priv->iq_autocal[i].freq != freq)
|
||||
@ -1446,28 +1579,23 @@ static int p54_beacon_tim(struct sk_buff *skb)
|
||||
struct ieee80211_mgmt *mgmt = (void *)skb->data;
|
||||
u8 *pos, *end;
|
||||
|
||||
if (skb->len <= sizeof(mgmt)) {
|
||||
printk(KERN_ERR "p54: beacon is too short!\n");
|
||||
if (skb->len <= sizeof(mgmt))
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pos = (u8 *)mgmt->u.beacon.variable;
|
||||
end = skb->data + skb->len;
|
||||
while (pos < end) {
|
||||
if (pos + 2 + pos[1] > end) {
|
||||
printk(KERN_ERR "p54: parsing beacon failed\n");
|
||||
if (pos + 2 + pos[1] > end)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (pos[0] == WLAN_EID_TIM) {
|
||||
u8 dtim_len = pos[1];
|
||||
u8 dtim_period = pos[3];
|
||||
u8 *next = pos + 2 + dtim_len;
|
||||
|
||||
if (dtim_len < 3) {
|
||||
printk(KERN_ERR "p54: invalid dtim len!\n");
|
||||
if (dtim_len < 3)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
memmove(pos, next, end - next);
|
||||
|
||||
if (dtim_len > 3)
|
||||
@ -1536,10 +1664,14 @@ static int p54_start(struct ieee80211_hw *dev)
|
||||
err = p54_init_stats(dev);
|
||||
if (err)
|
||||
goto out;
|
||||
err = p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
|
||||
if (err)
|
||||
goto out;
|
||||
|
||||
memset(priv->bssid, ~0, ETH_ALEN);
|
||||
priv->mode = NL80211_IFTYPE_MONITOR;
|
||||
err = p54_setup_mac(dev);
|
||||
if (err) {
|
||||
priv->mode = NL80211_IFTYPE_UNSPECIFIED;
|
||||
goto out;
|
||||
}
|
||||
|
||||
out:
|
||||
mutex_unlock(&priv->conf_mutex);
|
||||
@ -1592,27 +1724,8 @@ static int p54_add_interface(struct ieee80211_hw *dev,
|
||||
}
|
||||
|
||||
memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
|
||||
|
||||
p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
|
||||
|
||||
switch (conf->type) {
|
||||
case NL80211_IFTYPE_STATION:
|
||||
p54_setup_mac(dev, P54_FILTER_TYPE_STATION, NULL);
|
||||
break;
|
||||
case NL80211_IFTYPE_AP:
|
||||
p54_setup_mac(dev, P54_FILTER_TYPE_AP, priv->mac_addr);
|
||||
break;
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
case NL80211_IFTYPE_MESH_POINT:
|
||||
p54_setup_mac(dev, P54_FILTER_TYPE_IBSS, NULL);
|
||||
break;
|
||||
default:
|
||||
BUG(); /* impossible */
|
||||
break;
|
||||
}
|
||||
|
||||
p54_setup_mac(dev);
|
||||
p54_set_leds(dev, 1, 0, 0);
|
||||
|
||||
mutex_unlock(&priv->conf_mutex);
|
||||
return 0;
|
||||
}
|
||||
@ -1625,9 +1738,10 @@ static void p54_remove_interface(struct ieee80211_hw *dev,
|
||||
mutex_lock(&priv->conf_mutex);
|
||||
if (priv->cached_beacon)
|
||||
p54_tx_cancel(dev, priv->cached_beacon);
|
||||
p54_setup_mac(dev, P54_FILTER_TYPE_NONE, NULL);
|
||||
priv->mode = NL80211_IFTYPE_MONITOR;
|
||||
memset(priv->mac_addr, 0, ETH_ALEN);
|
||||
memset(priv->bssid, 0, ETH_ALEN);
|
||||
p54_setup_mac(dev);
|
||||
mutex_unlock(&priv->conf_mutex);
|
||||
}
|
||||
|
||||
@ -1638,11 +1752,21 @@ static int p54_config(struct ieee80211_hw *dev, u32 changed)
|
||||
struct ieee80211_conf *conf = &dev->conf;
|
||||
|
||||
mutex_lock(&priv->conf_mutex);
|
||||
priv->rx_antenna = 2; /* automatic */
|
||||
priv->output_power = conf->power_level << 2;
|
||||
ret = p54_set_freq(dev, conf->channel->center_freq);
|
||||
if (!ret)
|
||||
ret = p54_set_edcf(dev);
|
||||
if (changed & IEEE80211_CONF_CHANGE_POWER)
|
||||
priv->output_power = conf->power_level << 2;
|
||||
if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
|
||||
ret = p54_setup_mac(dev);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
|
||||
ret = p54_scan(dev, P54_SCAN_EXIT, 0,
|
||||
conf->channel->center_freq);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
|
||||
out:
|
||||
mutex_unlock(&priv->conf_mutex);
|
||||
return ret;
|
||||
}
|
||||
@ -1655,36 +1779,31 @@ static int p54_config_interface(struct ieee80211_hw *dev,
|
||||
int ret = 0;
|
||||
|
||||
mutex_lock(&priv->conf_mutex);
|
||||
switch (priv->mode) {
|
||||
case NL80211_IFTYPE_STATION:
|
||||
ret = p54_setup_mac(dev, P54_FILTER_TYPE_STATION, conf->bssid);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = p54_set_leds(dev, 1,
|
||||
!is_multicast_ether_addr(conf->bssid), 0);
|
||||
if (ret)
|
||||
goto out;
|
||||
if (conf->changed & IEEE80211_IFCC_BSSID) {
|
||||
memcpy(priv->bssid, conf->bssid, ETH_ALEN);
|
||||
break;
|
||||
case NL80211_IFTYPE_AP:
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
case NL80211_IFTYPE_MESH_POINT:
|
||||
memcpy(priv->bssid, conf->bssid, ETH_ALEN);
|
||||
ret = p54_set_freq(dev, dev->conf.channel->center_freq);
|
||||
ret = p54_setup_mac(dev);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = p54_setup_mac(dev, priv->mac_mode, priv->bssid);
|
||||
if (ret)
|
||||
goto out;
|
||||
if (conf->changed & IEEE80211_IFCC_BEACON) {
|
||||
ret = p54_beacon_update(dev, vif);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = p54_set_edcf(dev);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
if (conf->changed & IEEE80211_IFCC_BEACON) {
|
||||
ret = p54_scan(dev, P54_SCAN_EXIT, 0,
|
||||
dev->conf.channel->center_freq);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = p54_setup_mac(dev);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = p54_beacon_update(dev, vif);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = p54_set_edcf(dev);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = p54_set_leds(dev, 1, !is_multicast_ether_addr(priv->bssid), 0);
|
||||
|
||||
out:
|
||||
mutex_unlock(&priv->conf_mutex);
|
||||
return ret;
|
||||
@ -1697,25 +1816,14 @@ static void p54_configure_filter(struct ieee80211_hw *dev,
|
||||
{
|
||||
struct p54_common *priv = dev->priv;
|
||||
|
||||
*total_flags &= FIF_BCN_PRBRESP_PROMISC |
|
||||
FIF_PROMISC_IN_BSS |
|
||||
FIF_FCSFAIL;
|
||||
*total_flags &= FIF_PROMISC_IN_BSS |
|
||||
(*total_flags & FIF_PROMISC_IN_BSS) ?
|
||||
FIF_FCSFAIL : 0;
|
||||
|
||||
priv->filter_flags = *total_flags;
|
||||
|
||||
if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
|
||||
if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
|
||||
p54_setup_mac(dev, priv->mac_mode, NULL);
|
||||
else
|
||||
p54_setup_mac(dev, priv->mac_mode, priv->bssid);
|
||||
}
|
||||
|
||||
if (changed_flags & FIF_PROMISC_IN_BSS) {
|
||||
if (*total_flags & FIF_PROMISC_IN_BSS)
|
||||
p54_setup_mac(dev, priv->mac_mode | 0x8, NULL);
|
||||
else
|
||||
p54_setup_mac(dev, priv->mac_mode & ~0x8, priv->bssid);
|
||||
}
|
||||
if (changed_flags & FIF_PROMISC_IN_BSS)
|
||||
p54_setup_mac(dev);
|
||||
}
|
||||
|
||||
static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
|
||||
@ -1812,21 +1920,106 @@ static void p54_bss_info_changed(struct ieee80211_hw *dev,
|
||||
priv->basic_rate_mask = (info->basic_rates << 4);
|
||||
else
|
||||
priv->basic_rate_mask = info->basic_rates;
|
||||
p54_setup_mac(dev, priv->mac_mode, priv->bssid);
|
||||
p54_setup_mac(dev);
|
||||
if (priv->fw_var >= 0x500)
|
||||
p54_set_freq(dev, dev->conf.channel->center_freq);
|
||||
p54_scan(dev, P54_SCAN_EXIT, 0,
|
||||
dev->conf.channel->center_freq);
|
||||
}
|
||||
if (changed & BSS_CHANGED_ASSOC) {
|
||||
if (info->assoc) {
|
||||
priv->aid = info->aid;
|
||||
priv->wakeup_timer = info->beacon_int *
|
||||
info->dtim_period * 5;
|
||||
p54_setup_mac(dev, priv->mac_mode, priv->bssid);
|
||||
p54_setup_mac(dev);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static int p54_set_key(struct ieee80211_hw *dev, enum set_key_cmd cmd,
|
||||
const u8 *local_address, const u8 *address,
|
||||
struct ieee80211_key_conf *key)
|
||||
{
|
||||
struct p54_common *priv = dev->priv;
|
||||
struct sk_buff *skb;
|
||||
struct p54_keycache *rxkey;
|
||||
u8 algo = 0;
|
||||
|
||||
if (modparam_nohwcrypt)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (cmd == DISABLE_KEY)
|
||||
algo = 0;
|
||||
else {
|
||||
switch (key->alg) {
|
||||
case ALG_TKIP:
|
||||
if (!(priv->privacy_caps & (BR_DESC_PRIV_CAP_MICHAEL |
|
||||
BR_DESC_PRIV_CAP_TKIP)))
|
||||
return -EOPNOTSUPP;
|
||||
key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
|
||||
algo = P54_CRYPTO_TKIPMICHAEL;
|
||||
break;
|
||||
case ALG_WEP:
|
||||
if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_WEP))
|
||||
return -EOPNOTSUPP;
|
||||
key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
|
||||
algo = P54_CRYPTO_WEP;
|
||||
break;
|
||||
case ALG_CCMP:
|
||||
if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP))
|
||||
return -EOPNOTSUPP;
|
||||
key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
|
||||
algo = P54_CRYPTO_AESCCMP;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
if (key->keyidx > priv->rx_keycache_size) {
|
||||
/*
|
||||
* The device supports the choosen algorithm, but the firmware
|
||||
* does not provide enough key slots to store all of them.
|
||||
* So, incoming frames have to be decoded by the mac80211 stack,
|
||||
* but we can still offload encryption for outgoing frames.
|
||||
*/
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
mutex_lock(&priv->conf_mutex);
|
||||
skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey) +
|
||||
sizeof(struct p54_hdr), P54_CONTROL_TYPE_RX_KEYCACHE,
|
||||
GFP_ATOMIC);
|
||||
if (!skb) {
|
||||
mutex_unlock(&priv->conf_mutex);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* TODO: some devices have 4 more free slots for rx keys */
|
||||
rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
|
||||
rxkey->entry = key->keyidx;
|
||||
rxkey->key_id = key->keyidx;
|
||||
rxkey->key_type = algo;
|
||||
if (address)
|
||||
memcpy(rxkey->mac, address, ETH_ALEN);
|
||||
else
|
||||
memset(rxkey->mac, ~0, ETH_ALEN);
|
||||
if (key->alg != ALG_TKIP) {
|
||||
rxkey->key_len = min((u8)16, key->keylen);
|
||||
memcpy(rxkey->key, key->key, rxkey->key_len);
|
||||
} else {
|
||||
rxkey->key_len = 24;
|
||||
memcpy(rxkey->key, key->key, 16);
|
||||
memcpy(&(rxkey->key[16]), &(key->key
|
||||
[NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8);
|
||||
}
|
||||
|
||||
priv->tx(dev, skb, 1);
|
||||
mutex_unlock(&priv->conf_mutex);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct ieee80211_ops p54_ops = {
|
||||
.tx = p54_tx,
|
||||
.start = p54_start,
|
||||
@ -1834,6 +2027,9 @@ static const struct ieee80211_ops p54_ops = {
|
||||
.add_interface = p54_add_interface,
|
||||
.remove_interface = p54_remove_interface,
|
||||
.set_tim = p54_set_tim,
|
||||
.sta_notify_ps = p54_sta_notify_ps,
|
||||
.sta_notify = p54_sta_notify,
|
||||
.set_key = p54_set_key,
|
||||
.config = p54_config,
|
||||
.config_interface = p54_config_interface,
|
||||
.bss_info_changed = p54_bss_info_changed,
|
||||
|
@ -246,9 +246,21 @@ struct memrecord {
|
||||
};
|
||||
|
||||
struct p54_eeprom_lm86 {
|
||||
__le16 offset;
|
||||
__le16 len;
|
||||
u8 data[0];
|
||||
union {
|
||||
struct {
|
||||
__le16 offset;
|
||||
__le16 len;
|
||||
u8 data[0];
|
||||
} v1;
|
||||
struct {
|
||||
__le32 offset;
|
||||
__le16 len;
|
||||
u8 magic2;
|
||||
u8 pad;
|
||||
u8 magic[4];
|
||||
u8 data[0];
|
||||
} v2;
|
||||
} __attribute__ ((packed));
|
||||
} __attribute__ ((packed));
|
||||
|
||||
enum p54_rx_decrypt_status {
|
||||
@ -302,7 +314,7 @@ enum p54_frame_sent_status {
|
||||
P54_TX_OK = 0,
|
||||
P54_TX_FAILED,
|
||||
P54_TX_PSM,
|
||||
P54_TX_PSM_CANCELLED
|
||||
P54_TX_PSM_CANCELLED = 4
|
||||
};
|
||||
|
||||
struct p54_frame_sent {
|
||||
|
@ -244,13 +244,13 @@ static void p54u_tx_3887(struct ieee80211_hw *dev, struct sk_buff *skb,
|
||||
usb_submit_urb(data_urb, GFP_ATOMIC);
|
||||
}
|
||||
|
||||
static __le32 p54u_lm87_chksum(const u32 *data, size_t length)
|
||||
static __le32 p54u_lm87_chksum(const __le32 *data, size_t length)
|
||||
{
|
||||
u32 chk = 0;
|
||||
|
||||
length >>= 2;
|
||||
while (length--) {
|
||||
chk ^= *data++;
|
||||
chk ^= le32_to_cpu(*data++);
|
||||
chk = (chk >> 5) ^ (chk << 3);
|
||||
}
|
||||
|
||||
@ -270,7 +270,7 @@ static void p54u_tx_lm87(struct ieee80211_hw *dev, struct sk_buff *skb,
|
||||
if (!data_urb)
|
||||
return;
|
||||
|
||||
checksum = p54u_lm87_chksum((u32 *)skb->data, skb->len);
|
||||
checksum = p54u_lm87_chksum((__le32 *)skb->data, skb->len);
|
||||
hdr = (struct lm87_tx_hdr *)skb_push(skb, sizeof(*hdr));
|
||||
hdr->chksum = checksum;
|
||||
hdr->device_addr = addr;
|
||||
@ -405,7 +405,8 @@ static int p54u_upload_firmware_3887(struct ieee80211_hw *dev)
|
||||
|
||||
tmp = buf = kmalloc(P54U_FW_BLOCK, GFP_KERNEL);
|
||||
if (!buf) {
|
||||
printk(KERN_ERR "p54usb: cannot allocate firmware upload buffer!\n");
|
||||
dev_err(&priv->udev->dev, "(p54usb) cannot allocate firmware"
|
||||
"upload buffer!\n");
|
||||
err = -ENOMEM;
|
||||
goto err_bufalloc;
|
||||
}
|
||||
@ -413,13 +414,14 @@ static int p54u_upload_firmware_3887(struct ieee80211_hw *dev)
|
||||
memcpy(buf, start_string, 4);
|
||||
err = p54u_bulk_msg(priv, P54U_PIPE_DATA, buf, 4);
|
||||
if (err) {
|
||||
printk(KERN_ERR "p54usb: reset failed! (%d)\n", err);
|
||||
dev_err(&priv->udev->dev, "(p54usb) reset failed! (%d)\n", err);
|
||||
goto err_reset;
|
||||
}
|
||||
|
||||
err = request_firmware(&fw_entry, "isl3887usb", &priv->udev->dev);
|
||||
if (err) {
|
||||
printk(KERN_ERR "p54usb: cannot find firmware (isl3887usb)\n");
|
||||
dev_err(&priv->udev->dev, "p54usb: cannot find firmware "
|
||||
"(isl3887usb)\n");
|
||||
err = request_firmware(&fw_entry, "isl3887usb_bare",
|
||||
&priv->udev->dev);
|
||||
if (err)
|
||||
@ -474,7 +476,8 @@ static int p54u_upload_firmware_3887(struct ieee80211_hw *dev)
|
||||
|
||||
err = p54u_bulk_msg(priv, P54U_PIPE_DATA, buf, block_size);
|
||||
if (err) {
|
||||
printk(KERN_ERR "p54usb: firmware upload failed!\n");
|
||||
dev_err(&priv->udev->dev, "(p54usb) firmware "
|
||||
"upload failed!\n");
|
||||
goto err_upload_failed;
|
||||
}
|
||||
|
||||
@ -485,10 +488,9 @@ static int p54u_upload_firmware_3887(struct ieee80211_hw *dev)
|
||||
*((__le32 *)buf) = cpu_to_le32(~crc32_le(~0, fw_entry->data, fw_entry->size));
|
||||
err = p54u_bulk_msg(priv, P54U_PIPE_DATA, buf, sizeof(u32));
|
||||
if (err) {
|
||||
printk(KERN_ERR "p54usb: firmware upload failed!\n");
|
||||
dev_err(&priv->udev->dev, "(p54usb) firmware upload failed!\n");
|
||||
goto err_upload_failed;
|
||||
}
|
||||
|
||||
timeout = jiffies + msecs_to_jiffies(1000);
|
||||
while (!(err = usb_bulk_msg(priv->udev,
|
||||
usb_rcvbulkpipe(priv->udev, P54U_PIPE_DATA), buf, 128, &alen, 1000))) {
|
||||
@ -496,25 +498,27 @@ static int p54u_upload_firmware_3887(struct ieee80211_hw *dev)
|
||||
break;
|
||||
|
||||
if (alen > 5 && !memcmp(buf, "ERROR", 5)) {
|
||||
printk(KERN_INFO "p54usb: firmware upload failed!\n");
|
||||
err = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
if (time_after(jiffies, timeout)) {
|
||||
printk(KERN_ERR "p54usb: firmware boot timed out!\n");
|
||||
dev_err(&priv->udev->dev, "(p54usb) firmware boot "
|
||||
"timed out!\n");
|
||||
err = -ETIMEDOUT;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (err)
|
||||
if (err) {
|
||||
dev_err(&priv->udev->dev, "(p54usb) firmware upload failed!\n");
|
||||
goto err_upload_failed;
|
||||
}
|
||||
|
||||
buf[0] = 'g';
|
||||
buf[1] = '\r';
|
||||
err = p54u_bulk_msg(priv, P54U_PIPE_DATA, buf, 2);
|
||||
if (err) {
|
||||
printk(KERN_ERR "p54usb: firmware boot failed!\n");
|
||||
dev_err(&priv->udev->dev, "(p54usb) firmware boot failed!\n");
|
||||
goto err_upload_failed;
|
||||
}
|
||||
|
||||
@ -554,13 +558,15 @@ static int p54u_upload_firmware_net2280(struct ieee80211_hw *dev)
|
||||
|
||||
buf = kmalloc(512, GFP_KERNEL);
|
||||
if (!buf) {
|
||||
printk(KERN_ERR "p54usb: firmware buffer alloc failed!\n");
|
||||
dev_err(&priv->udev->dev, "(p54usb) firmware buffer "
|
||||
"alloc failed!\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
err = request_firmware(&fw_entry, "isl3886usb", &priv->udev->dev);
|
||||
if (err) {
|
||||
printk(KERN_ERR "p54usb: cannot find firmware (isl3886usb)\n");
|
||||
dev_err(&priv->udev->dev, "(p54usb) cannot find firmware "
|
||||
"(isl3886usb)\n");
|
||||
err = request_firmware(&fw_entry, "isl3890usb",
|
||||
&priv->udev->dev);
|
||||
if (err) {
|
||||
@ -685,8 +691,8 @@ static int p54u_upload_firmware_net2280(struct ieee80211_hw *dev)
|
||||
|
||||
err = p54u_bulk_msg(priv, P54U_PIPE_DATA, buf, block_len);
|
||||
if (err) {
|
||||
printk(KERN_ERR "p54usb: firmware block upload "
|
||||
"failed\n");
|
||||
dev_err(&priv->udev->dev, "(p54usb) firmware block "
|
||||
"upload failed\n");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
@ -719,8 +725,8 @@ static int p54u_upload_firmware_net2280(struct ieee80211_hw *dev)
|
||||
0x002C | (unsigned long)&devreg->direct_mem_win);
|
||||
if (!(reg & cpu_to_le32(ISL38XX_DMA_STATUS_DONE)) ||
|
||||
!(reg & cpu_to_le32(ISL38XX_DMA_STATUS_READY))) {
|
||||
printk(KERN_ERR "p54usb: firmware DMA transfer "
|
||||
"failed\n");
|
||||
dev_err(&priv->udev->dev, "(p54usb) firmware DMA "
|
||||
"transfer failed\n");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
@ -825,8 +831,9 @@ static int __devinit p54u_probe(struct usb_interface *intf,
|
||||
unsigned int i, recognized_pipes;
|
||||
|
||||
dev = p54_init_common(sizeof(*priv));
|
||||
|
||||
if (!dev) {
|
||||
printk(KERN_ERR "p54usb: ieee80211 alloc failed\n");
|
||||
dev_err(&udev->dev, "(p54usb) ieee80211 alloc failed\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
@ -887,7 +894,7 @@ static int __devinit p54u_probe(struct usb_interface *intf,
|
||||
|
||||
err = ieee80211_register_hw(dev);
|
||||
if (err) {
|
||||
printk(KERN_ERR "p54usb: Cannot register netdevice\n");
|
||||
dev_err(&udev->dev, "(p54usb) Cannot register netdevice\n");
|
||||
goto err_free_dev;
|
||||
}
|
||||
|
||||
|
@ -57,6 +57,7 @@ config RT2500USB
|
||||
tristate "Ralink rt2500 (USB) support"
|
||||
depends on USB
|
||||
select RT2X00_LIB_USB
|
||||
select RT2X00_LIB_CRYPTO
|
||||
---help---
|
||||
This adds support for rt2500 wireless chipset family.
|
||||
Supported chips: RT2571 & RT2572.
|
||||
|
@ -35,6 +35,13 @@
|
||||
#include "rt2x00usb.h"
|
||||
#include "rt2500usb.h"
|
||||
|
||||
/*
|
||||
* Allow hardware encryption to be disabled.
|
||||
*/
|
||||
static int modparam_nohwcrypt = 1;
|
||||
module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
|
||||
MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
|
||||
|
||||
/*
|
||||
* Register access.
|
||||
* All access to the CSR registers will go through the methods
|
||||
@ -323,6 +330,82 @@ static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
|
||||
/*
|
||||
* Configuration handlers.
|
||||
*/
|
||||
|
||||
/*
|
||||
* rt2500usb does not differentiate between shared and pairwise
|
||||
* keys, so we should use the same function for both key types.
|
||||
*/
|
||||
static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
|
||||
struct rt2x00lib_crypto *crypto,
|
||||
struct ieee80211_key_conf *key)
|
||||
{
|
||||
int timeout;
|
||||
u32 mask;
|
||||
u16 reg;
|
||||
|
||||
if (crypto->cmd == SET_KEY) {
|
||||
/*
|
||||
* Pairwise key will always be entry 0, but this
|
||||
* could collide with a shared key on the same
|
||||
* position...
|
||||
*/
|
||||
mask = TXRX_CSR0_KEY_ID.bit_mask;
|
||||
|
||||
rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
|
||||
reg &= mask;
|
||||
|
||||
if (reg && reg == mask)
|
||||
return -ENOSPC;
|
||||
|
||||
reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
|
||||
|
||||
key->hw_key_idx += reg ? ffz(reg) : 0;
|
||||
|
||||
/*
|
||||
* The encryption key doesn't fit within the CSR cache,
|
||||
* this means we should allocate it seperately and use
|
||||
* rt2x00usb_vendor_request() to send the key to the hardware.
|
||||
*/
|
||||
reg = KEY_ENTRY(key->hw_key_idx);
|
||||
timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
|
||||
rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
|
||||
USB_VENDOR_REQUEST_OUT, reg,
|
||||
crypto->key,
|
||||
sizeof(crypto->key),
|
||||
timeout);
|
||||
|
||||
/*
|
||||
* The driver does not support the IV/EIV generation
|
||||
* in hardware. However it doesn't support the IV/EIV
|
||||
* inside the ieee80211 frame either, but requires it
|
||||
* to be provided seperately for the descriptor.
|
||||
* rt2x00lib will cut the IV/EIV data out of all frames
|
||||
* given to us by mac80211, but we must tell mac80211
|
||||
* to generate the IV/EIV data.
|
||||
*/
|
||||
key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
|
||||
key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
|
||||
}
|
||||
|
||||
/*
|
||||
* TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
|
||||
* a particular key is valid.
|
||||
*/
|
||||
rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
|
||||
rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher);
|
||||
rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
|
||||
|
||||
mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
|
||||
if (crypto->cmd == SET_KEY)
|
||||
mask |= 1 << key->hw_key_idx;
|
||||
else if (crypto->cmd == DISABLE_KEY)
|
||||
mask &= ~(1 << key->hw_key_idx);
|
||||
rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, mask);
|
||||
rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
|
||||
const unsigned int filter_flags)
|
||||
{
|
||||
@ -844,7 +927,7 @@ static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
|
||||
|
||||
rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
|
||||
rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
|
||||
rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0xff);
|
||||
rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0);
|
||||
rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
|
||||
|
||||
rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
|
||||
@ -1066,7 +1149,7 @@ static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
|
||||
* Start writing the descriptor words.
|
||||
*/
|
||||
rt2x00_desc_read(txd, 1, &word);
|
||||
rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
|
||||
rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
|
||||
rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
|
||||
rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
|
||||
rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
|
||||
@ -1079,6 +1162,11 @@ static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
|
||||
rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
|
||||
rt2x00_desc_write(txd, 2, word);
|
||||
|
||||
if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
|
||||
_rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
|
||||
_rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
|
||||
}
|
||||
|
||||
rt2x00_desc_read(txd, 0, &word);
|
||||
rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
|
||||
rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
|
||||
@ -1093,7 +1181,8 @@ static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
|
||||
test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
|
||||
rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
|
||||
rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
|
||||
rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
|
||||
rt2x00_set_field32(&word, TXD_W0_CIPHER, txdesc->cipher);
|
||||
rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
|
||||
rt2x00_desc_write(txd, 0, word);
|
||||
}
|
||||
|
||||
@ -1204,6 +1293,7 @@ static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
|
||||
static void rt2500usb_fill_rxdone(struct queue_entry *entry,
|
||||
struct rxdone_entry_desc *rxdesc)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
|
||||
struct queue_entry_priv_usb *entry_priv = entry->priv_data;
|
||||
struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
|
||||
__le32 *rxd =
|
||||
@ -1231,6 +1321,33 @@ static void rt2500usb_fill_rxdone(struct queue_entry *entry,
|
||||
if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
|
||||
rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
|
||||
|
||||
if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
|
||||
rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
|
||||
if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
|
||||
rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
|
||||
}
|
||||
|
||||
if (rxdesc->cipher != CIPHER_NONE) {
|
||||
_rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
|
||||
_rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
|
||||
rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
|
||||
|
||||
/* ICV is located at the end of frame */
|
||||
|
||||
/*
|
||||
* Hardware has stripped IV/EIV data from 802.11 frame during
|
||||
* decryption. It has provided the data seperately but rt2x00lib
|
||||
* should decide if it should be reinserted.
|
||||
*/
|
||||
rxdesc->flags |= RX_FLAG_IV_STRIPPED;
|
||||
if (rxdesc->cipher != CIPHER_TKIP)
|
||||
rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
|
||||
if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
|
||||
rxdesc->flags |= RX_FLAG_DECRYPTED;
|
||||
else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
|
||||
rxdesc->flags |= RX_FLAG_MMIC_ERROR;
|
||||
}
|
||||
|
||||
/*
|
||||
* Obtain the status about this packet.
|
||||
* When frame was received with an OFDM bitrate,
|
||||
@ -1238,8 +1355,8 @@ static void rt2500usb_fill_rxdone(struct queue_entry *entry,
|
||||
* a CCK bitrate the signal is the rate in 100kbit/s.
|
||||
*/
|
||||
rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
|
||||
rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
|
||||
entry->queue->rt2x00dev->rssi_offset;
|
||||
rxdesc->rssi =
|
||||
rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
|
||||
rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
|
||||
|
||||
if (rt2x00_get_field32(word0, RXD_W0_OFDM))
|
||||
@ -1727,6 +1844,10 @@ static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
|
||||
__set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
|
||||
__set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
|
||||
__set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
|
||||
if (!modparam_nohwcrypt) {
|
||||
__set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
|
||||
__set_bit(CONFIG_CRYPTO_COPY_IV, &rt2x00dev->flags);
|
||||
}
|
||||
__set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
|
||||
|
||||
/*
|
||||
@ -1746,6 +1867,7 @@ static const struct ieee80211_ops rt2500usb_mac80211_ops = {
|
||||
.config = rt2x00mac_config,
|
||||
.config_interface = rt2x00mac_config_interface,
|
||||
.configure_filter = rt2x00mac_configure_filter,
|
||||
.set_key = rt2x00mac_set_key,
|
||||
.get_stats = rt2x00mac_get_stats,
|
||||
.bss_info_changed = rt2x00mac_bss_info_changed,
|
||||
.conf_tx = rt2x00mac_conf_tx,
|
||||
@ -1767,6 +1889,8 @@ static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
|
||||
.get_tx_data_len = rt2500usb_get_tx_data_len,
|
||||
.kick_tx_queue = rt2500usb_kick_tx_queue,
|
||||
.fill_rxdone = rt2500usb_fill_rxdone,
|
||||
.config_shared_key = rt2500usb_config_key,
|
||||
.config_pairwise_key = rt2500usb_config_key,
|
||||
.config_filter = rt2500usb_config_filter,
|
||||
.config_intf = rt2500usb_config_intf,
|
||||
.config_erp = rt2500usb_config_erp,
|
||||
|
@ -447,6 +447,9 @@
|
||||
#define SEC_CSR30 0x04bc
|
||||
#define SEC_CSR31 0x04be
|
||||
|
||||
#define KEY_ENTRY(__idx) \
|
||||
( SEC_CSR0 + ((__idx) * 16) )
|
||||
|
||||
/*
|
||||
* PHY control registers.
|
||||
*/
|
||||
|
@ -44,7 +44,7 @@
|
||||
/*
|
||||
* Module information.
|
||||
*/
|
||||
#define DRV_VERSION "2.2.2"
|
||||
#define DRV_VERSION "2.2.3"
|
||||
#define DRV_PROJECT "http://rt2x00.serialmonkey.com"
|
||||
|
||||
/*
|
||||
@ -653,6 +653,7 @@ enum rt2x00_flags {
|
||||
CONFIG_EXTERNAL_LNA_BG,
|
||||
CONFIG_DOUBLE_ANTENNA,
|
||||
CONFIG_DISABLE_LINK_TUNING,
|
||||
CONFIG_CRYPTO_COPY_IV,
|
||||
};
|
||||
|
||||
/*
|
||||
@ -802,6 +803,12 @@ struct rt2x00_dev {
|
||||
*/
|
||||
u16 tx_power;
|
||||
|
||||
/*
|
||||
* Current retry values.
|
||||
*/
|
||||
u8 short_retry;
|
||||
u8 long_retry;
|
||||
|
||||
/*
|
||||
* Rssi <-> Dbm offset
|
||||
*/
|
||||
|
@ -108,33 +108,34 @@ void rt2x00lib_config_erp(struct rt2x00_dev *rt2x00dev,
|
||||
rt2x00dev->ops->lib->config_erp(rt2x00dev, &erp);
|
||||
}
|
||||
|
||||
static inline
|
||||
enum antenna rt2x00lib_config_antenna_check(enum antenna current_ant,
|
||||
enum antenna default_ant)
|
||||
{
|
||||
if (current_ant != ANTENNA_SW_DIVERSITY)
|
||||
return current_ant;
|
||||
return (default_ant != ANTENNA_SW_DIVERSITY) ? default_ant : ANTENNA_B;
|
||||
}
|
||||
|
||||
void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
|
||||
struct antenna_setup *ant)
|
||||
{
|
||||
struct antenna_setup *def = &rt2x00dev->default_ant;
|
||||
struct antenna_setup *active = &rt2x00dev->link.ant.active;
|
||||
|
||||
/*
|
||||
* Failsafe: Make sure we are not sending the
|
||||
* ANTENNA_SW_DIVERSITY state to the driver.
|
||||
* If that happes fallback to hardware default,
|
||||
* or our own default.
|
||||
* The calls to rt2x00lib_config_antenna_check()
|
||||
* might have caused that we restore back to the already
|
||||
* active setting. If that has happened we can quit.
|
||||
*/
|
||||
if (ant->rx == ANTENNA_SW_DIVERSITY) {
|
||||
if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
|
||||
ant->rx = ANTENNA_B;
|
||||
else
|
||||
ant->rx = rt2x00dev->default_ant.rx;
|
||||
}
|
||||
if (ant->tx == ANTENNA_SW_DIVERSITY) {
|
||||
if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
|
||||
ant->tx = ANTENNA_B;
|
||||
else
|
||||
ant->tx = rt2x00dev->default_ant.tx;
|
||||
}
|
||||
ant->rx = rt2x00lib_config_antenna_check(ant->rx, def->rx);
|
||||
ant->tx = rt2x00lib_config_antenna_check(ant->tx, def->tx);
|
||||
|
||||
/*
|
||||
* Only reconfigure when something has changed.
|
||||
*/
|
||||
if (ant->rx == rt2x00dev->link.ant.active.rx &&
|
||||
ant->tx == rt2x00dev->link.ant.active.tx)
|
||||
if (ant->rx == active->rx && ant->tx == active->tx)
|
||||
return;
|
||||
|
||||
/*
|
||||
@ -154,7 +155,7 @@ void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
|
||||
rt2x00lib_reset_link_tuner(rt2x00dev);
|
||||
rt2x00_reset_link_ant_rssi(&rt2x00dev->link);
|
||||
|
||||
memcpy(&rt2x00dev->link.ant.active, ant, sizeof(*ant));
|
||||
memcpy(active, ant, sizeof(*ant));
|
||||
|
||||
if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
|
||||
rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON_LINK);
|
||||
@ -194,6 +195,8 @@ void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,
|
||||
|
||||
rt2x00dev->curr_band = conf->channel->band;
|
||||
rt2x00dev->tx_power = conf->power_level;
|
||||
rt2x00dev->short_retry = conf->short_frame_max_tx_count;
|
||||
rt2x00dev->long_retry = conf->long_frame_max_tx_count;
|
||||
|
||||
rt2x00dev->rx_status.band = conf->channel->band;
|
||||
rt2x00dev->rx_status.freq = conf->channel->center_freq;
|
||||
|
@ -46,6 +46,29 @@ enum cipher rt2x00crypto_key_to_cipher(struct ieee80211_key_conf *key)
|
||||
}
|
||||
}
|
||||
|
||||
void rt2x00crypto_create_tx_descriptor(struct queue_entry *entry,
|
||||
struct txentry_desc *txdesc)
|
||||
{
|
||||
struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
|
||||
struct ieee80211_key_conf *hw_key = tx_info->control.hw_key;
|
||||
|
||||
__set_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags);
|
||||
|
||||
txdesc->cipher = rt2x00crypto_key_to_cipher(hw_key);
|
||||
|
||||
if (hw_key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
|
||||
__set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags);
|
||||
|
||||
txdesc->key_idx = hw_key->hw_key_idx;
|
||||
txdesc->iv_offset = ieee80211_get_hdrlen_from_skb(entry->skb);
|
||||
|
||||
if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV))
|
||||
__set_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags);
|
||||
|
||||
if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_MMIC))
|
||||
__set_bit(ENTRY_TXD_ENCRYPT_MMIC, &txdesc->flags);
|
||||
}
|
||||
|
||||
unsigned int rt2x00crypto_tx_overhead(struct ieee80211_tx_info *tx_info)
|
||||
{
|
||||
struct ieee80211_key_conf *key = tx_info->control.hw_key;
|
||||
@ -69,6 +92,18 @@ unsigned int rt2x00crypto_tx_overhead(struct ieee80211_tx_info *tx_info)
|
||||
return overhead;
|
||||
}
|
||||
|
||||
void rt2x00crypto_tx_copy_iv(struct sk_buff *skb, unsigned int iv_len)
|
||||
{
|
||||
struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
|
||||
unsigned int header_length = ieee80211_get_hdrlen_from_skb(skb);
|
||||
|
||||
if (unlikely(!iv_len))
|
||||
return;
|
||||
|
||||
/* Copy IV/EIV data */
|
||||
memcpy(skbdesc->iv, skb->data + header_length, iv_len);
|
||||
}
|
||||
|
||||
void rt2x00crypto_tx_remove_iv(struct sk_buff *skb, unsigned int iv_len)
|
||||
{
|
||||
struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
|
||||
@ -78,10 +113,7 @@ void rt2x00crypto_tx_remove_iv(struct sk_buff *skb, unsigned int iv_len)
|
||||
return;
|
||||
|
||||
/* Copy IV/EIV data */
|
||||
if (iv_len >= 4)
|
||||
memcpy(&skbdesc->iv, skb->data + header_length, 4);
|
||||
if (iv_len >= 8)
|
||||
memcpy(&skbdesc->eiv, skb->data + header_length + 4, 4);
|
||||
memcpy(skbdesc->iv, skb->data + header_length, iv_len);
|
||||
|
||||
/* Move ieee80211 header */
|
||||
memmove(skb->data + iv_len, skb->data, header_length);
|
||||
@ -98,7 +130,7 @@ void rt2x00crypto_tx_insert_iv(struct sk_buff *skb)
|
||||
struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
|
||||
unsigned int header_length = ieee80211_get_hdrlen_from_skb(skb);
|
||||
const unsigned int iv_len =
|
||||
((!!(skbdesc->iv)) * 4) + ((!!(skbdesc->eiv)) * 4);
|
||||
((!!(skbdesc->iv[0])) * 4) + ((!!(skbdesc->iv[1])) * 4);
|
||||
|
||||
if (!(skbdesc->flags & FRAME_DESC_IV_STRIPPED))
|
||||
return;
|
||||
@ -109,10 +141,7 @@ void rt2x00crypto_tx_insert_iv(struct sk_buff *skb)
|
||||
memmove(skb->data, skb->data + iv_len, header_length);
|
||||
|
||||
/* Copy IV/EIV data */
|
||||
if (iv_len >= 4)
|
||||
memcpy(skb->data + header_length, &skbdesc->iv, 4);
|
||||
if (iv_len >= 8)
|
||||
memcpy(skb->data + header_length + 4, &skbdesc->eiv, 4);
|
||||
memcpy(skb->data + header_length, skbdesc->iv, iv_len);
|
||||
|
||||
/* IV/EIV data has returned into the frame */
|
||||
skbdesc->flags &= ~FRAME_DESC_IV_STRIPPED;
|
||||
@ -172,17 +201,9 @@ void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, unsigned int align,
|
||||
header_length);
|
||||
transfer += header_length;
|
||||
|
||||
/* Copy IV data */
|
||||
if (iv_len >= 4) {
|
||||
memcpy(skb->data + transfer, &rxdesc->iv, 4);
|
||||
transfer += 4;
|
||||
}
|
||||
|
||||
/* Copy EIV data */
|
||||
if (iv_len >= 8) {
|
||||
memcpy(skb->data + transfer, &rxdesc->eiv, 4);
|
||||
transfer += 4;
|
||||
}
|
||||
/* Copy IV/EIV data */
|
||||
memcpy(skb->data + transfer, rxdesc->iv, iv_len);
|
||||
transfer += iv_len;
|
||||
|
||||
/* Move payload */
|
||||
if (align) {
|
||||
@ -198,16 +219,14 @@ void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, unsigned int align,
|
||||
*/
|
||||
transfer += payload_len;
|
||||
|
||||
/* Copy ICV data */
|
||||
if (icv_len >= 4) {
|
||||
memcpy(skb->data + transfer, &rxdesc->icv, 4);
|
||||
/*
|
||||
* AES appends 8 bytes, we can't fill the upper
|
||||
* 4 bytes, but mac80211 doesn't care about what
|
||||
* we provide here anyway and strips it immediately.
|
||||
*/
|
||||
transfer += icv_len;
|
||||
}
|
||||
/*
|
||||
* Copy ICV data
|
||||
* AES appends 8 bytes, we can't fill the upper
|
||||
* 4 bytes, but mac80211 doesn't care about what
|
||||
* we provide here anyway and strips it immediately.
|
||||
*/
|
||||
memcpy(skb->data + transfer, &rxdesc->icv, 4);
|
||||
transfer += icv_len;
|
||||
|
||||
/* IV/EIV/ICV has been inserted into frame */
|
||||
rxdesc->size = transfer;
|
||||
|
@ -636,7 +636,8 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
|
||||
* provided seperately (through hardware descriptor)
|
||||
* in which case we should reinsert the data into the frame.
|
||||
*/
|
||||
if ((rxdesc.flags & RX_FLAG_IV_STRIPPED)) {
|
||||
if ((rxdesc.dev_flags & RXDONE_CRYPTO_IV) &&
|
||||
(rxdesc.flags & RX_FLAG_IV_STRIPPED)) {
|
||||
rt2x00crypto_rx_insert_iv(entry->skb, align,
|
||||
header_length, &rxdesc);
|
||||
} else if (align) {
|
||||
|
@ -218,7 +218,10 @@ static inline void rt2x00debug_update_crypto(struct rt2x00_dev *rt2x00dev,
|
||||
*/
|
||||
#ifdef CONFIG_RT2X00_LIB_CRYPTO
|
||||
enum cipher rt2x00crypto_key_to_cipher(struct ieee80211_key_conf *key);
|
||||
void rt2x00crypto_create_tx_descriptor(struct queue_entry *entry,
|
||||
struct txentry_desc *txdesc);
|
||||
unsigned int rt2x00crypto_tx_overhead(struct ieee80211_tx_info *tx_info);
|
||||
void rt2x00crypto_tx_copy_iv(struct sk_buff *skb, unsigned int iv_len);
|
||||
void rt2x00crypto_tx_remove_iv(struct sk_buff *skb, unsigned int iv_len);
|
||||
void rt2x00crypto_tx_insert_iv(struct sk_buff *skb);
|
||||
void rt2x00crypto_rx_insert_iv(struct sk_buff *skb, unsigned int align,
|
||||
@ -230,11 +233,21 @@ static inline enum cipher rt2x00crypto_key_to_cipher(struct ieee80211_key_conf *
|
||||
return CIPHER_NONE;
|
||||
}
|
||||
|
||||
static inline void rt2x00crypto_create_tx_descriptor(struct queue_entry *entry,
|
||||
struct txentry_desc *txdesc)
|
||||
{
|
||||
}
|
||||
|
||||
static inline unsigned int rt2x00crypto_tx_overhead(struct ieee80211_tx_info *tx_info)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void rt2x00crypto_tx_copy_iv(struct sk_buff *skb,
|
||||
unsigned int iv_len)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void rt2x00crypto_tx_remove_iv(struct sk_buff *skb,
|
||||
unsigned int iv_len)
|
||||
{
|
||||
@ -250,7 +263,7 @@ static inline void rt2x00crypto_rx_insert_iv(struct sk_buff *skb,
|
||||
struct rxdone_entry_desc *rxdesc)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_RT2X00_LIB_CRYPTO */
|
||||
|
||||
/*
|
||||
* RFkill handlers.
|
||||
|
@ -79,10 +79,8 @@ static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev,
|
||||
* RTS/CTS frame should use the length of the frame plus any
|
||||
* encryption overhead that will be added by the hardware.
|
||||
*/
|
||||
#ifdef CONFIG_RT2X00_LIB_CRYPTO
|
||||
if (!frag_skb->do_not_encrypt)
|
||||
data_length += rt2x00crypto_tx_overhead(tx_info);
|
||||
#endif /* CONFIG_RT2X00_LIB_CRYPTO */
|
||||
|
||||
if (tx_info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
|
||||
ieee80211_ctstoself_get(rt2x00dev->hw, tx_info->control.vif,
|
||||
@ -489,6 +487,7 @@ int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
||||
struct ieee80211_key_conf *key)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||
struct ieee80211_sta *sta;
|
||||
int (*set_key) (struct rt2x00_dev *rt2x00dev,
|
||||
struct rt2x00lib_crypto *crypto,
|
||||
struct ieee80211_key_conf *key);
|
||||
@ -538,6 +537,17 @@ int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
||||
} else
|
||||
memcpy(&crypto.key, &key->key[0], key->keylen);
|
||||
|
||||
/*
|
||||
* Discover the Association ID from mac80211.
|
||||
* Some drivers need this information when updating the
|
||||
* hardware key (either adding or removing).
|
||||
*/
|
||||
rcu_read_lock();
|
||||
sta = ieee80211_find_sta(hw, address);
|
||||
if (sta)
|
||||
crypto.aid = sta->aid;
|
||||
rcu_read_unlock();
|
||||
|
||||
/*
|
||||
* Each BSS has a maximum of 4 shared keys.
|
||||
* Shared key index values:
|
||||
@ -636,7 +646,7 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
|
||||
* When the erp information has changed, we should perform
|
||||
* additional configuration steps. For all other changes we are done.
|
||||
*/
|
||||
if (changes & (BSS_CHANGED_ERP_PREAMBLE | BSS_CHANGED_ERP_CTS_PROT)) {
|
||||
if (changes & ~(BSS_CHANGED_ASSOC | BSS_CHANGED_HT)) {
|
||||
if (!test_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags))
|
||||
rt2x00lib_config_erp(rt2x00dev, intf, bss_conf);
|
||||
else
|
||||
|
@ -55,14 +55,12 @@ struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
|
||||
/*
|
||||
* For IV/EIV/ICV assembly we must make sure there is
|
||||
* at least 8 bytes bytes available in headroom for IV/EIV
|
||||
* and 4 bytes for ICV data as tailroon.
|
||||
* and 8 bytes for ICV data as tailroon.
|
||||
*/
|
||||
#ifdef CONFIG_RT2X00_LIB_CRYPTO
|
||||
if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
|
||||
head_size += 8;
|
||||
tail_size += 4;
|
||||
tail_size += 8;
|
||||
}
|
||||
#endif /* CONFIG_RT2X00_LIB_CRYPTO */
|
||||
|
||||
/*
|
||||
* Allocate skbuffer.
|
||||
@ -174,7 +172,7 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
|
||||
txdesc->cw_max = entry->queue->cw_max;
|
||||
txdesc->aifs = entry->queue->aifs;
|
||||
|
||||
/* Data length + CRC + IV/EIV/ICV/MMIC (when using encryption) */
|
||||
/* Data length + CRC */
|
||||
data_length = entry->skb->len + 4;
|
||||
|
||||
/*
|
||||
@ -183,34 +181,17 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
|
||||
if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
|
||||
__set_bit(ENTRY_TXD_ACK, &txdesc->flags);
|
||||
|
||||
#ifdef CONFIG_RT2X00_LIB_CRYPTO
|
||||
if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags) &&
|
||||
!entry->skb->do_not_encrypt) {
|
||||
struct ieee80211_key_conf *hw_key = tx_info->control.hw_key;
|
||||
|
||||
__set_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags);
|
||||
|
||||
txdesc->cipher = rt2x00crypto_key_to_cipher(hw_key);
|
||||
|
||||
if (hw_key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
|
||||
__set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags);
|
||||
|
||||
txdesc->key_idx = hw_key->hw_key_idx;
|
||||
txdesc->iv_offset = ieee80211_get_hdrlen_from_skb(entry->skb);
|
||||
/* Apply crypto specific descriptor information */
|
||||
rt2x00crypto_create_tx_descriptor(entry, txdesc);
|
||||
|
||||
/*
|
||||
* Extend frame length to include all encryption overhead
|
||||
* that will be added by the hardware.
|
||||
*/
|
||||
data_length += rt2x00crypto_tx_overhead(tx_info);
|
||||
|
||||
if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV))
|
||||
__set_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags);
|
||||
|
||||
if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_MMIC))
|
||||
__set_bit(ENTRY_TXD_ENCRYPT_MMIC, &txdesc->flags);
|
||||
}
|
||||
#endif /* CONFIG_RT2X00_LIB_CRYPTO */
|
||||
|
||||
/*
|
||||
* Check if this is a RTS/CTS frame
|
||||
@ -231,14 +212,7 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
|
||||
* Determine retry information.
|
||||
*/
|
||||
txdesc->retry_limit = tx_info->control.rates[0].count - 1;
|
||||
/*
|
||||
* XXX: If at this point we knew whether the HW is going to use
|
||||
* the RETRY_MODE bit or the retry_limit (currently all
|
||||
* use the RETRY_MODE bit) we could do something like b43
|
||||
* does, set the RETRY_MODE bit when the RC algorithm is
|
||||
* requesting more than the long retry limit.
|
||||
*/
|
||||
if (tx_info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
|
||||
if (txdesc->retry_limit >= rt2x00dev->long_retry)
|
||||
__set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
|
||||
|
||||
/*
|
||||
@ -427,8 +401,12 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
|
||||
* the frame so we can provide it to the driver seperately.
|
||||
*/
|
||||
if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
|
||||
!test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags))
|
||||
rt2x00crypto_tx_remove_iv(skb, iv_len);
|
||||
!test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
|
||||
if (test_bit(CONFIG_CRYPTO_COPY_IV, &queue->rt2x00dev->flags))
|
||||
rt2x00crypto_tx_copy_iv(skb, iv_len);
|
||||
else
|
||||
rt2x00crypto_tx_remove_iv(skb, iv_len);
|
||||
}
|
||||
|
||||
/*
|
||||
* It could be possible that the queue was corrupted and this
|
||||
|
@ -109,8 +109,7 @@ enum skb_frame_desc_flags {
|
||||
* @desc: Pointer to descriptor part of the frame.
|
||||
* Note that this pointer could point to something outside
|
||||
* of the scope of the skb->data pointer.
|
||||
* @iv: IV data used during encryption/decryption.
|
||||
* @eiv: EIV data used during encryption/decryption.
|
||||
* @iv: IV/EIV data used during encryption/decryption.
|
||||
* @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
|
||||
* @entry: The entry to which this sk buffer belongs.
|
||||
*/
|
||||
@ -123,8 +122,7 @@ struct skb_frame_desc {
|
||||
|
||||
void *desc;
|
||||
|
||||
__le32 iv;
|
||||
__le32 eiv;
|
||||
__le32 iv[2];
|
||||
|
||||
dma_addr_t skb_dma;
|
||||
|
||||
@ -148,11 +146,15 @@ static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
|
||||
* @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
|
||||
* @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
|
||||
* @RXDONE_MY_BSS: Does this frame originate from device's BSS.
|
||||
* @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
|
||||
* @RXDONE_CRYPTO_ICV: Driver provided ICV data.
|
||||
*/
|
||||
enum rxdone_entry_desc_flags {
|
||||
RXDONE_SIGNAL_PLCP = 1 << 0,
|
||||
RXDONE_SIGNAL_BITRATE = 1 << 1,
|
||||
RXDONE_MY_BSS = 1 << 2,
|
||||
RXDONE_CRYPTO_IV = 1 << 3,
|
||||
RXDONE_CRYPTO_ICV = 1 << 4,
|
||||
};
|
||||
|
||||
/**
|
||||
@ -168,8 +170,7 @@ enum rxdone_entry_desc_flags {
|
||||
* @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
|
||||
* @cipher: Cipher type used during decryption.
|
||||
* @cipher_status: Decryption status.
|
||||
* @iv: IV data used during decryption.
|
||||
* @eiv: EIV data used during decryption.
|
||||
* @iv: IV/EIV data used during decryption.
|
||||
* @icv: ICV data used during decryption.
|
||||
*/
|
||||
struct rxdone_entry_desc {
|
||||
@ -182,8 +183,7 @@ struct rxdone_entry_desc {
|
||||
u8 cipher;
|
||||
u8 cipher_status;
|
||||
|
||||
__le32 iv;
|
||||
__le32 eiv;
|
||||
__le32 iv[2];
|
||||
__le32 icv;
|
||||
};
|
||||
|
||||
|
@ -1778,8 +1778,8 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
|
||||
rt2x00_desc_write(txd, 2, word);
|
||||
|
||||
if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
|
||||
_rt2x00_desc_write(txd, 3, skbdesc->iv);
|
||||
_rt2x00_desc_write(txd, 4, skbdesc->eiv);
|
||||
_rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
|
||||
_rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
|
||||
}
|
||||
|
||||
rt2x00_desc_read(txd, 5, &word);
|
||||
@ -1949,9 +1949,12 @@ static void rt61pci_fill_rxdone(struct queue_entry *entry,
|
||||
}
|
||||
|
||||
if (rxdesc->cipher != CIPHER_NONE) {
|
||||
_rt2x00_desc_read(entry_priv->desc, 2, &rxdesc->iv);
|
||||
_rt2x00_desc_read(entry_priv->desc, 3, &rxdesc->eiv);
|
||||
_rt2x00_desc_read(entry_priv->desc, 2, &rxdesc->iv[0]);
|
||||
_rt2x00_desc_read(entry_priv->desc, 3, &rxdesc->iv[1]);
|
||||
rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
|
||||
|
||||
_rt2x00_desc_read(entry_priv->desc, 4, &rxdesc->icv);
|
||||
rxdesc->dev_flags |= RXDONE_CRYPTO_ICV;
|
||||
|
||||
/*
|
||||
* Hardware has stripped IV/EIV data from 802.11 frame during
|
||||
|
@ -1428,8 +1428,8 @@ static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
|
||||
rt2x00_desc_write(txd, 2, word);
|
||||
|
||||
if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
|
||||
_rt2x00_desc_write(txd, 3, skbdesc->iv);
|
||||
_rt2x00_desc_write(txd, 4, skbdesc->eiv);
|
||||
_rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
|
||||
_rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
|
||||
}
|
||||
|
||||
rt2x00_desc_read(txd, 5, &word);
|
||||
@ -1618,9 +1618,12 @@ static void rt73usb_fill_rxdone(struct queue_entry *entry,
|
||||
}
|
||||
|
||||
if (rxdesc->cipher != CIPHER_NONE) {
|
||||
_rt2x00_desc_read(rxd, 2, &rxdesc->iv);
|
||||
_rt2x00_desc_read(rxd, 3, &rxdesc->eiv);
|
||||
_rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
|
||||
_rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
|
||||
rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
|
||||
|
||||
_rt2x00_desc_read(rxd, 4, &rxdesc->icv);
|
||||
rxdesc->dev_flags |= RXDONE_CRYPTO_ICV;
|
||||
|
||||
/*
|
||||
* Hardware has stripped IV/EIV data from 802.11 frame during
|
||||
|
@ -238,7 +238,7 @@ static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
hdr->flags = cpu_to_le32(flags);
|
||||
hdr->len = 0;
|
||||
hdr->rts_duration = rts_dur;
|
||||
hdr->retry = cpu_to_le32(info->control.rates[0].count << 8);
|
||||
hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
|
||||
buf = hdr;
|
||||
|
||||
ep = 2;
|
||||
@ -256,7 +256,7 @@ static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
|
||||
memset(hdr, 0, sizeof(*hdr));
|
||||
hdr->flags = cpu_to_le32(flags);
|
||||
hdr->rts_duration = rts_dur;
|
||||
hdr->retry = cpu_to_le32(info->control.rates[0].count << 8);
|
||||
hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
|
||||
hdr->tx_duration =
|
||||
ieee80211_generic_frame_duration(dev, priv->vif,
|
||||
skb->len, txrate);
|
||||
|
@ -3,7 +3,26 @@
|
||||
/*
|
||||
* 802.11 netlink interface public header
|
||||
*
|
||||
* Copyright 2006, 2007 Johannes Berg <johannes@sipsolutions.net>
|
||||
* Copyright 2006, 2007, 2008 Johannes Berg <johannes@sipsolutions.net>
|
||||
* Copyright 2008 Michael Wu <flamingice@sourmilk.net>
|
||||
* Copyright 2008 Luis Carlos Cobo <luisca@cozybit.com>
|
||||
* Copyright 2008 Michael Buesch <mb@bu3sch.de>
|
||||
* Copyright 2008 Luis R. Rodriguez <lrodriguez@atheros.com>
|
||||
* Copyright 2008 Jouni Malinen <jouni.malinen@atheros.com>
|
||||
* Copyright 2008 Colin McCabe <colin@cozybit.com>
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
@ -26,8 +45,9 @@
|
||||
* @NL80211_CMD_GET_WIPHY: request information about a wiphy or dump request
|
||||
* to get a list of all present wiphys.
|
||||
* @NL80211_CMD_SET_WIPHY: set wiphy parameters, needs %NL80211_ATTR_WIPHY or
|
||||
* %NL80211_ATTR_IFINDEX; can be used to set %NL80211_ATTR_WIPHY_NAME
|
||||
* and/or %NL80211_ATTR_WIPHY_TXQ_PARAMS.
|
||||
* %NL80211_ATTR_IFINDEX; can be used to set %NL80211_ATTR_WIPHY_NAME,
|
||||
* %NL80211_ATTR_WIPHY_TXQ_PARAMS, %NL80211_ATTR_WIPHY_FREQ, and/or
|
||||
* %NL80211_ATTR_WIPHY_SEC_CHAN_OFFSET.
|
||||
* @NL80211_CMD_NEW_WIPHY: Newly created wiphy, response to get request
|
||||
* or rename notification. Has attributes %NL80211_ATTR_WIPHY and
|
||||
* %NL80211_ATTR_WIPHY_NAME.
|
||||
@ -180,6 +200,14 @@ enum nl80211_commands {
|
||||
* /sys/class/ieee80211/<phyname>/index
|
||||
* @NL80211_ATTR_WIPHY_NAME: wiphy name (used for renaming)
|
||||
* @NL80211_ATTR_WIPHY_TXQ_PARAMS: a nested array of TX queue parameters
|
||||
* @NL80211_ATTR_WIPHY_FREQ: frequency of the selected channel in MHz
|
||||
* @NL80211_ATTR_WIPHY_SEC_CHAN_OFFSET: included with NL80211_ATTR_WIPHY_FREQ
|
||||
* if HT20 or HT40 are allowed (i.e., 802.11n disabled if not included):
|
||||
* NL80211_SEC_CHAN_NO_HT = HT not allowed (i.e., same as not including
|
||||
* this attribute)
|
||||
* NL80211_SEC_CHAN_DISABLED = HT20 only
|
||||
* NL80211_SEC_CHAN_BELOW = secondary channel is below the primary channel
|
||||
* NL80211_SEC_CHAN_ABOVE = secondary channel is above the primary channel
|
||||
*
|
||||
* @NL80211_ATTR_IFINDEX: network interface index of the device to operate on
|
||||
* @NL80211_ATTR_IFNAME: network interface name
|
||||
@ -315,6 +343,8 @@ enum nl80211_attrs {
|
||||
NL80211_ATTR_BSS_BASIC_RATES,
|
||||
|
||||
NL80211_ATTR_WIPHY_TXQ_PARAMS,
|
||||
NL80211_ATTR_WIPHY_FREQ,
|
||||
NL80211_ATTR_WIPHY_SEC_CHAN_OFFSET,
|
||||
|
||||
/* add attributes here, update the policy in nl80211.c */
|
||||
|
||||
@ -329,6 +359,8 @@ enum nl80211_attrs {
|
||||
#define NL80211_ATTR_HT_CAPABILITY NL80211_ATTR_HT_CAPABILITY
|
||||
#define NL80211_ATTR_BSS_BASIC_RATES NL80211_ATTR_BSS_BASIC_RATES
|
||||
#define NL80211_ATTR_WIPHY_TXQ_PARAMS NL80211_ATTR_WIPHY_TXQ_PARAMS
|
||||
#define NL80211_ATTR_WIPHY_FREQ NL80211_ATTR_WIPHY_FREQ
|
||||
#define NL80211_ATTR_WIPHY_SEC_CHAN_OFFSET NL80211_ATTR_WIPHY_SEC_CHAN_OFFSET
|
||||
|
||||
#define NL80211_MAX_SUPP_RATES 32
|
||||
#define NL80211_MAX_SUPP_REG_RULES 32
|
||||
@ -742,4 +774,10 @@ enum nl80211_txq_q {
|
||||
NL80211_TXQ_Q_BK
|
||||
};
|
||||
|
||||
enum nl80211_sec_chan_offset {
|
||||
NL80211_SEC_CHAN_NO_HT /* No HT */,
|
||||
NL80211_SEC_CHAN_DISABLED /* HT20 only */,
|
||||
NL80211_SEC_CHAN_BELOW /* HT40- */,
|
||||
NL80211_SEC_CHAN_ABOVE /* HT40+ */
|
||||
};
|
||||
#endif /* __LINUX_NL80211_H */
|
||||
|
@ -5,6 +5,8 @@
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/nl80211.h>
|
||||
#include <net/genetlink.h>
|
||||
/* remove once we remove the wext stuff */
|
||||
#include <net/iw_handler.h>
|
||||
|
||||
/*
|
||||
* 802.11 configuration in-kernel interface
|
||||
@ -392,6 +394,9 @@ struct ieee80211_txq_params {
|
||||
/* from net/wireless.h */
|
||||
struct wiphy;
|
||||
|
||||
/* from net/ieee80211.h */
|
||||
struct ieee80211_channel;
|
||||
|
||||
/**
|
||||
* struct cfg80211_ops - backend description for wireless configuration
|
||||
*
|
||||
@ -450,6 +455,8 @@ struct wiphy;
|
||||
* @change_bss: Modify parameters for a given BSS.
|
||||
*
|
||||
* @set_txq_params: Set TX queue parameters
|
||||
*
|
||||
* @set_channel: Set channel
|
||||
*/
|
||||
struct cfg80211_ops {
|
||||
int (*add_virtual_intf)(struct wiphy *wiphy, char *name,
|
||||
@ -513,6 +520,19 @@ struct cfg80211_ops {
|
||||
|
||||
int (*set_txq_params)(struct wiphy *wiphy,
|
||||
struct ieee80211_txq_params *params);
|
||||
|
||||
int (*set_channel)(struct wiphy *wiphy,
|
||||
struct ieee80211_channel *chan,
|
||||
enum nl80211_sec_chan_offset);
|
||||
};
|
||||
|
||||
/* temporary wext handlers */
|
||||
int cfg80211_wext_giwname(struct net_device *dev,
|
||||
struct iw_request_info *info,
|
||||
char *name, char *extra);
|
||||
int cfg80211_wext_siwmode(struct net_device *dev, struct iw_request_info *info,
|
||||
u32 *mode, char *extra);
|
||||
int cfg80211_wext_giwmode(struct net_device *dev, struct iw_request_info *info,
|
||||
u32 *mode, char *extra);
|
||||
|
||||
#endif /* __NET_CFG80211_H */
|
||||
|
@ -1,7 +1,4 @@
|
||||
/* $FreeBSD: src/sys/net80211/ieee80211_radiotap.h,v 1.5 2005/01/22 20:12:05 sam Exp $ */
|
||||
/* $NetBSD: ieee80211_radiotap.h,v 1.11 2005/06/22 06:16:02 dyoung Exp $ */
|
||||
|
||||
/*-
|
||||
/*
|
||||
* Copyright (c) 2003, 2004 David Young. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -42,8 +39,6 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
/* Radiotap header version (from official NetBSD feed) */
|
||||
#define IEEE80211RADIOTAP_VERSION "1.5"
|
||||
/* Base version of the radiotap packet header data */
|
||||
#define PKTHDR_RADIOTAP_VERSION 0
|
||||
|
||||
@ -62,12 +57,8 @@
|
||||
* readers.
|
||||
*/
|
||||
|
||||
/* XXX tcpdump/libpcap do not tolerate variable-length headers,
|
||||
* yet, so we pad every radiotap header to 64 bytes. Ugh.
|
||||
*/
|
||||
#define IEEE80211_RADIOTAP_HDRLEN 64
|
||||
|
||||
/* The radio capture header precedes the 802.11 header.
|
||||
/*
|
||||
* The radio capture header precedes the 802.11 header.
|
||||
* All data in the header is little endian on all platforms.
|
||||
*/
|
||||
struct ieee80211_radiotap_header {
|
||||
|
@ -323,6 +323,7 @@ struct ieee80211_tx_rate {
|
||||
* @flags: transmit info flags, defined above
|
||||
* @band: the band to transmit on (use for checking for races)
|
||||
* @antenna_sel_tx: antenna to use, 0 for automatic diversity
|
||||
* @pad: padding, ignore
|
||||
* @control: union for control data
|
||||
* @status: union for status data
|
||||
* @driver_data: array of driver_data pointers
|
||||
@ -507,6 +508,9 @@ static inline int __deprecated __IEEE80211_CONF_SHORT_SLOT_TIME(void)
|
||||
|
||||
struct ieee80211_ht_conf {
|
||||
bool enabled;
|
||||
int sec_chan_offset; /* 0 = HT40 disabled; -1 = HT40 enabled, secondary
|
||||
* channel below primary; 1 = HT40 enabled,
|
||||
* secondary channel above primary */
|
||||
};
|
||||
|
||||
/**
|
||||
@ -778,6 +782,19 @@ enum sta_notify_cmd {
|
||||
STA_NOTIFY_ADD, STA_NOTIFY_REMOVE
|
||||
};
|
||||
|
||||
/**
|
||||
* enum sta_notify_ps_cmd - sta power save notify command
|
||||
*
|
||||
* Used with the sta_notify_ps() callback in &struct ieee80211_ops to
|
||||
* notify the driver if a station made a power state transition.
|
||||
*
|
||||
* @STA_NOTIFY_SLEEP: a station is now sleeping
|
||||
* @STA_NOTIFY_AWAKE: a sleeping station woke up
|
||||
*/
|
||||
enum sta_notify_ps_cmd {
|
||||
STA_NOTIFY_SLEEP, STA_NOTIFY_AWAKE,
|
||||
};
|
||||
|
||||
/**
|
||||
* enum ieee80211_tkip_key_type - get tkip key
|
||||
*
|
||||
@ -1248,6 +1265,9 @@ enum ieee80211_ampdu_mlme_action {
|
||||
* @sta_notify: Notifies low level driver about addition or removal
|
||||
* of associated station or AP.
|
||||
*
|
||||
* @sta_ps_notify: Notifies low level driver about the power state transition
|
||||
* of a associated station. Must be atomic.
|
||||
*
|
||||
* @conf_tx: Configure TX queue parameters (EDCF (aifs, cw_min, cw_max),
|
||||
* bursting) for a hardware TX queue.
|
||||
*
|
||||
@ -1314,6 +1334,8 @@ struct ieee80211_ops {
|
||||
int (*set_frag_threshold)(struct ieee80211_hw *hw, u32 value);
|
||||
void (*sta_notify)(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
enum sta_notify_cmd, struct ieee80211_sta *sta);
|
||||
void (*sta_notify_ps)(struct ieee80211_hw *hw,
|
||||
enum sta_notify_ps_cmd, struct ieee80211_sta *sta);
|
||||
int (*conf_tx)(struct ieee80211_hw *hw, u16 queue,
|
||||
const struct ieee80211_tx_queue_params *params);
|
||||
int (*get_tx_stats)(struct ieee80211_hw *hw,
|
||||
|
@ -1095,6 +1095,18 @@ static int ieee80211_set_txq_params(struct wiphy *wiphy,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ieee80211_set_channel(struct wiphy *wiphy,
|
||||
struct ieee80211_channel *chan,
|
||||
enum nl80211_sec_chan_offset sec_chan_offset)
|
||||
{
|
||||
struct ieee80211_local *local = wiphy_priv(wiphy);
|
||||
|
||||
local->oper_channel = chan;
|
||||
local->oper_sec_chan_offset = sec_chan_offset;
|
||||
|
||||
return ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_CHANNEL);
|
||||
}
|
||||
|
||||
struct cfg80211_ops mac80211_config_ops = {
|
||||
.add_virtual_intf = ieee80211_add_iface,
|
||||
.del_virtual_intf = ieee80211_del_iface,
|
||||
@ -1122,4 +1134,5 @@ struct cfg80211_ops mac80211_config_ops = {
|
||||
#endif
|
||||
.change_bss = ieee80211_change_bss,
|
||||
.set_txq_params = ieee80211_set_txq_params,
|
||||
.set_channel = ieee80211_set_channel,
|
||||
};
|
||||
|
@ -626,6 +626,7 @@ struct ieee80211_local {
|
||||
struct delayed_work scan_work;
|
||||
struct ieee80211_sub_if_data *scan_sdata;
|
||||
struct ieee80211_channel *oper_channel, *scan_channel;
|
||||
enum nl80211_sec_chan_offset oper_sec_chan_offset;
|
||||
u8 scan_ssid[IEEE80211_MAX_SSID_LEN];
|
||||
size_t scan_ssid_len;
|
||||
struct list_head bss_list;
|
||||
|
@ -435,7 +435,11 @@ static int ieee80211_stop(struct net_device *dev)
|
||||
break;
|
||||
case NL80211_IFTYPE_STATION:
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
sdata->u.sta.state = IEEE80211_STA_MLME_DISABLED;
|
||||
/* Announce that we are leaving the network. */
|
||||
if (sdata->u.sta.state != IEEE80211_STA_MLME_DISABLED)
|
||||
ieee80211_sta_deauthenticate(sdata,
|
||||
WLAN_REASON_DEAUTH_LEAVING);
|
||||
|
||||
memset(sdata->u.sta.bssid, 0, ETH_ALEN);
|
||||
del_timer_sync(&sdata->u.sta.timer);
|
||||
/*
|
||||
@ -694,6 +698,10 @@ int ieee80211_if_change_type(struct ieee80211_sub_if_data *sdata,
|
||||
if (type == sdata->vif.type)
|
||||
return 0;
|
||||
|
||||
/* Setting ad-hoc mode on non-IBSS channel is not supported. */
|
||||
if (sdata->local->oper_channel->flags & IEEE80211_CHAN_NO_IBSS)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
/*
|
||||
* We could, here, on changes between IBSS/STA/MESH modes,
|
||||
* invoke an MLME function instead that disassociates etc.
|
||||
|
@ -195,19 +195,41 @@ int ieee80211_hw_config(struct ieee80211_local *local, u32 changed)
|
||||
struct ieee80211_channel *chan;
|
||||
int ret = 0;
|
||||
int power;
|
||||
enum nl80211_sec_chan_offset sec_chan_offset;
|
||||
|
||||
might_sleep();
|
||||
|
||||
if (local->sw_scanning)
|
||||
if (local->sw_scanning) {
|
||||
chan = local->scan_channel;
|
||||
else
|
||||
sec_chan_offset = NL80211_SEC_CHAN_NO_HT;
|
||||
} else {
|
||||
chan = local->oper_channel;
|
||||
|
||||
if (chan != local->hw.conf.channel) {
|
||||
local->hw.conf.channel = chan;
|
||||
changed |= IEEE80211_CONF_CHANGE_CHANNEL;
|
||||
sec_chan_offset = local->oper_sec_chan_offset;
|
||||
}
|
||||
|
||||
if (chan != local->hw.conf.channel ||
|
||||
sec_chan_offset != local->hw.conf.ht.sec_chan_offset) {
|
||||
local->hw.conf.channel = chan;
|
||||
switch (sec_chan_offset) {
|
||||
case NL80211_SEC_CHAN_NO_HT:
|
||||
local->hw.conf.ht.enabled = false;
|
||||
local->hw.conf.ht.sec_chan_offset = 0;
|
||||
break;
|
||||
case NL80211_SEC_CHAN_DISABLED:
|
||||
local->hw.conf.ht.enabled = true;
|
||||
local->hw.conf.ht.sec_chan_offset = 0;
|
||||
break;
|
||||
case NL80211_SEC_CHAN_BELOW:
|
||||
local->hw.conf.ht.enabled = true;
|
||||
local->hw.conf.ht.sec_chan_offset = -1;
|
||||
break;
|
||||
case NL80211_SEC_CHAN_ABOVE:
|
||||
local->hw.conf.ht.enabled = true;
|
||||
local->hw.conf.ht.sec_chan_offset = 1;
|
||||
break;
|
||||
}
|
||||
changed |= IEEE80211_CONF_CHANGE_CHANNEL;
|
||||
}
|
||||
|
||||
if (!local->hw.conf.power_level)
|
||||
power = chan->max_power;
|
||||
|
@ -855,16 +855,26 @@ static void ieee80211_set_disassoc(struct ieee80211_sub_if_data *sdata,
|
||||
if (self_disconnected || reason == WLAN_REASON_DISASSOC_STA_HAS_LEFT)
|
||||
ifsta->state = IEEE80211_STA_MLME_DISABLED;
|
||||
|
||||
sta_info_unlink(&sta);
|
||||
|
||||
rcu_read_unlock();
|
||||
|
||||
sta_info_destroy(sta);
|
||||
|
||||
local->hw.conf.ht.enabled = false;
|
||||
ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_HT);
|
||||
|
||||
ieee80211_bss_info_change_notify(sdata, changed);
|
||||
|
||||
rcu_read_lock();
|
||||
|
||||
sta = sta_info_get(local, ifsta->bssid);
|
||||
if (!sta) {
|
||||
rcu_read_unlock();
|
||||
return;
|
||||
}
|
||||
|
||||
sta_info_unlink(&sta);
|
||||
|
||||
rcu_read_unlock();
|
||||
|
||||
sta_info_destroy(sta);
|
||||
}
|
||||
|
||||
static int ieee80211_sta_wep_configured(struct ieee80211_sub_if_data *sdata)
|
||||
@ -2002,7 +2012,7 @@ static int ieee80211_sta_match_ssid(struct ieee80211_if_sta *ifsta,
|
||||
}
|
||||
}
|
||||
|
||||
if (hidden_ssid && ifsta->ssid_len == ssid_len)
|
||||
if (hidden_ssid && (ifsta->ssid_len == ssid_len || ssid_len == 0))
|
||||
return 1;
|
||||
|
||||
if (ssid_len == 1 && ssid[0] == ' ')
|
||||
|
@ -654,9 +654,13 @@ ieee80211_rx_h_decrypt(struct ieee80211_rx_data *rx)
|
||||
static void ap_sta_ps_start(struct sta_info *sta)
|
||||
{
|
||||
struct ieee80211_sub_if_data *sdata = sta->sdata;
|
||||
struct ieee80211_local *local = sdata->local;
|
||||
|
||||
atomic_inc(&sdata->bss->num_sta_ps);
|
||||
set_and_clear_sta_flags(sta, WLAN_STA_PS, WLAN_STA_PSPOLL);
|
||||
if (local->ops->sta_notify_ps)
|
||||
local->ops->sta_notify_ps(local_to_hw(local), STA_NOTIFY_SLEEP,
|
||||
&sta->sta);
|
||||
#ifdef CONFIG_MAC80211_VERBOSE_PS_DEBUG
|
||||
printk(KERN_DEBUG "%s: STA %pM aid %d enters power save mode\n",
|
||||
sdata->dev->name, sta->sta.addr, sta->sta.aid);
|
||||
@ -673,6 +677,9 @@ static int ap_sta_ps_end(struct sta_info *sta)
|
||||
atomic_dec(&sdata->bss->num_sta_ps);
|
||||
|
||||
clear_sta_flags(sta, WLAN_STA_PS | WLAN_STA_PSPOLL);
|
||||
if (local->ops->sta_notify_ps)
|
||||
local->ops->sta_notify_ps(local_to_hw(local), STA_NOTIFY_AWAKE,
|
||||
&sta->sta);
|
||||
|
||||
if (!skb_queue_empty(&sta->ps_tx_buf))
|
||||
sta_info_clear_tim_bit(sta);
|
||||
@ -741,17 +748,29 @@ ieee80211_rx_h_sta_process(struct ieee80211_rx_data *rx)
|
||||
sta->last_qual = rx->status->qual;
|
||||
sta->last_noise = rx->status->noise;
|
||||
|
||||
/*
|
||||
* Change STA power saving mode only at the end of a frame
|
||||
* exchange sequence.
|
||||
*/
|
||||
if (!ieee80211_has_morefrags(hdr->frame_control) &&
|
||||
(rx->sdata->vif.type == NL80211_IFTYPE_AP ||
|
||||
rx->sdata->vif.type == NL80211_IFTYPE_AP_VLAN)) {
|
||||
/* Change STA power saving mode only in the end of a frame
|
||||
* exchange sequence */
|
||||
if (test_sta_flags(sta, WLAN_STA_PS) &&
|
||||
!ieee80211_has_pm(hdr->frame_control))
|
||||
rx->sent_ps_buffered += ap_sta_ps_end(sta);
|
||||
else if (!test_sta_flags(sta, WLAN_STA_PS) &&
|
||||
ieee80211_has_pm(hdr->frame_control))
|
||||
ap_sta_ps_start(sta);
|
||||
if (test_sta_flags(sta, WLAN_STA_PS)) {
|
||||
/*
|
||||
* Ignore doze->wake transitions that are
|
||||
* indicated by non-data frames, the standard
|
||||
* is unclear here, but for example going to
|
||||
* PS mode and then scanning would cause a
|
||||
* doze->wake transition for the probe request,
|
||||
* and that is clearly undesirable.
|
||||
*/
|
||||
if (ieee80211_is_data(hdr->frame_control) &&
|
||||
!ieee80211_has_pm(hdr->frame_control))
|
||||
rx->sent_ps_buffered += ap_sta_ps_end(sta);
|
||||
} else {
|
||||
if (ieee80211_has_pm(hdr->frame_control))
|
||||
ap_sta_ps_start(sta);
|
||||
}
|
||||
}
|
||||
|
||||
/* Drop data::nullfunc frames silently, since they are used only to
|
||||
|
@ -1779,8 +1779,7 @@ void ieee80211_tx_pending(unsigned long data)
|
||||
|
||||
/* functions for drivers to get certain frames */
|
||||
|
||||
static void ieee80211_beacon_add_tim(struct ieee80211_local *local,
|
||||
struct ieee80211_if_ap *bss,
|
||||
static void ieee80211_beacon_add_tim(struct ieee80211_if_ap *bss,
|
||||
struct sk_buff *skb,
|
||||
struct beacon_data *beacon)
|
||||
{
|
||||
@ -1848,7 +1847,6 @@ struct sk_buff *ieee80211_beacon_get(struct ieee80211_hw *hw,
|
||||
struct ieee80211_local *local = hw_to_local(hw);
|
||||
struct sk_buff *skb = NULL;
|
||||
struct ieee80211_tx_info *info;
|
||||
struct net_device *bdev;
|
||||
struct ieee80211_sub_if_data *sdata = NULL;
|
||||
struct ieee80211_if_ap *ap = NULL;
|
||||
struct ieee80211_if_sta *ifsta = NULL;
|
||||
@ -1861,7 +1859,6 @@ struct sk_buff *ieee80211_beacon_get(struct ieee80211_hw *hw,
|
||||
rcu_read_lock();
|
||||
|
||||
sdata = vif_to_sdata(vif);
|
||||
bdev = sdata->dev;
|
||||
|
||||
if (sdata->vif.type == NL80211_IFTYPE_AP) {
|
||||
ap = &sdata->u.ap;
|
||||
@ -1889,12 +1886,12 @@ struct sk_buff *ieee80211_beacon_get(struct ieee80211_hw *hw,
|
||||
* of the tim bitmap in mac80211 and the driver.
|
||||
*/
|
||||
if (local->tim_in_locked_section) {
|
||||
ieee80211_beacon_add_tim(local, ap, skb, beacon);
|
||||
ieee80211_beacon_add_tim(ap, skb, beacon);
|
||||
} else {
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&local->sta_lock, flags);
|
||||
ieee80211_beacon_add_tim(local, ap, skb, beacon);
|
||||
ieee80211_beacon_add_tim(ap, skb, beacon);
|
||||
spin_unlock_irqrestore(&local->sta_lock, flags);
|
||||
}
|
||||
|
||||
@ -2016,14 +2013,12 @@ ieee80211_get_buffered_bc(struct ieee80211_hw *hw,
|
||||
struct sk_buff *skb = NULL;
|
||||
struct sta_info *sta;
|
||||
struct ieee80211_tx_data tx;
|
||||
struct net_device *bdev;
|
||||
struct ieee80211_sub_if_data *sdata;
|
||||
struct ieee80211_if_ap *bss = NULL;
|
||||
struct beacon_data *beacon;
|
||||
struct ieee80211_tx_info *info;
|
||||
|
||||
sdata = vif_to_sdata(vif);
|
||||
bdev = sdata->dev;
|
||||
bss = &sdata->u.ap;
|
||||
|
||||
if (!bss)
|
||||
|
@ -641,6 +641,7 @@ int ieee80211_set_freq(struct ieee80211_sub_if_data *sdata, int freqMHz)
|
||||
chan->flags & IEEE80211_CHAN_NO_IBSS)
|
||||
return ret;
|
||||
local->oper_channel = chan;
|
||||
local->oper_sec_chan_offset = NL80211_SEC_CHAN_NO_HT;
|
||||
|
||||
if (local->sw_scanning || local->hw_scanning)
|
||||
ret = 0;
|
||||
|
@ -135,48 +135,6 @@ static int ieee80211_ioctl_siwgenie(struct net_device *dev,
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
static int ieee80211_ioctl_giwname(struct net_device *dev,
|
||||
struct iw_request_info *info,
|
||||
char *name, char *extra)
|
||||
{
|
||||
struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr);
|
||||
struct ieee80211_supported_band *sband;
|
||||
u8 is_ht = 0, is_a = 0, is_b = 0, is_g = 0;
|
||||
|
||||
|
||||
sband = local->hw.wiphy->bands[IEEE80211_BAND_5GHZ];
|
||||
if (sband) {
|
||||
is_a = 1;
|
||||
is_ht |= sband->ht_cap.ht_supported;
|
||||
}
|
||||
|
||||
sband = local->hw.wiphy->bands[IEEE80211_BAND_2GHZ];
|
||||
if (sband) {
|
||||
int i;
|
||||
/* Check for mandatory rates */
|
||||
for (i = 0; i < sband->n_bitrates; i++) {
|
||||
if (sband->bitrates[i].bitrate == 10)
|
||||
is_b = 1;
|
||||
if (sband->bitrates[i].bitrate == 60)
|
||||
is_g = 1;
|
||||
}
|
||||
is_ht |= sband->ht_cap.ht_supported;
|
||||
}
|
||||
|
||||
strcpy(name, "IEEE 802.11");
|
||||
if (is_a)
|
||||
strcat(name, "a");
|
||||
if (is_b)
|
||||
strcat(name, "b");
|
||||
if (is_g)
|
||||
strcat(name, "g");
|
||||
if (is_ht)
|
||||
strcat(name, "n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int ieee80211_ioctl_giwrange(struct net_device *dev,
|
||||
struct iw_request_info *info,
|
||||
struct iw_point *data, char *extra)
|
||||
@ -266,78 +224,6 @@ static int ieee80211_ioctl_giwrange(struct net_device *dev,
|
||||
}
|
||||
|
||||
|
||||
static int ieee80211_ioctl_siwmode(struct net_device *dev,
|
||||
struct iw_request_info *info,
|
||||
__u32 *mode, char *extra)
|
||||
{
|
||||
struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
|
||||
struct ieee80211_local *local = sdata->local;
|
||||
int type;
|
||||
|
||||
if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
switch (*mode) {
|
||||
case IW_MODE_INFRA:
|
||||
type = NL80211_IFTYPE_STATION;
|
||||
break;
|
||||
case IW_MODE_ADHOC:
|
||||
/* Setting ad-hoc mode on non ibss channel is not
|
||||
* supported.
|
||||
*/
|
||||
if (local->oper_channel &&
|
||||
(local->oper_channel->flags & IEEE80211_CHAN_NO_IBSS))
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
type = NL80211_IFTYPE_ADHOC;
|
||||
break;
|
||||
case IW_MODE_REPEAT:
|
||||
type = NL80211_IFTYPE_WDS;
|
||||
break;
|
||||
case IW_MODE_MONITOR:
|
||||
type = NL80211_IFTYPE_MONITOR;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return ieee80211_if_change_type(sdata, type);
|
||||
}
|
||||
|
||||
|
||||
static int ieee80211_ioctl_giwmode(struct net_device *dev,
|
||||
struct iw_request_info *info,
|
||||
__u32 *mode, char *extra)
|
||||
{
|
||||
struct ieee80211_sub_if_data *sdata;
|
||||
|
||||
sdata = IEEE80211_DEV_TO_SUB_IF(dev);
|
||||
switch (sdata->vif.type) {
|
||||
case NL80211_IFTYPE_AP:
|
||||
*mode = IW_MODE_MASTER;
|
||||
break;
|
||||
case NL80211_IFTYPE_STATION:
|
||||
*mode = IW_MODE_INFRA;
|
||||
break;
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
*mode = IW_MODE_ADHOC;
|
||||
break;
|
||||
case NL80211_IFTYPE_MONITOR:
|
||||
*mode = IW_MODE_MONITOR;
|
||||
break;
|
||||
case NL80211_IFTYPE_WDS:
|
||||
*mode = IW_MODE_REPEAT;
|
||||
break;
|
||||
case NL80211_IFTYPE_AP_VLAN:
|
||||
*mode = IW_MODE_SECOND; /* FIXME */
|
||||
break;
|
||||
default:
|
||||
*mode = IW_MODE_AUTO;
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ieee80211_ioctl_siwfreq(struct net_device *dev,
|
||||
struct iw_request_info *info,
|
||||
struct iw_freq *freq, char *extra)
|
||||
@ -1146,13 +1032,13 @@ static int ieee80211_ioctl_siwencodeext(struct net_device *dev,
|
||||
static const iw_handler ieee80211_handler[] =
|
||||
{
|
||||
(iw_handler) NULL, /* SIOCSIWCOMMIT */
|
||||
(iw_handler) ieee80211_ioctl_giwname, /* SIOCGIWNAME */
|
||||
(iw_handler) cfg80211_wext_giwname, /* SIOCGIWNAME */
|
||||
(iw_handler) NULL, /* SIOCSIWNWID */
|
||||
(iw_handler) NULL, /* SIOCGIWNWID */
|
||||
(iw_handler) ieee80211_ioctl_siwfreq, /* SIOCSIWFREQ */
|
||||
(iw_handler) ieee80211_ioctl_giwfreq, /* SIOCGIWFREQ */
|
||||
(iw_handler) ieee80211_ioctl_siwmode, /* SIOCSIWMODE */
|
||||
(iw_handler) ieee80211_ioctl_giwmode, /* SIOCGIWMODE */
|
||||
(iw_handler) cfg80211_wext_siwmode, /* SIOCSIWMODE */
|
||||
(iw_handler) cfg80211_wext_giwmode, /* SIOCGIWMODE */
|
||||
(iw_handler) NULL, /* SIOCSIWSENS */
|
||||
(iw_handler) NULL, /* SIOCGIWSENS */
|
||||
(iw_handler) NULL /* not used */, /* SIOCSIWRANGE */
|
||||
|
@ -6,4 +6,5 @@ obj-$(CONFIG_LIB80211_CRYPT_CCMP) += lib80211_crypt_ccmp.o
|
||||
obj-$(CONFIG_LIB80211_CRYPT_TKIP) += lib80211_crypt_tkip.o
|
||||
|
||||
cfg80211-y += core.o sysfs.o radiotap.o util.o reg.o
|
||||
cfg80211-$(CONFIG_WIRELESS_EXT) += wext-compat.o
|
||||
cfg80211-$(CONFIG_NL80211) += nl80211.o
|
||||
|
@ -59,6 +59,8 @@ static struct nla_policy nl80211_policy[NL80211_ATTR_MAX+1] __read_mostly = {
|
||||
[NL80211_ATTR_WIPHY_NAME] = { .type = NLA_NUL_STRING,
|
||||
.len = BUS_ID_SIZE-1 },
|
||||
[NL80211_ATTR_WIPHY_TXQ_PARAMS] = { .type = NLA_NESTED },
|
||||
[NL80211_ATTR_WIPHY_FREQ] = { .type = NLA_U32 },
|
||||
[NL80211_ATTR_WIPHY_SEC_CHAN_OFFSET] = { .type = NLA_U32 },
|
||||
|
||||
[NL80211_ATTR_IFTYPE] = { .type = NLA_U32 },
|
||||
[NL80211_ATTR_IFINDEX] = { .type = NLA_U32 },
|
||||
@ -359,6 +361,61 @@ static int nl80211_set_wiphy(struct sk_buff *skb, struct genl_info *info)
|
||||
}
|
||||
}
|
||||
|
||||
if (info->attrs[NL80211_ATTR_WIPHY_FREQ]) {
|
||||
enum nl80211_sec_chan_offset sec_chan_offset =
|
||||
NL80211_SEC_CHAN_NO_HT;
|
||||
struct ieee80211_channel *chan;
|
||||
u32 freq, sec_freq;
|
||||
|
||||
if (!rdev->ops->set_channel) {
|
||||
result = -EOPNOTSUPP;
|
||||
goto bad_res;
|
||||
}
|
||||
|
||||
if (info->attrs[NL80211_ATTR_WIPHY_SEC_CHAN_OFFSET]) {
|
||||
sec_chan_offset = nla_get_u32(
|
||||
info->attrs[
|
||||
NL80211_ATTR_WIPHY_SEC_CHAN_OFFSET]);
|
||||
if (sec_chan_offset != NL80211_SEC_CHAN_NO_HT &&
|
||||
sec_chan_offset != NL80211_SEC_CHAN_DISABLED &&
|
||||
sec_chan_offset != NL80211_SEC_CHAN_BELOW &&
|
||||
sec_chan_offset != NL80211_SEC_CHAN_ABOVE) {
|
||||
result = -EINVAL;
|
||||
goto bad_res;
|
||||
}
|
||||
}
|
||||
|
||||
freq = nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_FREQ]);
|
||||
chan = ieee80211_get_channel(&rdev->wiphy, freq);
|
||||
if (!chan || chan->flags & IEEE80211_CHAN_DISABLED) {
|
||||
/* Primary channel not allowed */
|
||||
result = -EINVAL;
|
||||
goto bad_res;
|
||||
}
|
||||
if (sec_chan_offset == NL80211_SEC_CHAN_BELOW)
|
||||
sec_freq = freq - 20;
|
||||
else if (sec_chan_offset == NL80211_SEC_CHAN_ABOVE)
|
||||
sec_freq = freq + 20;
|
||||
else
|
||||
sec_freq = 0;
|
||||
|
||||
if (sec_freq) {
|
||||
struct ieee80211_channel *schan;
|
||||
schan = ieee80211_get_channel(&rdev->wiphy, sec_freq);
|
||||
if (!schan || schan->flags & IEEE80211_CHAN_DISABLED) {
|
||||
/* Secondary channel not allowed */
|
||||
result = -EINVAL;
|
||||
goto bad_res;
|
||||
}
|
||||
}
|
||||
|
||||
result = rdev->ops->set_channel(&rdev->wiphy, chan,
|
||||
sec_chan_offset);
|
||||
if (result)
|
||||
goto bad_res;
|
||||
}
|
||||
|
||||
|
||||
bad_res:
|
||||
cfg80211_put_dev(rdev);
|
||||
return result;
|
||||
|
@ -989,6 +989,9 @@ void regulatory_hint_11d(struct wiphy *wiphy,
|
||||
u32 checksum = 0;
|
||||
enum environment_cap env = ENVIRON_ANY;
|
||||
|
||||
if (!last_request)
|
||||
return;
|
||||
|
||||
mutex_lock(&cfg80211_drv_mutex);
|
||||
|
||||
/* IE len must be evenly divisible by 2 */
|
||||
@ -1330,7 +1333,7 @@ int set_regdom(const struct ieee80211_regdomain *rd)
|
||||
/* Caller must hold cfg80211_drv_mutex */
|
||||
void reg_device_remove(struct wiphy *wiphy)
|
||||
{
|
||||
if (!last_request->wiphy)
|
||||
if (!last_request || !last_request->wiphy)
|
||||
return;
|
||||
if (last_request->wiphy != wiphy)
|
||||
return;
|
||||
|
139
net/wireless/wext-compat.c
Normal file
139
net/wireless/wext-compat.c
Normal file
@ -0,0 +1,139 @@
|
||||
/*
|
||||
* cfg80211 - wext compat code
|
||||
*
|
||||
* This is temporary code until all wireless functionality is migrated
|
||||
* into cfg80211, when that happens all the exports here go away and
|
||||
* we directly assign the wireless handlers of wireless interfaces.
|
||||
*
|
||||
* Copyright 2008 Johannes Berg <johannes@sipsolutions.net>
|
||||
*/
|
||||
|
||||
#include <linux/wireless.h>
|
||||
#include <linux/nl80211.h>
|
||||
#include <net/iw_handler.h>
|
||||
#include <net/wireless.h>
|
||||
#include <net/cfg80211.h>
|
||||
#include "core.h"
|
||||
|
||||
int cfg80211_wext_giwname(struct net_device *dev,
|
||||
struct iw_request_info *info,
|
||||
char *name, char *extra)
|
||||
{
|
||||
struct wireless_dev *wdev = dev->ieee80211_ptr;
|
||||
struct ieee80211_supported_band *sband;
|
||||
bool is_ht = false, is_a = false, is_b = false, is_g = false;
|
||||
|
||||
if (!wdev)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
sband = wdev->wiphy->bands[IEEE80211_BAND_5GHZ];
|
||||
if (sband) {
|
||||
is_a = true;
|
||||
is_ht |= sband->ht_cap.ht_supported;
|
||||
}
|
||||
|
||||
sband = wdev->wiphy->bands[IEEE80211_BAND_2GHZ];
|
||||
if (sband) {
|
||||
int i;
|
||||
/* Check for mandatory rates */
|
||||
for (i = 0; i < sband->n_bitrates; i++) {
|
||||
if (sband->bitrates[i].bitrate == 10)
|
||||
is_b = true;
|
||||
if (sband->bitrates[i].bitrate == 60)
|
||||
is_g = true;
|
||||
}
|
||||
is_ht |= sband->ht_cap.ht_supported;
|
||||
}
|
||||
|
||||
strcpy(name, "IEEE 802.11");
|
||||
if (is_a)
|
||||
strcat(name, "a");
|
||||
if (is_b)
|
||||
strcat(name, "b");
|
||||
if (is_g)
|
||||
strcat(name, "g");
|
||||
if (is_ht)
|
||||
strcat(name, "n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(cfg80211_wext_giwname);
|
||||
|
||||
int cfg80211_wext_siwmode(struct net_device *dev, struct iw_request_info *info,
|
||||
u32 *mode, char *extra)
|
||||
{
|
||||
struct wireless_dev *wdev = dev->ieee80211_ptr;
|
||||
struct cfg80211_registered_device *rdev;
|
||||
struct vif_params vifparams;
|
||||
enum nl80211_iftype type;
|
||||
|
||||
if (!wdev)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
rdev = wiphy_to_dev(wdev->wiphy);
|
||||
|
||||
if (!rdev->ops->change_virtual_intf)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
/* don't support changing VLANs, you just re-create them */
|
||||
if (wdev->iftype == NL80211_IFTYPE_AP_VLAN)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
switch (*mode) {
|
||||
case IW_MODE_INFRA:
|
||||
type = NL80211_IFTYPE_STATION;
|
||||
break;
|
||||
case IW_MODE_ADHOC:
|
||||
type = NL80211_IFTYPE_ADHOC;
|
||||
break;
|
||||
case IW_MODE_REPEAT:
|
||||
type = NL80211_IFTYPE_WDS;
|
||||
break;
|
||||
case IW_MODE_MONITOR:
|
||||
type = NL80211_IFTYPE_MONITOR;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
memset(&vifparams, 0, sizeof(vifparams));
|
||||
|
||||
return rdev->ops->change_virtual_intf(wdev->wiphy, dev->ifindex, type,
|
||||
NULL, &vifparams);
|
||||
}
|
||||
EXPORT_SYMBOL(cfg80211_wext_siwmode);
|
||||
|
||||
int cfg80211_wext_giwmode(struct net_device *dev, struct iw_request_info *info,
|
||||
u32 *mode, char *extra)
|
||||
{
|
||||
struct wireless_dev *wdev = dev->ieee80211_ptr;
|
||||
|
||||
if (!wdev)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
switch (wdev->iftype) {
|
||||
case NL80211_IFTYPE_AP:
|
||||
*mode = IW_MODE_MASTER;
|
||||
break;
|
||||
case NL80211_IFTYPE_STATION:
|
||||
*mode = IW_MODE_INFRA;
|
||||
break;
|
||||
case NL80211_IFTYPE_ADHOC:
|
||||
*mode = IW_MODE_ADHOC;
|
||||
break;
|
||||
case NL80211_IFTYPE_MONITOR:
|
||||
*mode = IW_MODE_MONITOR;
|
||||
break;
|
||||
case NL80211_IFTYPE_WDS:
|
||||
*mode = IW_MODE_REPEAT;
|
||||
break;
|
||||
case NL80211_IFTYPE_AP_VLAN:
|
||||
*mode = IW_MODE_SECOND; /* FIXME */
|
||||
break;
|
||||
default:
|
||||
*mode = IW_MODE_AUTO;
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(cfg80211_wext_giwmode);
|
Reference in New Issue
Block a user