android_kernel_xiaomi_sm8450/arch/riscv
Björn Töpel bbc500ff3f riscv, bpf: Fix inconsistent JIT image generation
[ Upstream commit c56fb2aab23505bb7160d06097c8de100b82b851 ]

In order to generate the prologue and epilogue, the BPF JIT needs to
know which registers that are clobbered. Therefore, the during
pre-final passes, the prologue is generated after the body of the
program body-prologue-epilogue. Then, in the final pass, a proper
prologue-body-epilogue JITted image is generated.

This scheme has worked most of the time. However, for some large
programs with many jumps, e.g. the test_kmod.sh BPF selftest with
hardening enabled (blinding constants), this has shown to be
incorrect. For the final pass, when the proper prologue-body-epilogue
is generated, the image has not converged. This will lead to that the
final image will have incorrect jump offsets. The following is an
excerpt from an incorrect image:

  | ...
  |     3b8:       00c50663                beq     a0,a2,3c4 <.text+0x3c4>
  |     3bc:       0020e317                auipc   t1,0x20e
  |     3c0:       49630067                jalr    zero,1174(t1) # 20e852 <.text+0x20e852>
  | ...
  |  20e84c:       8796                    c.mv    a5,t0
  |  20e84e:       6422                    c.ldsp  s0,8(sp)    # Epilogue start
  |  20e850:       6141                    c.addi16sp      sp,16
  |  20e852:       853e                    c.mv    a0,a5       # Incorrect jump target
  |  20e854:       8082                    c.jr    ra

The image has shrunk, and the epilogue offset is incorrect in the
final pass.

Correct the problem by always generating proper prologue-body-epilogue
outputs, which means that the first pass will only generate the body
to track what registers that are touched.

Fixes: 2353ecc6f9 ("bpf, riscv: add BPF JIT for RV64G")
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/bpf/20230710074131.19596-1-bjorn@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
2023-07-27 08:44:23 +02:00
..
boot riscv: dts: sifive unleashed: Add PWM controlled LEDs 2022-12-02 17:39:57 +01:00
configs riscv: defconfig: enable gpio support for HiFive Unleashed 2021-01-27 11:55:01 +01:00
include mm: rename pud_page_vaddr to pud_pgtable and make it return pmd_t * 2023-07-27 08:43:58 +02:00
kernel riscv: add icache flush for nommu sigreturn trampoline 2023-04-20 12:10:27 +02:00
lib riscv: use memcpy based uaccess for nommu again 2020-10-04 10:27:07 -07:00
mm riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte 2023-02-15 17:22:26 +01:00
net riscv, bpf: Fix inconsistent JIT image generation 2023-07-27 08:44:23 +02:00
Kbuild riscv: Allow device trees to be built into the kernel 2020-05-18 11:38:05 -07:00
Kconfig riscv: fix kprobe __user string arg print fault issue 2023-06-14 11:09:57 +02:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.socs RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
Makefile riscv: Handle zicsr/zifencei issues between clang and binutils 2023-04-20 12:10:28 +02:00