Mao Jinlong 3a2983bb5e byte-cntr: Enable qdss clock before getting the rwp offset ... QDSS clock need to be enabled before reading the etr rwp offset otherwise there will be register access issue. Change-Id: Ie9ba3f3ae742d3f319bece47508fd6e636f608c7 Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>		2021-11-05 17:03:06 +08:00
..
coresight	byte-cntr: Enable qdss clock before getting the rwp offset	2021-11-05 17:03:06 +08:00
intel_th	intel_th: Wait until port is in reset before programming it	2021-07-20 16:05:46 +02:00
stm	stm: Add __nocfi to stm functions and use rcu notrace functions	2021-07-22 22:57:24 -07:00
Kconfig	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00