After seeing, at best, "guesses" as to the following kind of information in several drivers, I decided that we really need a way for platforms to specifically give advice in this area for what works best with their PCI controller implementation. Basically, this new interface gives DMA bursting advice on PCI. There are three forms of the advice: 1) Burst as much as possible, it is not necessary to end bursts on some particular boundary for best performance. 2) Burst on some byte count multiple. A DMA burst to some multiple of number of bytes may be done, but it is important to end the burst on an exact multiple for best performance. The best example of this I am aware of are the PPC64 PCI controllers, where if you end a burst mid-cacheline then chip has to refetch the data and the IOMMU translations which hurts performance a lot. 3) Burst on a single byte count multiple. Bursts shall end exactly on the next multiple boundary for best performance. Sparc64 and Alpha's PCI controllers operate this way. They disconnect any device which tries to burst across a cacheline boundary. Actually, newer sparc64 PCI controllers do not have this behavior. That is why the "pdev" is passed into the interface, so I can add code later to check which PCI controller the system is using and give advice accordingly. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
97 lines
3.1 KiB
C
97 lines
3.1 KiB
C
/*
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* include/asm-v850/pci.h -- PCI support
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*
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* Copyright (C) 2001,02 NEC Corporation
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* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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*/
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#ifndef __V850_PCI_H__
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#define __V850_PCI_H__
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/* Get any platform-dependent definitions. */
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#include <asm/machdep.h>
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#define pcibios_scan_all_fns(a, b) 0
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/* Generic declarations. */
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struct scatterlist;
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extern void pcibios_set_master (struct pci_dev *dev);
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/* `Grant' to PDEV the memory block at CPU_ADDR, for doing DMA. The
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32-bit PCI bus mastering address to use is returned. the device owns
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this memory until either pci_unmap_single or pci_dma_sync_single_for_cpu is
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performed. */
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extern dma_addr_t
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pci_map_single (struct pci_dev *pdev, void *cpu_addr, size_t size, int dir);
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/* Return to the CPU the PCI DMA memory block previously `granted' to
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PDEV, at DMA_ADDR. */
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extern void
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pci_unmap_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
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int dir);
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/* Make physical memory consistent for a single streaming mode DMA
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translation after a transfer.
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If you perform a pci_map_single() but wish to interrogate the
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buffer using the cpu, yet do not wish to teardown the PCI dma
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mapping, you must call this function before doing so. At the next
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point you give the PCI dma address back to the card, you must first
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perform a pci_dma_sync_for_device, and then the device again owns
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the buffer. */
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extern void
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pci_dma_sync_single_for_cpu (struct pci_dev *dev, dma_addr_t dma_addr, size_t size,
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int dir);
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extern void
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pci_dma_sync_single_for_device (struct pci_dev *dev, dma_addr_t dma_addr, size_t size,
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int dir);
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/* Do multiple DMA mappings at once. */
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extern int
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pci_map_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, int dir);
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/* Unmap multiple DMA mappings at once. */
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extern void
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pci_unmap_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len,
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int dir);
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/* Allocate and map kernel buffer using consistent mode DMA for PCI
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device. Returns non-NULL cpu-view pointer to the buffer if
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successful and sets *DMA_ADDR to the pci side dma address as well,
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else DMA_ADDR is undefined. */
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extern void *
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pci_alloc_consistent (struct pci_dev *pdev, size_t size, dma_addr_t *dma_addr);
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/* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must
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be values that were returned from pci_alloc_consistent. SIZE must be
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the same as what as passed into pci_alloc_consistent. References to
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the memory and mappings assosciated with CPU_ADDR or DMA_ADDR past
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this call are illegal. */
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extern void
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pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr);
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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unsigned long *strategy_parameter)
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{
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*strat = PCI_DMA_BURST_INFINITY;
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*strategy_parameter = ~0UL;
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}
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static inline void pcibios_add_platform_entries(struct pci_dev *dev)
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{
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}
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#endif /* __V850_PCI_H__ */
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