Laxman Dewangan
e245f54a06
ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
...
Add OF_DEV_AUXDATA for sflash controller driver for Tegra20
board dt files.
Set the parent clock of sflash controller to PLLP and configure
clock to 20MHz.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-13 11:42:39 -07:00
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