Victor(Weiguo) Pan e0ee1a75f4 pwm: tegra: Allow 100 % duty cycle
To get 100 % duty cycle (always high), pulse width needs to be set to
256.

Signed-off-by: Victor(Weiguo) Pan <wpan@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2016-07-11 12:49:32 +02:00
..
2016-07-11 12:49:29 +02:00
2016-07-11 12:49:29 +02:00
2015-07-20 09:46:06 +02:00
2016-05-03 13:44:37 +02:00
2016-07-11 12:49:32 +02:00
2016-05-17 14:48:04 +02:00