Remove the secure device check for the LLCC miss profiling driver as it is not needed. Change-Id: Ie758b32d163d7a72197620f3b061acafc51cbd1f Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
488 lines
20 KiB
C
488 lines
20 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2010-2015, 2018-2020 The Linux Foundation. All rights reserved.
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* Copyright (C) 2015 Linaro Ltd.
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*/
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#ifndef __QCOM_SCM_H
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#define __QCOM_SCM_H
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#include <linux/err.h>
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#include <linux/types.h>
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#include <linux/cpumask.h>
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#define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
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#define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0
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#define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1
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#define QCOM_SCM_HDCP_MAX_REQ_CNT 5
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enum qcom_download_mode {
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QCOM_DOWNLOAD_NODUMP = 0x00,
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QCOM_DOWNLOAD_EDL = 0x01,
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QCOM_DOWNLOAD_FULLDUMP = 0x10,
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QCOM_DOWNLOAD_MINIDUMP = 0x20,
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};
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enum qcom_scm_ocmem_client {
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QCOM_SCM_OCMEM_UNUSED_ID = 0x0,
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QCOM_SCM_OCMEM_GRAPHICS_ID,
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QCOM_SCM_OCMEM_VIDEO_ID,
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QCOM_SCM_OCMEM_LP_AUDIO_ID,
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QCOM_SCM_OCMEM_SENSORS_ID,
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QCOM_SCM_OCMEM_OTHER_OS_ID,
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QCOM_SCM_OCMEM_DEBUG_ID,
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};
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struct qcom_scm_hdcp_req {
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u32 addr;
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u32 val;
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};
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struct qcom_scm_vmperm {
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int vmid;
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int perm;
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};
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struct qcom_scm_current_perm_info {
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__le32 vmid;
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__le32 perm;
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__le64 ctx;
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__le32 ctx_size;
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__le32 unused;
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};
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struct qcom_scm_mem_map_info {
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__le64 mem_addr;
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__le64 mem_size;
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};
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enum qcom_scm_ice_cipher {
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QCOM_SCM_ICE_CIPHER_AES_128_XTS = 0,
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QCOM_SCM_ICE_CIPHER_AES_128_CBC = 1,
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QCOM_SCM_ICE_CIPHER_AES_256_XTS = 3,
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QCOM_SCM_ICE_CIPHER_AES_256_CBC = 4,
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};
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#define QCOM_SCM_VMID_HLOS 0x3
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#define QCOM_SCM_VMID_MSS_MSA 0xF
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#define QCOM_SCM_VMID_WLAN 0x18
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#define QCOM_SCM_VMID_WLAN_CE 0x19
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#define QCOM_SCM_PERM_READ 0x4
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#define QCOM_SCM_PERM_WRITE 0x2
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#define QCOM_SCM_PERM_EXEC 0x1
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#define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE)
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#define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC)
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static inline void qcom_scm_populate_vmperm_info(
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struct qcom_scm_current_perm_info *destvm, int vmid, int perm)
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{
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if (!destvm)
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return;
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destvm->vmid = cpu_to_le32(vmid);
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destvm->perm = cpu_to_le32(perm);
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destvm->ctx = 0;
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destvm->ctx_size = 0;
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}
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static inline void qcom_scm_populate_mem_map_info(
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struct qcom_scm_mem_map_info *mem_to_map,
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phys_addr_t mem_addr, size_t mem_size)
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{
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if (!mem_to_map)
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return;
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mem_to_map->mem_addr = cpu_to_le64(mem_addr);
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mem_to_map->mem_size = cpu_to_le64(mem_size);
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}
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#if IS_ENABLED(CONFIG_QCOM_SCM)
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extern bool qcom_scm_is_available(void);
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extern void *qcom_get_scm_device(void);
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extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
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extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
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extern void qcom_scm_cpu_power_down(u32 flags);
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extern int qcom_scm_sec_wdog_deactivate(void);
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extern int qcom_scm_sec_wdog_trigger(void);
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extern void qcom_scm_disable_sdi(void);
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extern int qcom_scm_set_remote_state(u32 state, u32 id);
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extern int qcom_scm_spin_cpu(void);
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extern void qcom_scm_set_download_mode(enum qcom_download_mode mode,
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phys_addr_t tcsr_boot_misc);
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extern int qcom_scm_config_cpu_errata(void);
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extern int qcom_scm_pas_init_image(u32 peripheral, dma_addr_t metadata);
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extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
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phys_addr_t size);
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extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
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extern int qcom_scm_pas_shutdown(u32 peripheral);
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extern int qcom_scm_pas_shutdown_retry(u32 peripheral);
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extern bool qcom_scm_pas_supported(u32 peripheral);
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extern int qcom_scm_get_sec_dump_state(u32 *dump_state);
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extern int qcom_scm_get_llcc_missrate(phys_addr_t in_buf, size_t in_buf_size,
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phys_addr_t out_buf, size_t out_buf_size);
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extern int qcom_scm_assign_dump_table_region(bool is_assign, phys_addr_t addr, size_t size);
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extern int qcom_scm_tz_blsp_modify_owner(int food, u64 subsystem, int *out);
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extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
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extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
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extern int qcom_scm_io_reset(void);
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extern bool qcom_scm_is_secure_wdog_trigger_available(void);
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extern bool qcom_scm_is_mode_switch_available(void);
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extern int qcom_scm_get_jtag_etm_feat_id(u64 *version);
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extern void qcom_scm_halt_spmi_pmic_arbiter(void);
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extern void qcom_scm_deassert_ps_hold(void);
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extern void qcom_scm_mmu_sync(bool sync);
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extern bool qcom_scm_restore_sec_cfg_available(void);
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extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
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extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
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extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
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extern int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size,
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u32 cp_nonpixel_start,
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u32 cp_nonpixel_size);
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extern int qcom_scm_mem_protect_region_id(phys_addr_t paddr, size_t size);
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extern int qcom_scm_mem_protect_lock_id2_flat(phys_addr_t list_addr,
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size_t list_size, size_t chunk_size,
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size_t memory_usage, int lock);
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extern int qcom_scm_iommu_secure_map(phys_addr_t sg_list_addr, size_t num_sg,
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size_t sg_block_size, u64 sec_id, int cbndx,
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unsigned long iova, size_t total_len);
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extern int qcom_scm_iommu_secure_unmap(u64 sec_id, int cbndx,
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unsigned long iova, size_t total_len);
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extern int
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qcom_scm_assign_mem_regions(struct qcom_scm_mem_map_info *mem_regions,
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size_t mem_regions_sz, u32 *srcvms, size_t src_sz,
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struct qcom_scm_current_perm_info *newvms,
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size_t newvms_sz);
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extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
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unsigned int *src,
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const struct qcom_scm_vmperm *newvm,
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unsigned int dest_cnt);
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extern int qcom_scm_mem_protect_sd_ctrl(u32 devid, phys_addr_t mem_addr,
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u64 mem_size, u32 vmid);
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extern int qcom_scm_get_feat_version_cp(u64 *version);
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extern bool qcom_scm_kgsl_set_smmu_aperture_available(void);
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extern int qcom_scm_kgsl_set_smmu_aperture(
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unsigned int num_context_bank);
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extern int qcom_scm_kgsl_set_smmu_lpac_aperture(
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unsigned int num_context_bank);
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extern int qcom_scm_enable_shm_bridge(void);
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extern int qcom_scm_delete_shm_bridge(u64 handle);
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extern int qcom_scm_create_shm_bridge(u64 pfn_and_ns_perm_flags,
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u64 ipfn_and_s_perm_flags, u64 size_and_flags,
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u64 ns_vmids, u64 *handle);
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extern int qcom_scm_smmu_prepare_atos_id(u64 dev_id, int cb_num, int operation);
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extern int qcom_mdf_assign_memory_to_subsys(u64 start_addr,
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u64 end_addr, phys_addr_t paddr, u64 size);
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extern bool qcom_scm_dcvs_core_available(void);
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extern bool qcom_scm_dcvs_ca_available(void);
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extern int qcom_scm_dcvs_reset(void);
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extern int qcom_scm_dcvs_init_v2(phys_addr_t addr, size_t size, int *version);
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extern int qcom_scm_dcvs_init_ca_v2(phys_addr_t addr, size_t size);
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extern int qcom_scm_dcvs_update(int level, s64 total_time, s64 busy_time);
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extern int qcom_scm_dcvs_update_v2(int level, s64 total_time, s64 busy_time);
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extern int qcom_scm_dcvs_update_ca_v2(int level, s64 total_time, s64 busy_time,
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int context_count);
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extern bool qcom_scm_ocmem_lock_available(void);
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extern int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset,
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u32 size, u32 mode);
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extern int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset,
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u32 size);
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extern int qcom_scm_config_set_ice_key(uint32_t index, phys_addr_t paddr,
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size_t size, uint32_t cipher,
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unsigned int data_unit,
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unsigned int ce);
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extern int qcom_scm_clear_ice_key(uint32_t index, unsigned int ce);
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extern int qcom_scm_derive_raw_secret(phys_addr_t paddr_key, size_t size_key,
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phys_addr_t paddr_secret, size_t size_secret);
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extern bool qcom_scm_ice_available(void);
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extern int qcom_scm_ice_invalidate_key(u32 index);
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extern int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size,
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enum qcom_scm_ice_cipher cipher,
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u32 data_unit_size);
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extern int qcom_scm_hibernate_exit(void);
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extern bool qcom_scm_hdcp_available(void);
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extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
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u32 *resp);
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extern bool qcom_scm_is_lmh_debug_set_available(void);
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extern bool qcom_scm_is_lmh_debug_read_buf_size_available(void);
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extern bool qcom_scm_is_lmh_debug_read_buf_available(void);
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extern bool qcom_scm_is_lmh_debug_get_type_available(void);
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extern int qcom_scm_lmh_read_buf_size(int *size);
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extern int qcom_scm_lmh_limit_dcvsh(phys_addr_t payload, uint32_t payload_size,
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u64 limit_node, uint32_t node_id, u64 version);
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extern int qcom_scm_lmh_debug_read(phys_addr_t payload, uint32_t size);
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extern int qcom_scm_lmh_debug_set_config_write(phys_addr_t payload,
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int payload_size, uint32_t *buf, int buf_size);
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extern int qcom_scm_lmh_get_type(phys_addr_t payload, u64 payload_size,
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u64 debug_type, uint32_t get_from, uint32_t *size);
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extern int qcom_scm_lmh_fetch_data(u32 node_id, u32 debug_type, uint32_t *peak,
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uint32_t *avg);
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extern int qcom_scm_smmu_change_pgtbl_format(u64 dev_id, int cbndx);
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extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en);
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extern int qcom_scm_smmu_notify_secure_lut(u64 dev_id, bool secure);
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extern int qcom_scm_qdss_invoke(phys_addr_t addr, size_t size, u64 *out);
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extern int qcom_scm_camera_protect_all(uint32_t protect, uint32_t param);
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extern int qcom_scm_camera_protect_phy_lanes(bool protect, u64 regmask);
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extern int qcom_scm_tsens_reinit(int *tsens_ret);
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extern int qcom_scm_get_tz_log_feat_id(u64 *version);
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extern int qcom_scm_get_tz_feat_id_version(u64 feat_id, u64 *version);
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extern int qcom_scm_register_qsee_log_buf(phys_addr_t buf, size_t len);
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extern int qcom_scm_query_encrypted_log_feature(u64 *enabled);
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extern int qcom_scm_request_encrypted_log(phys_addr_t buf, size_t len,
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uint32_t log_id, bool is_full_encrypted_tz_logs_supported,
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bool is_full_encrypted_tz_logs_enabled);
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extern int qcom_scm_ice_restore_cfg(void);
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extern int qcom_scm_invoke_smc(phys_addr_t in_buf, size_t in_buf_size,
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phys_addr_t out_buf, size_t out_buf_size, int32_t *result,
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u64 *response_type, unsigned int *data);
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extern int qcom_scm_invoke_smc_legacy(phys_addr_t in_buf, size_t in_buf_size,
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phys_addr_t out_buf, size_t out_buf_size, int32_t *result,
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u64 *response_type, unsigned int *data);
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extern int qcom_scm_invoke_callback_response(phys_addr_t out_buf,
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size_t out_buf_size, int32_t *result, u64 *response_type,
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unsigned int *data);
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extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
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u64 limit_node, u32 node_id, u64 version);
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extern int qcom_scm_lmh_profile_change(u32 profile_id);
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extern bool qcom_scm_lmh_dcvsh_available(void);
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#else
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#include <linux/errno.h>
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static inline bool qcom_scm_is_available(void) { return false; }
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static void *qcom_get_scm_device(void) { return ERR_PTR(-ENODEV); }
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static inline int qcom_scm_set_cold_boot_addr(void *entry,
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const cpumask_t *cpus) { return -ENODEV; }
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static inline int qcom_scm_set_warm_boot_addr(void *entry,
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const cpumask_t *cpus) { return -ENODEV; }
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static inline void qcom_scm_cpu_power_down(u32 flags) {}
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static inline int qcom_scm_sec_wdog_deactivate(void) { return -ENODEV; }
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static inline int qcom_scm_sec_wdog_trigger(void) { return -ENODEV; }
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static inline void qcom_scm_disable_sdi(void) {}
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static inline u32 qcom_scm_set_remote_state(u32 state,u32 id)
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{ return -ENODEV; }
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static inline int qcom_scm_spin_cpu(void) { return -ENODEV; }
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static inline void qcom_scm_set_download_mode(enum qcom_download_mode mode,
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phys_addr_t tcsr_boot_misc) {}
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static inline int qcom_scm_config_cpu_errata(void)
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{ return -ENODEV; }
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static inline int qcom_scm_pas_init_image(u32 peripheral, dma_addr_t metadata) { return -ENODEV; }
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static inline int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
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phys_addr_t size) { return -ENODEV; }
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static inline int qcom_scm_pas_auth_and_reset(u32 peripheral)
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{ return -ENODEV; }
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static inline int qcom_scm_pas_shutdown(u32 peripheral) { return -ENODEV; }
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static inline int qcom_scm_pas_shutdown_retry(u32 peripheral) { return -ENODEV; }
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static inline bool qcom_scm_pas_supported(u32 peripheral) { return false; }
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static inline int qcom_scm_get_sec_dump_state(u32 *dump_state)
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{return -ENODEV; }
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static inline int qcom_scm_assign_dump_table_region(bool is_assign, phys_addr_t addr, size_t size)
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{return -ENODEV; }
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static inline int qcom_scm_tz_blsp_modify_owner(int food, u64 subsystem,
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int *out) { return -ENODEV; }
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static inline int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val)
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{ return -ENODEV; }
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static inline int qcom_scm_io_writel(phys_addr_t addr, unsigned int val)
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{ return -ENODEV; }
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static inline int qcom_scm_io_reset(void)
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{ return -ENODEV; }
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static inline bool qcom_scm_is_secure_wdog_trigger_available(void)
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{ return false; }
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static inline bool qcom_scm_is_mode_switch_available(void)
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{ return false; }
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static inline int qcom_scm_get_jtag_etm_feat_id(u64 *version)
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{ return -ENODEV; }
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static inline void qcom_scm_halt_spmi_pmic_arbiter(void) {}
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static inline void qcom_scm_deassert_ps_hold(void) {}
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static inline void qcom_scm_mmu_sync(bool sync) {}
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static inline bool qcom_scm_restore_sec_cfg_available(void) { return false; }
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static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare)
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{ return -ENODEV; }
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static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size)
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{ return -ENODEV; }
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static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare)
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{ return -ENODEV; }
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extern inline int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size,
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u32 cp_nonpixel_start,
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u32 cp_nonpixel_size)
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{ return -ENODEV; }
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static inline int qcom_scm_mem_protect_region_id(phys_addr_t paddr, size_t size)
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{ return -ENODEV; }
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static inline int qcom_scm_mem_protect_lock_id2_flat(phys_addr_t list_addr,
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size_t list_size, size_t chunk_size, size_t memory_usage,
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int lock) { return -ENODEV; }
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static inline int qcom_scm_iommu_secure_map(phys_addr_t sg_list_addr,
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size_t num_sg, size_t sg_block_size, u64 sec_id, int cbndx,
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unsigned long iova, size_t total_len) { return -ENODEV; }
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static inline int qcom_scm_iommu_secure_unmap(u64 sec_id, int cbndx,
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unsigned long iova, size_t total_len) { return -ENODEV; }
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static inline int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
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unsigned int *src, const struct qcom_scm_vmperm *newvm,
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unsigned int dest_cnt) { return -ENODEV; }
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static inline int
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qcom_scm_assign_mem_regions(struct qcom_scm_mem_map_info *mem_regions,
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size_t mem_regions_sz, u32 *srcvms, size_t src_sz,
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struct qcom_scm_current_perm_info *newvms,
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size_t newvms_sz) { return -ENODEV; }
|
|
static inline int qcom_scm_mem_protect_sd_ctrl(u32 devid, phys_addr_t mem_addr,
|
|
u64 mem_size, u32 vmid)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_get_feat_version_cp(u64 *version)
|
|
{ return -ENODEV; }
|
|
static inline bool qcom_scm_kgsl_set_smmu_aperture_available(void)
|
|
{ return false; }
|
|
static inline int qcom_scm_kgsl_set_smmu_aperture(
|
|
unsigned int num_context_bank) { return -ENODEV; }
|
|
static inline int qcom_scm_enable_shm_bridge(void) { return -ENODEV; }
|
|
static inline int qcom_scm_delete_shm_bridge(u64 handle) { return -ENODEV; }
|
|
static inline int qcom_scm_create_shm_bridge(u64 pfn_and_ns_perm_flags,
|
|
u64 ipfn_and_s_perm_flags, u64 size_and_flags,
|
|
u64 ns_vmids, u64 *handle) { return -ENODEV; }
|
|
static inline int qcom_scm_smmu_prepare_atos_id(u64 dev_id, int cb_num,
|
|
int operation) { return -ENODEV; }
|
|
static inline int qcom_mdf_assign_memory_to_subsys(u64 start_addr, u64 end_addr,
|
|
phys_addr_t paddr, u64 size)
|
|
{ return -ENODEV; }
|
|
|
|
static inline bool qcom_scm_dcvs_core_available(void) { return false; }
|
|
static inline bool qcom_scm_dcvs_ca_available(void) { return false; }
|
|
static inline int qcom_scm_dcvs_init_v2(phys_addr_t addr, size_t size,
|
|
int *version) { return -ENODEV; }
|
|
static inline int qcom_scm_dcvs_init_ca_v2(phys_addr_t addr, size_t size)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_dcvs_update(int level, s64 total_time, s64 busy_time)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_dcvs_update_v2(int level, s64 total_time,
|
|
s64 busy_time) { return -ENODEV; }
|
|
static inline int qcom_scm_dcvs_update_ca_v2(int level, s64 total_time,
|
|
s64 busy_time, int context_count) { return -ENODEV; }
|
|
|
|
static inline bool qcom_scm_ocmem_lock_available(void) { return false; }
|
|
static inline int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset,
|
|
u32 size, u32 mode) { return -ENODEV; }
|
|
static inline int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id,
|
|
u32 offset, u32 size) { return -ENODEV; }
|
|
|
|
static inline int qcom_scm_config_set_ice_key(uint32_t index, phys_addr_t paddr,
|
|
size_t size, uint32_t cipher, unsigned int data_unit,
|
|
unsigned int food) { return -ENODEV; }
|
|
static inline int qcom_scm_clear_ice_key(uint32_t index, unsigned int food)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_hibernate_exit(uint32_t flag) { return -ENODEV; }
|
|
static inline int qcom_scm_derive_raw_secret(phys_addr_t paddr_key,
|
|
size_t size_key, phys_addr_t paddr_secret,
|
|
size_t size_secret) { return -ENODEV; }
|
|
static inline bool qcom_scm_ice_available(void) { return false; }
|
|
static inline int qcom_scm_ice_invalidate_key(u32 index) { return -ENODEV; }
|
|
static inline int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size,
|
|
enum qcom_scm_ice_cipher cipher,
|
|
u32 data_unit_size) { return -ENODEV; }
|
|
|
|
static inline bool qcom_scm_hdcp_available(void) { return false; }
|
|
static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
|
|
u32 *resp) { return -ENODEV; }
|
|
|
|
static inline bool qcom_scm_is_lmh_debug_set_available(void)
|
|
{ return -EINVAL; }
|
|
static inline bool qcom_scm_is_lmh_debug_read_buf_size_available(void)
|
|
{ return -EINVAL; }
|
|
static inline bool qcom_scm_is_lmh_debug_read_buf_available(void)
|
|
{ return -EINVAL; }
|
|
static inline bool qcom_scm_is_lmh_debug_get_type_available(void)
|
|
{ return -EINVAL; }
|
|
static inline int qcom_scm_lmh_read_buf_size(int *size) { return -ENODEV; }
|
|
static inline int qcom_scm_lmh_limit_dcvsh(phys_addr_t payload,
|
|
uint32_t payload_size, u64 limit_node, uint32_t node_id,
|
|
u64 version) { return -ENODEV; }
|
|
static inline int qcom_scm_lmh_debug_read(phys_addr_t payload, uint32_t size)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_lmh_debug_set_config_write(phys_addr_t payload,
|
|
int payload_size, uint32_t *buf, int buf_size)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_lmh_get_type(phys_addr_t payload, u64 payload_size,
|
|
u64 debug_type, uint32_t get_from, uint32_t *size)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_lmh_fetch_data(u32 node_id, u32 debug_type,
|
|
uint32_t *peak, uint32_t *avg)
|
|
{ return -ENODEV; }
|
|
|
|
static inline int qcom_scm_smmu_change_pgtbl_format(u64 dev_id, int cbndx)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_smmu_notify_secure_lut(u64 dev_id, bool secure)
|
|
{ return -EINVAL; }
|
|
|
|
static inline int qcom_scm_qdss_invoke(phys_addr_t data, size_t size, u64 *out)
|
|
{ return -EINVAL; }
|
|
|
|
static inline int qcom_scm_camera_protect_all(uint32_t protect, uint32_t param)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_camera_protect_phy_lanes(bool protect, u64 regmask)
|
|
{ return -EINVAL; }
|
|
|
|
static inline int qcom_scm_tsens_reinit(int *tsens_ret)
|
|
{ return -ENODEV; }
|
|
|
|
static inline int qcom_scm_get_tz_log_feat_id(u64 *version)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_get_tz_feat_id_version(u64 feat_id, u64 *version)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_register_qsee_log_buf(phys_addr_t buf, size_t len)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_query_encrypted_log_feature(u64 *enabled)
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_request_encrypted_log(phys_addr_t buf, size_t len,
|
|
uint32_t log_id, bool is_full_encrypted_tz_logs_supported,
|
|
bool is_full_encrypted_tz_logs_enabled)
|
|
{ return -ENODEV; }
|
|
|
|
static inline int qcom_scm_ice_restore_cfg(void) { return -ENODEV; }
|
|
|
|
static inline int qcom_scm_invoke_smc(phys_addr_t in_buf, size_t in_buf_size,
|
|
phys_addr_t out_buf, size_t out_buf_size, int32_t *result,
|
|
u64 *request_type, unsigned int *data) { return -ENODEV; }
|
|
static inline int qcom_scm_invoke_smc_legacy(phys_addr_t in_buf, size_t in_buf_size,
|
|
phys_addr_t out_buf, size_t out_buf_size, int32_t *result,
|
|
u64 *request_type, unsigned int *data) { return -ENODEV; }
|
|
static inline int qcom_scm_invoke_callback_response(phys_addr_t out_buf,
|
|
size_t out_buf_size, int32_t *result, u64 *request_type,
|
|
unsigned int *data) { return -ENODEV; }
|
|
|
|
static inline int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
|
|
u64 limit_node, u32 node_id, u64 version);
|
|
{ return -ENODEV; }
|
|
static inline int qcom_scm_lmh_profile_change(u32 profile_id);
|
|
{ return -ENODEV; }
|
|
static inline bool qcom_scm_lmh_dcvsh_available(void);
|
|
{ return -ENODEV; }
|
|
|
|
#endif
|
|
#endif
|