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android_kernel_xiaomi_sm8450/drivers/counter
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Dharma Balasubiramani 7decb65151 counter: microchip-tcb-capture: Fix the use of internal GCLK logic 
commit df8fdd01c98b99d04915c04f3a5ce73f55456b7c upstream.

As per the datasheet, the clock selection Bits 2:0 – TCCLKS[2:0] should
be set to 0 while using the internal GCLK (TIMER_CLOCK1).

Fixes: 106b104137 ("counter: Add microchip TCB capture counter")
Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
Link: https://lore.kernel.org/r/20230905100835.315024-1-dharma.b@microchip.com
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-10-25 11:54:16 +02:00
..
104-quad-8.c counter: 104-quad-8: Fix race condition between FLAG and CNTR reads 2023-05-17 11:47:28 +02:00
counter.c counter: Simplify the count_read and count_write callbacks 2019-10-18 19:47:27 +01:00
ftm-quaddec.c counter: Simplify the count_read and count_write callbacks 2019-10-18 19:47:27 +01:00
Kconfig counter: stm32-lptimer-cnt: remove iio counter abi 2022-01-27 10:54:08 +01:00
Makefile counter: Add microchip TCB capture counter 2020-07-20 13:04:40 +01:00
microchip-tcb-capture.c counter: microchip-tcb-capture: Fix the use of internal GCLK logic 2023-10-25 11:54:16 +02:00
stm32-lptimer-cnt.c counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update 2023-01-14 10:15:58 +01:00
stm32-timer-cnt.c counter: stm32-timer-cnt: fix ceiling miss-alignment with reload register 2021-03-25 09:04:16 +01:00
ti-eqep.c counter:ti-eqep: remove floor 2021-01-27 11:55:12 +01:00