- armada-370-xp
- Chained per-cpu interrupts
- gic{,-v3,v3-its}
- Various fixes for safer operation
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJVBO4uAAoJEP45WPkGe8Zn8jAQAL0bbO4wTUf8eIAVMQ8gvpWT
RmmPx806bctxWzCQdZeI+5SLbAoMGH4sGN2nvZjxs+gf1+8TDxcNbqpcJdng88+v
KcYCBVAtNCae3ZScCIiqgbqOWO6EeCi2XoEdxKmmoY6xvw/S+392Gq5Yx6rRhTui
SYuhq6ZEdeugfaFDZoJE4piBPQWsH6KTCZ2GbLeQbrPGYI1ChIz79bwn0vE3KNXH
Ctlv3F9CdRgqXMvX5RbE0bqYlAfzV+qkZciIGLd1iLXxfve68HTQYeO1bfMXd2LT
o3JQBivSU+RMYYXY/+xG3h4+poT9mOlMwArQyEFmYsLCADUkKY0XEkiSfYypcqtl
RBrIxX1bbcjAFWQPGADP9x7MeR1fgHrPbSvfWRaKRM+R7+mPXyfidP4CNvhCdVoN
37TpU+XKy/T+bTuciDPieqOHjIcCDZLFy4EHgs1T8KkcGlMr9/AC6noW5ce46zut
L4CajpAuwsRVAEgERRLU0xdDcRJYHO6GIou4RS4aGyejjaK1bkq1n9/svDt3GmfI
urUCNcjkkLsYqSBlYhmcUE6ijPnhvLCaaACfomUU2Jlk4YRhGhEpzN2l5sFDvbaA
xr4DcPV7/XGqzNTwpk1MHKZaloaRhHF2HDjfyKv+23xMPeNu+nRovabHWP4Il2LI
vowXFSS9ciCxnVOLfEXA
=DqZ5
-----END PGP SIGNATURE-----
Merge tag 'irqchip-fixes-4.0' of git://git.infradead.org/users/jcooper/linux
Pull irqchip fixes from Jason Cooper:
"armada-370-xp:
- Chained per-cpu interrupts
gic{,-v3,v3-its}"
- Various fixes for safer operation"
* tag 'irqchip-fixes-4.0' of git://git.infradead.org/users/jcooper/linux:
irqchip: gicv3-its: Support safe initialization
irqchip: gicv3-its: Define macros for GITS_CTLR fields
irqchip: gicv3-its: Add limitation to page order
irqchip: gicv3-its: Use 64KB page as default granule
irqchip: gicv3-its: Zero itt before handling to hardware
irqchip: gic-v3: Fix out of bounds access to cpu_logical_map
irqchip: gic: Fix unsafe locking reported by lockdep
irqchip: gicv3-its: Fix unsafe locking reported by lockdep
irqchip: gicv3-its: Iterate over PCI aliases to generate ITS configuration
irqchip: gicv3-its: Allocate enough memory for the full range of DeviceID
irqchip: gicv3-its: Fix ITS CPU init
irqchip: armada-370-xp: Fix chained per-cpu interrupts
71c87bd062