92dd727034
Modify the current implementation of having GSI related parameters within the dwc3_ep struct and use the hw_eps method instead to avoid having to modify DWC3 core structures. Change-Id: Ie91e65f86b6135c5f19a5e73d2eae6770f35be7c Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
194 lines
6.3 KiB
C
194 lines
6.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef __LINUX_USB_DWC3_MSM_H
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#define __LINUX_USB_DWC3_MSM_H
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#include <linux/scatterlist.h>
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#include <linux/usb/gadget.h>
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/* used for struct usb_phy flags */
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#define PHY_HOST_MODE BIT(0)
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#define DEVICE_IN_SS_MODE BIT(1)
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#define PHY_LANE_A BIT(2)
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#define PHY_LANE_B BIT(3)
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#define PHY_HSFS_MODE BIT(4)
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#define PHY_LS_MODE BIT(5)
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#define EUD_SPOOF_DISCONNECT BIT(6)
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#define EUD_SPOOF_CONNECT BIT(7)
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#define PHY_SUS_OVERRIDE BIT(8)
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/*
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* The following are bit fields describing the USB BAM options.
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* These bit fields are set by function drivers that wish to queue
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* usb_requests with sps/bam parameters.
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*/
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#define MSM_TX_PIPE_ID_OFS (16)
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#define MSM_SPS_MODE BIT(5)
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#define MSM_IS_FINITE_TRANSFER BIT(6)
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#define MSM_PRODUCER BIT(7)
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#define MSM_DISABLE_WB BIT(8)
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#define MSM_ETD_IOC BIT(9)
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#define MSM_INTERNAL_MEM BIT(10)
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#define MSM_VENDOR_ID BIT(16)
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/* Operations codes for GSI enabled EPs */
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enum gsi_ep_op {
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GSI_EP_OP_CONFIG = 0,
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GSI_EP_OP_STARTXFER,
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GSI_EP_OP_STORE_DBL_INFO,
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GSI_EP_OP_ENABLE_GSI,
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GSI_EP_OP_UPDATEXFER,
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GSI_EP_OP_RING_DB,
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GSI_EP_OP_ENDXFER,
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GSI_EP_OP_GET_CH_INFO,
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GSI_EP_OP_GET_XFER_IDX,
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GSI_EP_OP_PREPARE_TRBS,
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GSI_EP_OP_FREE_TRBS,
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GSI_EP_OP_SET_CLR_BLOCK_DBL,
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GSI_EP_OP_CHECK_FOR_SUSPEND,
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GSI_EP_OP_DISABLE,
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};
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enum usb_hw_ep_mode {
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USB_EP_NONE,
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USB_EP_BAM,
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USB_EP_GSI,
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};
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enum dwc3_notify_event {
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DWC3_CONTROLLER_ERROR_EVENT,
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DWC3_CONTROLLER_RESET_EVENT,
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DWC3_CONTROLLER_POST_RESET_EVENT,
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DWC3_CORE_PM_SUSPEND_EVENT,
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DWC3_CORE_PM_RESUME_EVENT,
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DWC3_CONTROLLER_CONNDONE_EVENT,
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DWC3_CONTROLLER_NOTIFY_OTG_EVENT,
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DWC3_CONTROLLER_SET_CURRENT_DRAW_EVENT,
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DWC3_CONTROLLER_NOTIFY_DISABLE_UPDXFER,
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DWC3_CONTROLLER_PULLUP,
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/* USB GSI event buffer related notification */
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DWC3_GSI_EVT_BUF_ALLOC,
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DWC3_GSI_EVT_BUF_SETUP,
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DWC3_GSI_EVT_BUF_CLEANUP,
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DWC3_GSI_EVT_BUF_CLEAR,
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DWC3_GSI_EVT_BUF_FREE,
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DWC3_CONTROLLER_NOTIFY_CLEAR_DB,
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};
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/*
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* @buf_base_addr: Base pointer to buffer allocated for each GSI enabled EP.
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* TRBs point to buffers that are split from this pool. The size of the
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* buffer is num_bufs times buf_len. num_bufs and buf_len are determined
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based on desired performance and aggregation size.
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* @dma: DMA address corresponding to buf_base_addr.
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* @num_bufs: Number of buffers associated with the GSI enabled EP. This
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* corresponds to the number of non-zlp TRBs allocated for the EP.
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* The value is determined based on desired performance for the EP.
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* @buf_len: Size of each individual buffer is determined based on aggregation
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* negotiated as per the protocol. In case of no aggregation supported by
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* the protocol, we use default values.
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* @db_reg_phs_addr_lsb: IPA channel doorbell register's physical address LSB
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* @mapped_db_reg_phs_addr_lsb: doorbell LSB IOVA address mapped with IOMMU
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* @db_reg_phs_addr_msb: IPA channel doorbell register's physical address MSB
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* @ep_intr_num: Interrupter number for EP.
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*/
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struct usb_gsi_request {
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void *buf_base_addr;
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dma_addr_t dma;
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size_t num_bufs;
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size_t buf_len;
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u32 db_reg_phs_addr_lsb;
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dma_addr_t mapped_db_reg_phs_addr_lsb;
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u32 db_reg_phs_addr_msb;
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u8 ep_intr_num;
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struct sg_table sgt_trb_xfer_ring;
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struct sg_table sgt_data_buff;
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};
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/*
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* @last_trb_addr: Address (LSB - based on alignment restrictions) of
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* last TRB in queue. Used to identify rollover case.
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* @const_buffer_size: TRB buffer size in KB (similar to IPA aggregation
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* configuration). Must be aligned to Max USB Packet Size.
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* Should be 1 <= const_buffer_size <= 31.
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* @depcmd_low_addr: Used by GSI hardware to write "Update Transfer" cmd
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* @depcmd_hi_addr: Used to write "Update Transfer" command.
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* @gevntcount_low_addr: GEVNCOUNT low address for GSI hardware to read and
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* clear processed events.
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* @gevntcount_hi_addr: GEVNCOUNT high address.
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* @xfer_ring_len: length of transfer ring in bytes (must be integral
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* multiple of TRB size - 16B for xDCI).
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* @xfer_ring_base_addr: physical base address of transfer ring. Address must
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* be aligned to xfer_ring_len rounded to power of two.
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* @ch_req: Used to pass request specific info for certain operations on GSI EP
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*/
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struct gsi_channel_info {
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u16 last_trb_addr;
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u8 const_buffer_size;
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u32 depcmd_low_addr;
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u8 depcmd_hi_addr;
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u32 gevntcount_low_addr;
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u8 gevntcount_hi_addr;
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u16 xfer_ring_len;
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u64 xfer_ring_base_addr;
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struct usb_gsi_request *ch_req;
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};
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struct dwc3;
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#if IS_ENABLED(CONFIG_USB_DWC3_MSM)
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void dwc3_msm_notify_event(struct dwc3 *dwc,
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enum dwc3_notify_event event, unsigned int value);
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int usb_gsi_ep_op(struct usb_ep *ep, void *op_data, enum gsi_ep_op op);
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int msm_ep_config(struct usb_ep *ep, struct usb_request *request, u32 bam_opts);
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int msm_ep_unconfig(struct usb_ep *ep);
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void dwc3_tx_fifo_resize_request(struct usb_ep *ep, bool qdss_enable);
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int msm_data_fifo_config(struct usb_ep *ep, unsigned long addr, u32 size,
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u8 dst_pipe_idx);
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int msm_dwc3_reset_dbm_ep(struct usb_ep *ep);
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int dwc3_msm_release_ss_lane(struct device *dev);
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int msm_ep_update_ops(struct usb_ep *ep);
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int msm_ep_clear_ops(struct usb_ep *ep);
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int msm_ep_set_mode(struct usb_ep *ep, enum usb_hw_ep_mode mode);
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int dwc3_msm_kretprobe_init(void);
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void dwc3_msm_kretprobe_exit(void);
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#else
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void dwc3_msm_notify_event(struct dwc3 *dwc,
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enum dwc3_notify_event event, unsigned int value)
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{ }
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static inline int usb_gsi_ep_op(struct usb_ep *ep, void *op_data,
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enum gsi_ep_op op)
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{ return 0; }
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static inline int msm_data_fifo_config(struct usb_ep *ep, unsigned long addr,
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u32 size, u8 dst_pipe_idx)
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{ return -ENODEV; }
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static inline int msm_ep_config(struct usb_ep *ep, struct usb_request *request,
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u32 bam_opts)
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{ return -ENODEV; }
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static inline int msm_ep_unconfig(struct usb_ep *ep)
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{ return -ENODEV; }
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static inline void dwc3_tx_fifo_resize_request(struct usb_ep *ep,
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bool qdss_enable)
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{ }
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static inline bool msm_dwc3_reset_ep_after_lpm(struct usb_gadget *gadget)
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{ return false; }
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static inline int dwc3_msm_release_ss_lane(struct device *dev)
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{ return -ENODEV; }
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int msm_ep_update_ops(struct usb_ep *ep)
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{ return -ENODEV; }
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int msm_ep_clear_ops(struct usb_ep *ep)
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{ return -ENODEV; }
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int msm_ep_set_mode(struct usb_ep *ep, enum usb_hw_ep_mode mode)
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{ return -ENODEV; }
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int dwc3_msm_kretprobe_init(void)
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{ return 0; }
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void dwc3_msm_kretprobe_exit(void)
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{ }
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#endif
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#endif /* __LINUX_USB_DWC3_MSM_H */
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