57b94ff597
IA64 needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Link: http://lkml.kernel.org/r/20200515143646.3857579-13-hch@lst.de Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
34 lines
904 B
C
34 lines
904 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_IA64_CACHEFLUSH_H
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#define _ASM_IA64_CACHEFLUSH_H
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/*
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* Copyright (C) 2002 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <linux/page-flags.h>
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#include <linux/bitops.h>
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#include <asm/page.h>
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
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#define flush_dcache_page(page) \
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do { \
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clear_bit(PG_arch_1, &(page)->flags); \
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} while (0)
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extern void flush_icache_range(unsigned long start, unsigned long end);
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#define flush_icache_range flush_icache_range
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extern void clflush_cache_range(void *addr, int size);
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#define flush_icache_user_range(vma, page, user_addr, len) \
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do { \
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unsigned long _addr = (unsigned long) page_address(page) + ((user_addr) & ~PAGE_MASK); \
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flush_icache_range(_addr, _addr + (len)); \
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} while (0)
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#include <asm-generic/cacheflush.h>
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#endif /* _ASM_IA64_CACHEFLUSH_H */
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