3110628d89
The MSIOF controller has DTDL and SYNCDL in SITMDR1 register. So, this patch adds new properties like the following commit: d0fb47a5237d8b9576113568bacfd27892308b62 (spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT) Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
15 lines
259 B
C
15 lines
259 B
C
#ifndef __SPI_SH_MSIOF_H__
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#define __SPI_SH_MSIOF_H__
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struct sh_msiof_spi_info {
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int tx_fifo_override;
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int rx_fifo_override;
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u16 num_chipselect;
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unsigned int dma_tx_id;
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unsigned int dma_rx_id;
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u32 dtdl;
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u32 syncdl;
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};
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#endif /* __SPI_SH_MSIOF_H__ */
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