2f7dba9f7d
Replace {P,T,DTC}DEBUG_INIT with NDEBUG_INIT. Remove dead debugging
code, including code that's conditional upon *DEBUG_TRANSFER.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
50 lines
1.1 KiB
C
50 lines
1.1 KiB
C
/*
|
|
* DTC controller, taken from T128 driver by...
|
|
* Copyright 1993, Drew Eckhardt
|
|
* Visionary Computing
|
|
* (Unix and Linux consulting and custom programming)
|
|
* drew@colorado.edu
|
|
* +1 (303) 440-4894
|
|
*/
|
|
|
|
#ifndef DTC3280_H
|
|
#define DTC3280_H
|
|
|
|
#ifndef CMD_PER_LUN
|
|
#define CMD_PER_LUN 2
|
|
#endif
|
|
|
|
#ifndef CAN_QUEUE
|
|
#define CAN_QUEUE 32
|
|
#endif
|
|
|
|
#define NCR5380_implementation_fields \
|
|
void __iomem *base
|
|
|
|
#define NCR5380_local_declare() \
|
|
void __iomem *base
|
|
|
|
#define NCR5380_setup(instance) \
|
|
base = ((struct NCR5380_hostdata *)(instance)->hostdata)->base
|
|
|
|
#define DTC_address(reg) (base + DTC_5380_OFFSET + reg)
|
|
|
|
#define NCR5380_read(reg) (readb(DTC_address(reg)))
|
|
#define NCR5380_write(reg, value) (writeb(value, DTC_address(reg)))
|
|
|
|
#define NCR5380_intr dtc_intr
|
|
#define NCR5380_queue_command dtc_queue_command
|
|
#define NCR5380_abort dtc_abort
|
|
#define NCR5380_bus_reset dtc_bus_reset
|
|
#define NCR5380_info dtc_info
|
|
#define NCR5380_show_info dtc_show_info
|
|
#define NCR5380_write_info dtc_write_info
|
|
|
|
/* 15 12 11 10
|
|
1001 1100 0000 0000 */
|
|
|
|
#define DTC_IRQS 0x9c00
|
|
|
|
|
|
#endif /* DTC3280_H */
|