Rodrigo Vivi 2c2f6e30d5 drm/i915/glk: Remove 99% limitation. ... While checking the opportunity to add a display_gen check to allow glk and cnl to be on same bucket I noticed these FIXME cases here. So I got the confirmation from HW architect that we actually never needed this workaround. "GLK supports 2 pixel per clock, so pixel clock can be up to 2 * cdclk." So, this reverts commit 97f55ca5b6 ("drm/i915/glk: limit pixel clock to 99% of cdclk workaround") Fixes: 97f55ca5b6 ("drm/i915/glk: limit pixel clock to 99% of cdclk workaround") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Madhav Chauhan <madhav.chauhan@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Clinton Taylor <clinton.a.taylor@intel.com> Cc: Arthur J Runyan <arthur.j.runyan@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181026005636.22274-1-rodrigo.vivi@intel.com (cherry picked from commit 42882336e6) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>		2018-11-06 17:17:26 +02:00
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drm	drm/i915/glk: Remove 99% limitation.	2018-11-06 17:17:26 +02:00
host1x	gpu: host1x: Detach Host1x from IOMMU DMA domain on arm32	2018-09-26 17:11:14 +02:00
ipu-v3	media: v4l: mediabus: Recognise CSI-2 D-PHY and C-PHY	2018-10-04 16:06:15 -04:00
vga	ALSA: hda - Enable runtime PM only for discrete GPU	2018-09-13 17:58:30 +02:00
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