Radhey Shyam Pandey b26ced2625 dmaengine: xilinx_dma: Set DMA mask for coherent APIs ... [ Upstream commit aac6c0f90799d66b8989be1e056408f33fd99fe6 ] The xilinx dma driver uses the consistent allocations, so for correct operation also set the DMA mask for coherent APIs. It fixes the below kernel crash with dmatest client when DMA IP is configured with 64-bit address width and linux is booted from high (>4GB) memory. Call trace: [ 489.531257] dma_alloc_from_pool+0x8c/0x1c0 [ 489.535431] dma_direct_alloc+0x284/0x330 [ 489.539432] dma_alloc_attrs+0x80/0xf0 [ 489.543174] dma_pool_alloc+0x160/0x2c0 [ 489.547003] xilinx_cdma_prep_memcpy+0xa4/0x180 [ 489.551524] dmatest_func+0x3cc/0x114c [ 489.555266] kthread+0x124/0x130 [ 489.558486] ret_from_fork+0x10/0x3c [ 489.562051] ---[ end trace 248625b2d596a90a ]--- Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Reviewed-by: Harini Katakam <harini.katakam@xilinx.com> Link: https://lore.kernel.org/r/1629363528-30347-1-git-send-email-radhey.shyam.pandey@xilinx.com Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-09-26 14:09:00 +02:00
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Makefile	dmaengine: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver	2020-07-17 11:37:59 +05:30
xilinx_dma.c	dmaengine: xilinx_dma: Set DMA mask for coherent APIs	2021-09-26 14:09:00 +02:00
xilinx_dpdma.c	dmaengine: xilinx: dpdma: Limit descriptor IDs to 16 bits	2021-06-30 08:47:19 -04:00
zynqmp_dma.c	dmaengine: zynqmp_dma: Fix PM reference leak in zynqmp_dma_alloc_chan_resourc()	2021-06-30 08:47:18 -04:00